Aravind Dasu

38 papers A 6B 4C 1Misc 1Journal 14Unranked 12
YearRankTypeTitle / Venue / Authors
2021 B conf
DO-GPU: Domain Optimizable Soft GPUs.
FPL
Rui Ma, Jia-Ching Hsu, Tian Tan, Eriko Nurvitadhi, Rajesh Vivekanandham, Aravind Dasu, Martin Langhammer, Derek Chiou
2021 J jnl
FlexScore: Quantifying Flexibility.
IEEE Comput. Archit. Lett.
Tian Tan, Eriko Nurvitadhi, Aravind Dasu, Martin Langhammer, Derek Chiou
2021 J jnl
Specializing FGPU for Persistent Deep Learning.
ACM Trans. Reconfigurable Technol. Syst.
Rui Ma, Jia-Ching Hsu, Tian Tan, Eriko Nurvitadhi, David Sheffield, Rob Pelt, Martin Langhammer, Jaewoong Sim, Aravind Dasu, Derek Chiou
2020 A conf
FPGA-based Low-Batch Training Accelerator for Modern CNNs Featuring High Bandwidth Memory.
ICCAD
Shreyas K. Venkataramanaiah, Han-Sok Suh, Shihui Yin, Eriko Nurvitadhi, Aravind Dasu, Yu Cao, Jae-sun Seo
2019 B conf
Automatic Compiler Based FPGA Accelerator for CNN Training.
FPL
Shreyas Kolala Venkataramanaiah, Yufei Ma, Shihui Yin, Eriko Nurvitadhi, Aravind Dasu, Yu Cao, Jae-sun Seo
2019 J jnl
Automatic Compiler Based FPGA Accelerator for CNN Training.
CoRR
Shreyas Kolala Venkataramanaiah, Yufei Ma, Shihui Yin, Eriko Nurvitadhi, Aravind Dasu, Yu Cao, Jae-sun Seo
2019 A conf
Evaluating and Enhancing Intel® Stratix® 10 FPGAs for Persistent Real-Time AI.
FPGA
Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, Andrew Boutros, Jaewoong Sim, Phillip Tomson, Huseyin Sumbul, Gregory K. Chen, Phil C. Knag, Raghavan Kumar, Ram Krishnamurthy, Debbie Marr, Sergey Gribok, Bogdan Pasca, Martin Langhammer, Aravind Dasu
2019 — conf
IP Cores for Graph Kernels on FPGAs.
HPEC
Sanmukh R. Kuppannagari, Rachit Rajat, Rajgopal Kannan, Aravind Dasu, Viktor K. Prasanna
2019 B conf
Specializing FGPU for Persistent Deep Learning.
FPL
Rui Ma, Derek Chiou, Jia-Ching Hsu, Tian Tan, Eriko Nurvitadhi, David Sheffield, Rob Pelt, Martin Langhammer, Jaewoong Sim, Aravind Dasu
2019 Misc conf
Why Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs.
FCCM
Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, Andrew Boutros, Jaewoong Sim, Phillip Tomson, Huseyin Sumbul, Gregory K. Chen, Phil C. Knag, Raghavan Kumar, Ram Krishnamurthy, Sergey Gribok, Bogdan Pasca, Martin Langhammer, Debbie Marr, Aravind Dasu
2018 J jnl
A Faddeev Systolic Array for EKF-SLAM and its Arithmetic Data Representation Impact on FPGA.
J. Signal Process. Syst.
Leandro de Souza Rosa, Aravind Dasu, Pedro C. Diniz, Vanderlei Bonato
2018 A conf
In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC(Abstract Only).
FPGA
Eriko Nurvitadhi, Jeffrey J. Cook, Asit K. Mishra, Debbie Marr, Kevin Nealis, Philip Colangelo, Andrew C. Ling, Davor Capalija, Utku Aydonat, Sergey Y. Shumarayev, Aravind Dasu
2018 B conf
In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC.
FPL
Eriko Nurvitadhi, Jeffrey J. Cook, Asit K. Mishra, Debbie Marr, Kevin Nealis, Philip Colangelo, Andrew C. Ling, Davor Capalija, Utku Aydonat, Aravind Dasu, Sergey Y. Shumarayev
2014 — conf
A power efficient reconfigurable system-in-stack: 3D integration of accelerators, FPGAs, and DRAM.
SoCC
Peter Gadfort, Aravind Dasu, Ali Akoglu, Yoon Kah Leow, Michael Fritze
2011 J jnl
Selected Papers from the 17th Reconfigurable Architectures Workshop (RAW2010).
Int. J. Reconfigurable Comput.
Aravind Dasu, João M. P. Cardoso, Eli Bozorgzadeh, Jürgen Becker
2010 J jnl
Dynamically reconfigurable systolic array accelerators: A case study with extended Kalman filter and discrete wavelet transform algorithms.
IET Comput. Digit. Tech.
Arvind Sudarsanam, Robert Collier Barnes, J. Carver, Ramachandra Kallam, Aravind Dasu
2010 — conf
Memory architecture template for Fast Block Matching algorithms on FPGAs.
IPDPS Workshops
Shant Chandrakar, Abraham Clements, Arvind Sudarsanam, Aravind Dasu
2010 J jnl
Methodology to derive resource aware context adaptable architectures for FPGAs.
IET Comput. Digit. Tech.
Harikrishna Samala, Aravind Dasu
2010 — conf
Self-configurable architecture for reusable systems with Accelerated Relocation Circuit (SCARS-ARC).
IPDPS Workshops
Adarsha Sreeramareddy, Ramachandra Kallam, Aravind Dasu, Ali Akoglu
2010 — conf
Welcome message.
IPDPS Workshops
Jürgen Becker, Eli Bozorgzadeh, João M. P. Cardoso, Aravind Dasu
2009 J jnl
Analysis and Design of a Context Adaptable SAD/MSE Architecture.
Int. J. Reconfigurable Comput.
Arvind Sudarsanam, Aravind Dasu, Karthik Vaithianathan
2009 J jnl
Methodology to derive context adaptable architectures for FPGAs.
IET Comput. Digit. Tech.
Jonathan Phillips, Arvind Sudarsanam, Harikrishna Samala, Ramachandra Kallam, J. Carver, Aravind Dasu
2009 J jnl
PRR-PRR Dynamic Relocation.
IEEE Comput. Archit. Lett.
Arvind Sudarsanam, Ramachandra Kallam, Aravind Dasu
2008 — conf
Hardware/Software Co-designed Extended Kalman Filter on an FPGA.
ERSA
Robert Collier Barnes, Aravind Dasu
2007 A conf
A Reconfigurable Load Balancing Architecture for Molecular Dynamics.
IPDPS
Jonathan Phillips, Matthew Areno, Chris Rogers, Aravind Dasu, Brandon Eames
2007 J jnl
Performance of a LU decomposition on a multi-FPGA system compared to a low power commodity microprocessor system.
Scalable Comput. Pract. Exp.
Thomas Hauser, Aravind Dasu, Arvind Sudarsanam, Seth Young
2006 — conf
Memory support design for LU decomposition on the starbridge hyper-computer.
FPT
Seth Young, Arvind Sudarsanam, Aravind Dasu, Thomas Hauser
2005 — conf
A Fast and Efficient FPGA-Based Implementation for Solving a System of Linear Interval Equations.
FPT
Arvind Sudarsanam, Aravind Dasu
2005 A conf
High Level - Application Analysis Techniques & Architectures - To Explore Design possibilities for Reduced Reconfiguration Area Overheads in FPGAs executing Compute Intensive Applications.
IPDPS
Aravind Dasu, Arvind Sudarsanam
2004 J jnl
A wavelet-based sprite codec.
IEEE Trans. Circuits Syst. Video Technol.
Aravind Dasu, Sethuraman Panchanathan
2004 — conf
Cluster Extraction for Hybrid FPGA Architecture in Computation Intensive Applications.
ERSA
Ali Akoglu, Aravind Dasu, Sethuraman Panchanathan
2004 — conf
Task Scheduling of Control-Data Flow Graphs for Reconfigurable Architectures.
ERSA
Arvind Sudarsanam, Aravind Dasu, Sethuraman Panchanathan
2003 — conf
An Analysis Tool Set for Reconfigurable Media Processing.
Engineering of Reconfigurable Systems and Algorithms
Aravind Dasu, Ali Akoglu, Sethuraman Panchanathan
2002 J jnl
A survey of media processing approaches.
IEEE Trans. Circuits Syst. Video Technol.
Aravind Dasu, Sethuraman Panchanathan
2002 A conf
Pattern Recognition Tool to Detect Reconfigurable Patterns in MPEG4 Video Processing.
IPDPS
Ali Akoglu, Aravind Dasu, Arvind Sudarsanam, Mayur Srinivasan, Sethuraman Panchanathan
2002 J jnl
Reconfigurable media processing.
Parallel Comput.
Aravind Dasu, Sethuraman Panchanathan
2001 C conf
Lifting kernel-based sprite codec.
VCIP
Aravind Dasu, Sethuraman Panchanathan
2001 — conf
Reconfigurable Media Processing.
ITCC
Aravind Dasu, Sethuraman Panchanathan