Arash Fayyazi - RankMe

38 papers A* 1A 8C 1Misc 1Journal 21Unranked 6

Year	Rank	Type	Title / Venue / Authors
2024	A	`conf`	Automated Optimization of Deep Neural Networks: Dynamic Bit-Width and Layer-Width Selection via Cluster-Based Parzen Estimation. DATE Seyedarmin Azizi, Mahdi Nazemi, Arash Fayyazi, Massoud Pedram
2024	J	`jnl`	CHOSEN: Compilation to Hardware Optimization Stack for Efficient Vision Transformer Inference. CoRR Mohammad Erfan Sadeghi, Arash Fayyazi, Suhas Somashekar, Massoud Pedram
2024	—	`conf`	NeuroBlend: Towards Low-Power yet Accurate Neural Network-Based Inference Engine Blending Binary and Fixed-Point Convolutions. ACM Great Lakes Symposium on VLSI Arash Fayyazi, Mahdi Nazemi, Arya Fayyazi, Massoud Pedram
2024	A	`conf`	PEANO-ViT: Power-Efficient Approximations of Non-Linearities in Vision Transformers. ISLPED Mohammad Erfan Sadeghi, Arash Fayyazi, Seyedarmin Azizi, Massoud Pedram
2024	J	`jnl`	PEANO-ViT: Power-Efficient Approximations of Non-Linearities in Vision Transformers. CoRR Mohammad Erfan Sadeghi, Arash Fayyazi, Seyedarmin Azizi, Massoud Pedram
2024	J	`jnl`	Scalable Superconductor Neuron with Ternary Synaptic Connections for Ultra-Fast SNN Hardware. CoRR Mustafa Altay Karamuftuoglu, Beyza Zeynep Ucpinar, Arash Fayyazi, Sasan Razmkhah, Mehdi Kamal, Massoud Pedram
2023	J	`jnl`	A Fast Training-Free Compression Framework for Vision Transformers. CoRR Jung Hwan Heo, Arash Fayyazi, Mahdi Nazemi, Massoud Pedram
2023	A*	`conf`	Algorithms and Hardware for Efficient Processing of Logic-based Neural Networks. DAC Jingkai Hong, Arash Fayyazi, Amirhossein Esmaili, Mahdi Nazemi, Massoud Pedram
2023	J	`jnl`	Algorithms and Hardware for Efficient Processing of Logic-based Neural Networks. CoRR Jingkai Hong, Arash Fayyazi, Amirhossein Esmaili, Mahdi Nazemi, Massoud Pedram
2023	—	`conf`	Better Than Worst-Case Decoding for Quantum Error Correction. ASPLOS (2) Gokul Subramanian Ravi, Jonathan M. Baker, Arash Fayyazi, Sophia Fuhui Lin, Ali Javadi-Abhari, Massoud Pedram, Frederic T. Chong
2023	J	`jnl`	BlendNet: Design and Optimization of a Neural Network-Based Inference Engine Blending Binary and Fixed-Point Convolutions. CoRR Arash Fayyazi, Mahdi Nazemi, Armin Abdollahi, Massoud Pedram
2023	J	`jnl`	Efficient Compilation and Mapping of Fixed Function Combinational Logic onto Digital Signal Processors Targeting Neural Network Inference and Utilizing High-level Synthesis. ACM Trans. Reconfigurable Technol. Syst. Soheil Nazar Shahsavani, Arash Fayyazi, Mahdi Nazemi, Massoud Pedram
2023	J	`jnl`	SNT: Sharpness-Minimizing Network Transformation for Fast Compression-friendly Pretraining. CoRR Jung Hwan Heo, Seyedarmin Azizi, Arash Fayyazi, Mahdi Nazemi, Massoud Pedram
2023	J	`jnl`	Sensitivity-Aware Mixed-Precision Quantization and Width Optimization of Deep Neural Networks Through Cluster-Based Tree-Structured Parzen Estimation. CoRR Seyedarmin Azizi, Mahdi Nazemi, Arash Fayyazi, Massoud Pedram
2022	J	`jnl`	Efficient Compilation and Mapping of Fixed Function Combinational Logic onto Digital Signal Processors Targeting Neural Network Inference and Utilizing High-level Synthesis. CoRR Soheil Nazar Shahsavani, Arash Fayyazi, Mahdi Nazemi, Massoud Pedram
2022	J	`jnl`	Have your QEC and Bandwidth too!: A lightweight cryogenic decoder for common / trivial errors, and efficient bandwidth + execution management otherwise. CoRR Gokul Subramanian Ravi, Jonathan M. Baker, Arash Fayyazi, Sophia Fuhui Lin, Ali Javadi-Abhari, Massoud Pedram, Frederic T. Chong
2022	A	`conf`	Sparse Periodic Systolic Dataflow for Lowering Latency and Power Dissipation of Convolutional Neural Network Accelerators. ISLPED Jung Hwan Heo, Arash Fayyazi, Amirhossein Esmaili, Massoud Pedram
2022	J	`jnl`	Sparse Periodic Systolic Dataflow for Lowering Latency and Power Dissipation of Convolutional Neural Network Accelerators. CoRR Jung Hwan Heo, Arash Fayyazi, Amirhossein Esmaili, Massoud Pedram
2021	A	`conf`	ESPRESSO-GPU: Blazingly Fast Two-Level Logic Minimization. DATE Hitarth Kanakia, Mahdi Nazemi, Arash Fayyazi, Massoud Pedram
2021	Misc	`conf`	NullaNet Tiny: Ultra-low-latency DNN Inference Through Fixed-function Combinational Logic. FCCM Mahdi Nazemi, Arash Fayyazi, Amirhossein Esmaili, Atharva Khare, Soheil Nazar Shahsavani, Massoud Pedram
2021	J	`jnl`	NullaNet Tiny: Ultra-low-latency DNN Inference Through Fixed-function Combinational Logic. CoRR Mahdi Nazemi, Arash Fayyazi, Amirhossein Esmaili, Atharva Khare, Soheil Nazar Shahsavani, Massoud Pedram
2021	—	`conf`	qMC: A Formal Model Checking Verification Framework For Superconducting Logic. ACM Great Lakes Symposium on VLSI Mustafa Munir, Aswin Gopikanna, Arash Fayyazi, Massoud Pedram, Shahin Nazarian
2020	J	`jnl`	HIPE-MAGIC: A Technology-Aware Synthesis and Mapping Flow for HIghly Parallel Execution of Memristor-Aided LoGIC. CoRR Arash Fayyazi, Amirhossein Esmaili, Massoud Pedram
2020	A	`conf`	HIPE-MAGIC: a technology-aware synthesis and mapping flow for highly parallel execution of memristor-aided LoGIC. ISLPED Arash Fayyazi, Amirhossein Esmaili, Massoud Pedram
2020	J	`jnl`	Logic Verification of Ultra-Deep Pipelined Beyond-CMOS Technologies. CoRR Arash Fayyazi, Shahin Nazarian, Massoud Pedram
2020	A	`conf`	SynergicLearning: Neural Network-Based Feature Extraction for Highly-Accurate Hyperdimensional Learning. ICCAD Mahdi Nazemi, Amirhossein Esmaili, Arash Fayyazi, Massoud Pedram
2020	J	`jnl`	SynergicLearning: Neural Network-Based Feature Extraction for Highly-Accurate Hyperdimensional Learning. CoRR Mahdi Nazemi, Amirhossein Esmaili, Arash Fayyazi, Massoud Pedram
2019	—	`conf`	A Hybrid Framework for Functional Verification using Reinforcement Learning and Deep Learning. ACM Great Lakes Symposium on VLSI Karunveer Singh, Rishabh Gupta, Vikram Gupta, Arash Fayyazi, Massoud Pedram, Shahin Nazarian
2019	—	`conf`	CSrram: Area-Efficient Low-Power Ex-Situ Training Framework for Memristive Neuromorphic Circuits Based on Clustered Sparsity. ISVLSI Arash Fayyazi, Souvik Kundu, Shahin Nazarian, Peter A. Beerel, Massoud Pedram
2019	A	`conf`	Deep Learning-Based Circuit Recognition Using Sparse Mapping and Level-Dependent Decaying Sum Circuit Representations. DATE Arash Fayyazi, Soheil Shababi, Pierluigi Nuzzo, Shahin Nazarian, Massoud Pedram
2019	J	`jnl`	OCTAN: An On-Chip Training Algorithm for Memristive Neuromorphic Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. Mohammad Ansari, Arash Fayyazi, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram
2019	J	`jnl`	VeriSFQ - A Semi-formal Verification Framework and Benchmark for Single Flux Quantum Technology. CoRR Alvin D. Wong, Kevin Su, Hang Sun, Arash Fayyazi, Massoud Pedram, Shahin Nazarian
2019	—	`conf`	VeriSFQ: A Semi-formal Verification Framework and Benchmark for Single Flux Quantum Technology. ISQED Alvin D. Wong, Kevin Su, Hang Sun, Arash Fayyazi, Massoud Pedram, Shahin Nazarian
2019	C	`conf`	qCG: A Low-Power Multi-Domain SFQ Logic Design and Verification Framework. ICCD Shahin Nazarian, Arash Fayyazi, Massoud Pedram
2018	J	`jnl`	An Ultra Low-Power Memristive Neuromorphic Circuit for Internet of Things Smart Sensors. IEEE Internet Things J. Arash Fayyazi, Mohammad Ansari, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram
2018	J	`jnl`	PHAX: Physical Characteristics Aware Ex-Situ Training Framework for Inverter-Based Memristive Neuromorphic Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mohammad Ansari, Arash Fayyazi, Ali BanaGozar, Mohammad Ali Maleki, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram
2018	J	`jnl`	SpRRAM: A Predefined Sparsity Based Memristive Neuromorphic Circuit for Low Power Application. CoRR Arash Fayyazi, Souvik Kundu, Shahin Nazarian, Peter A. Beerel, Massoud Pedram
2016	A	`conf`	SEERAD: A high speed yet energy-efficient rounding-based approximate divider. DATE Reza Zendegani, Mehdi Kamal, Arash Fayyazi, Ali Afzali-Kusha, Saeed Safari, Massoud Pedram