Anuradha Agarwal

11 papers A* 1A 3C 2Journal 1Unranked 4
YearRankTypeTitle / Venue / Authors
2024 J jnl
pyCapsid: identifying dominant dynamics and quasi-rigid mechanical units in protein shells.
Bioinform.
Colin Brown, Anuradha Agarwal, Antoni Luque
2023 C conf
6-channel CMOS-based instrument for optical absorption spectroscopy and chemical identification.
ISCAS
Francesco Zanetto, Katherine Stoll, Samuel Serna, Anuradha Agarwal, Marco Sampietro, Giorgio Ferrari
2019 — conf
Energy Efficiency of Microring Resonator (MRR)-Based Binary Decision Diagram (BDD) Circuits.
ICRC
Ozan Yakar, Yuqi Nie, Kazumi Wada, Anuradha Agarwal, Ilke Ercan
2005 — conf
Accuracy driven performance macromodeling of feasible regions during synthesis of analog circuits.
ACM Great Lakes Symposium on VLSI
Anuradha Agarwal, Glenn Wolfe, Ranga Vemuri
2005 — conf
Fast Analog Circuit Synthesis Using Multiparameter Sensitivity Analysis Based on Element-Coefficient Diagrams.
ISVLSI
Huiying Yang, Anuradha Agarwal, Ranga Vemuri
2005 A conf
Hierarchical performance macromodels of feasible regions for synthesis of analog and RF circuits.
ICCAD
Anuradha Agarwal, Ranga Vemuri
2005 C conf
Layout-Aware RF Circuit Synthesis Driven by Worst Case Parasitic Corners.
ICCD
Anuradha Agarwal, Ranga Vemuri
2004 — conf
A high level language for pre-layout extraction in parasite-aware analog circuit synthesis.
ACM Great Lakes Symposium on VLSI
Raoul F. Badaoui, Hemanth Sampath, Anuradha Agarwal, Ranga Vemuri
2004 A conf
Accurate Estimation of Parasitic Capacitances in Analog Circuits.
DATE
Anuradha Agarwal, Hemanth Sampath, Veena Yelamanchili, Ranga Vemuri
2004 A* conf
Fast and accurate parasitic capacitance models for layout-aware.
DAC
Anuradha Agarwal, Hemanth Sampath, Veena Yelamanchili, Ranga Vemuri
2004 A conf
Fast, Layout-Inclusive Analog Circuit Synthesis using Pre-Compiled Parasitic-Aware Symbolic Performance Models.
DATE
Mukesh Ranjan, Wim Verhaegen, Anuradha Agarwal, Hemanth Sampath, Ranga Vemuri, Georges G. E. Gielen