Antonio Núñez

53 papers A 5C 6Misc 1Journal 24Unranked 17

Year	Rank	Type	Title / Venue / Authors
2019	—	`conf`	Deep Packet Inspection Through Virtual Platforms using System-On-Chip FPGAs. DCIS Raquel León, Adrián Domínguez, Pedro P. Carballo, Antonio Núñez
2017	—	`conf`	Programmable SoC platform for deep packet inspection using enhanced Boyer-Moore algorithm. ReCoSoC Adrián Domínguez, Pedro P. Carballo, Antonio Núñez
2014	J	`jnl`	A two-phase design space exploration strategy for system-level real-time application mapping onto MPSoC. Microprocess. Microsystems Zai Jian Jia, Antonio Núñez, Tomás Bautista, Andy D. Pimentel
2013	J	`jnl`	A system-level infrastructure for multidimensional MP-SoC design space co-exploration. ACM Trans. Embed. Comput. Syst. Zai Jian Jia, Tomás Bautista, Antonio Núñez, Andy D. Pimentel, Mark Thompson
2013	C	`conf`	Contributions to visualization algorithm enabling GPU-accelerated image displaying for dual panel high dynamic range LCD display. ISPA Tomasz Szydzik, Antonio Núñez, Lode De Paepe, Luigi Albani
2013	C	`conf`	Scalable Video Coding Deblocking Filter FPGA and ASIC Implementation Using High-Level Synthesis Methodology. DSD Pedro P. Carballo, Omar Espino, Romén Neris, Pedro Hernandez-Fernandez, Tomasz Szydzik, Antonio Núñez
2011	C	`conf`	A Low Memory Requirements Execution Flow for the Non-Uniform Grid Projection Super-Resolution Algorithm. ISM Tomasz Szydzik, Gustavo M. Callicó, Antonio Núñez
2011	J	`jnl`	Efficient FPGA implementation of a high-quality super-resolution algorithm with real-time performance. IEEE Trans. Consumer Electron. Tomasz Szydzik, Gustavo M. Callicó, Antonio Núñez
2010	—	`conf`	NASA: A generic infrastructure for system-level MP-SoC design space exploration. ESTIMedia Zai Jian Jia, Andy D. Pimentel, Mark Thompson, Tomás Bautista, Antonio Núñez
2009	C	`ed.`	12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2009, 27-29 August 2009, Patras, Greece DSD Antonio Núñez, Pedro P. Carballo
2009	—	`conf`	Real-time visual tracking system modelling in MPSoC using platform based design. Real-Time Image and Video Processing Zai Jian Jia, Tomás Bautista, Antonio Núñez, Cayetano Guerra, Mario Hernández
2008	—	`conf`	Design Space Exploration and Performance Analysis for the Modular Design of CVS in a Heterogeneous MPSoC. ReConFig Zai Jian Jia, Tomás Bautista, Antonio Núñez, Cayetano Guerra, Mario Hernández
2007	J	`jnl`	Embedded Systems for Portable and Mobile Video Platforms. EURASIP J. Embed. Syst. Leonel Augusto Sousa, Noel E. O'Connor, Marco Mattavelli, Antonio Núñez
2007	J	`jnl`	Towards a configurable SoC MPEG-4 advanced simple profile decoder. IET Comput. Digit. Tech. Luz García, Gustavo M. Callicó, Dácil Barreto, Víctor Reyes, Tomás Bautista, Antonio Núñez
2006	A	`conf`	A unified system-level modeling and simulation environment for MPSoC design: MPEG-4 decoder case study. DATE Víctor Reyes, Wido Kruijtzer, Tomás Bautista, Ghiath Alkadi, Antonio Núñez
2006	J	`jnl`	Advances in video coding for hand-held device implementation in networked electronic media. J. Real Time Image Process. Antonio Núñez
2006	J	`jnl`	Low-Cost Super-Resolution Algorithms Implementation Over a HW/SW Video Compression Platform. EURASIP J. Adv. Signal Process. Gustavo M. Callicó, Rafael Peset Llopis, Sebastián López, José Francisco López, Antonio Núñez, Ramanathan Sethuraman, Roberto Sarmiento
2006	C	`conf`	VIPACES, Verification Interface Primitives for the Development of AXI Compliant Elements and Systems. DSD Armando Sánchez-Peña, Pedro P. Carballo, Luz García, Antonio Núñez
2005	Misc	`conf`	A multicast inter-task communication protocol for embedded multiprocessor systems. CODES+ISSS Víctor Reyes, Tomás Bautista, Gustavo Marrero Callicó, Antonio Núñez, Wido Kruijtzer
2005	—	`conf`	Low-cost implementation of a super-resolution algorithm for real-time video applications. ISCAS (6) Sebastián López, Gustavo M. Callicó, José Francisco López, Roberto Sarmiento, Antonio Núñez
2003	—	`conf`	A Scalable Communication Platform for High Performance Multimedia Applications. ESTIMedia Víctor Reyes, Tomás Bautista, Antonio Núñez
2003	A	`conf`	A core for ambient and mobile intelligent imaging applications. ICME Jörn Jachalsky, Martin Wahler, Peter Pirsch, S. Capperon, Winfried Gehrke, W. M. Kruijtzer, Antonio Núñez
2003	J	`jnl`	A scalable single-chip multi-processor architecture with on-chip RTOS kernel. J. Syst. Archit. Bart D. Theelen, A. C. Verschueren, V. V. Reyes Suárez, M. P. J. Stevens, Antonio Núñez
2003	—	`conf`	Low-Cost and Real-Time Super-Resolution over a Video Encoder IP. ISQED Gustavo M. Callicó, Antonio Núñez, Rafael Peset Llopis, Ramanathan Sethuraman
2002	—	`conf`	Integrated Inductors Modeling and Tools for Automatic Selection and Layout Generation. ISQED José R. Sendra, Javier del Pino, Antonio Hernández, Javier Hernández, Jaime Aguilera, Andrés Garcia-Alonso, Antonio Núñez
2001	—	`conf`	A Compact Layout Technique for Reducing Switching Current Effects in High Speed Circuits. ISQED Juan A. Montiel-Nelson, V. de Armas, Roberto Sarmiento, Antonio Núñez
2001	—	`conf`	A compact layout technique to minimize high frequency switching effects in high speed circuits. ISCAS (4) Juan A. Montiel-Nelson, De de Armas, Roberto Sarmiento, Antonio Núñez, Saeid Nooshabadi
2001	J	`jnl`	Quantitative study of the impact of design and synthesis options on processor core performance. IEEE Trans. Very Large Scale Integr. Syst. Tomás Bautista, Antonio Núñez
2000	A	`conf`	A Single Phase Latch for High Speed GaAs Domino Circuits. DATE Saeid Nooshabadi, Juan A. Montiel-Nelson, Antonio Núñez, Roberto Sarmiento, Javier Sosa
2000	—	`conf`	Synthesis Experiments and Performance Metrics for Evaluating the Quality of IP Blocks and Megacells. ISQED Tomás Bautista, Antonio Núñez
1999	—	`conf`	Design of Efficient SPARC Cores for Embedded Systems. EUROMICRO Tomás Bautista, Antonio Núñez
1999	—	`conf`	Flexible design of SPARC cores: a quantitative study. CODES Tomás Bautista, Antonio Núñez
1999	A	`conf`	High Speed GaAs Subsystem Design using Feed Through Logic. DATE Juan A. Montiel-Nelson, Saeid Nooshabadi, V. de Armas, Roberto Sarmiento, Antonio Núñez
1999	—	`conf`	Low Power Techniques for Digital GaAs VLSI. Great Lakes Symposium on VLSI José Francisco López, Roberto Sarmiento, Antonio Núñez, Kamran Eshraghian, Stefan Lachowicz, Derek Abbott
1998	J	`jnl`	A CORDIC processor for FFT computation and its implementation using gallium arsenide technology. IEEE Trans. Very Large Scale Integr. Syst. Roberto Sarmiento, V. de Armas, José Francisco López, Juan A. Montiel-Nelson, Antonio Núñez
1998	A	`conf`	A Cell and Macrocell Compiler for GaAs VLSI Full-Custom Design. DATE Juan A. Montiel-Nelson, V. de Armas, Roberto Sarmiento, Antonio Núñez
1998	—	`conf`	OLYMPO: a GaAs compiler for VLSI design. ICECS Juan A. Montiel-Nelson, Valentin de Armas, Roberto Sarmiento, Antonio Núñez
1997	J	`jnl`	GaAs pseudodynamic latched logic for high performance processor cores. IEEE J. Solid State Circuits José Francisco López, Kamran Eshraghian, Roberto Sarmiento, Antonio Núñez, Derek Abbott
1997	J	`jnl`	Noise margin enhancement in GaAs ROM's using current mode logic. IEEE J. Solid State Circuits José Francisco López, Roberto Sarmiento, Kamran Eshraghian, Antonio Núñez
1993	J	`jnl`	An empirical model to estimate power consumption in GaAs DCFL/SDCFL circuits. Microprocess. Microprogramming Antonio Hernández, Luis Gómez, Antonio Núñez
1993	—	`conf`	GASTIM: A timing analyzer for GaAs digital circuits. EURO-DAC Antonio Hernández, Luis Gómez, Antonio Núñez
1993	J	`jnl`	Integer and control units for a GaAs 32-bit RISC processor. Microprocess. Microprogramming Pedro P. Carballo, Roberto Sarmiento, Antonio Núñez
1993	J	`jnl`	Letter from the short notes editors, Euromicro '92. Microprocess. Microprogramming Antonio Núñez, Don Fay
1993	J	`jnl`	Multiobjective optimization using analytical models of GaAs high-speed digital circuits. Microprocess. Microprogramming Luis Gómez, Antonio Hernández, Antonio Núñez
1993	J	`jnl`	Timing analysis for DCFL/SDCFL VLSI circuits. Microprocess. Microprogramming Luis Gómez, Antonio Hernández, Antonio Núñez
1993	C	`conf`	Using the ES2 library and SILOS simulator in the development of a single chip with three processors and analog IO. PDP Juan A. Montiel-Nelson, Valentin de Armas, D. Q. M. Fay, Antonio Núñez
1992	J	`jnl`	Timimg model for SDCFL digital circuits. Microprocess. Microprogramming Luis Gómez, Antonio Hernández, Antonio Núñez
1991	J	`jnl`	Accurate extraction of interconnect capacitances by adaptive mixed F.E.M. Microprocessing and Microprogramming Luis Ferragut, Rafael Montenegro, G. Winter, Antonio Núñez
1991	J	`jnl`	Program chairman's introduction. Microprocessing and Microprogramming Antonio Núñez
1991	J	`jnl`	Speed-area-power optimization for DCFL and SDCFL class of logic using ring notation. Microprocessing and Microprogramming K. Eshraghian, Roberto Sarmiento, Pedro P. Carballo, Antonio Núñez
1989	J	`jnl`	MVM: A GaAs microprocessor for critical real-time applications. Microprocessing and Microprogramming Antonio Núñez, David Carnal
1989	J	`jnl`	Some results in GaAs processor design using LSI integrated circuits. Microprocess. Microprogramming Antonio Núñez, Roberto Sarmiento, Pedro P. Carballo
1987	J	`jnl`	A survey of GaAs computer designs. Microprocess. Microprogramming Antonio Núñez