Antonio Lloris-Ruíz

28 papers B 6C 1Misc 3Journal 9Unranked 9
YearRankTypeTitle / Venue / Authors
2017 J jnl
A new area-efficient BCD-digit multiplier.
Digit. Signal Process.
Encarnación Castillo, Antonio Lloris-Ruíz, Diego Pedro Morales, Luis Parrilla, Antonio García, Guillermo Botella
2016 J jnl
Comments on "Fast architecture for decimal digit multiplication".
Microprocess. Microsystems
Encarnación Castillo, Antonio Lloris-Ruíz, Antonio García, Luis Parrilla, Diego Pedro Morales
2007 J jnl
IPP@HDL: Efficient Intellectual Property Protection Scheme for IP Cores.
IEEE Trans. Very Large Scale Integr. Syst.
Encarnación Castillo, Uwe Meyer-Bäse, Antonio García, Luis Parrilla, Antonio Lloris-Ruíz
2007 B conf
Intellectual Property Protection of HDL IP Cores Through Automated Sognature Hosting.
FPL
Encarnación Castillo, Luis Parrilla, Antonio García, Uwe Meyer-Bäse, Antonio Lloris-Ruíz
2006 B conf
IPP Watermarking Technique for IP Core Protection on FPL Devices.
FPL
Encarnación Castillo, Luis Parrilla, Antonio García, Antonio Lloris-Ruíz, Uwe Meyer-Bäse
2005 — conf
Efficient Clock Distribution Scheme for VLSI RNS-Enabled Controllers.
PATMOS
Daniel González, Luis Parrilla, Antonio García, Encarnación Castillo, Antonio Lloris-Ruíz
2005 B conf
Efficient Embedded FPL Resource Usage for RNS-based Polyphase DWT Filter Banks.
FPL
Antonio García, Javier Ramírez, Uwe Meyer-Bäse, Encarnación Castillo, Antonio Lloris-Ruíz
2004 B conf
Intellectual Property Protection for RNS Circuits on FPGAs.
FPL
Luis Parrilla, Encarnación Castillo, Antonio García, Antonio Lloris-Ruíz
2003 J jnl
Design and Implementation of High-Performance RNS Wavelet Processors Using Custom IC Technologies.
J. VLSI Signal Process.
Javier Ramírez, Uwe Meyer-Bäse, Fred J. Taylor, Antonio García, Antonio Lloris-Ruíz
2003 B conf
Design and Implementation of RNS-Based Adaptive Filters.
FPL
Javier Ramírez, Uwe Meyer-Bäse, Antonio García, Antonio Lloris-Ruíz
2003 J jnl
Implementation of RNS-Based Distributed Arithmetic Discrete Wavelet Transform Architectures Using Field-Programmable Logic.
J. VLSI Signal Process.
Javier Ramírez, Antonio García, Uwe Meyer-Bäse, Fred J. Taylor, Antonio Lloris-Ruíz
2002 — conf
A New Methodology for Efficient Synchronization of RNS-Based VLSI Systems.
PATMOS
Daniel González, Antonio García, Graham A. Jullien, Javier Ramírez, Luis Parrilla, Antonio Lloris-Ruíz
2001 Misc conf
Design of RNS-based distributed arithmetic DWT filterbanks.
ICASSP
Javier Ramírez, Antonio García, Uwe Meyer-Bäse, Fred J. Taylor, Pedro G. Fernández, Antonio Lloris-Ruíz
2001 — conf
Implementation of the one dimensional discrete cosine transform using the residue number system.
ICECS
Pedro G. Fernández, Javier Ramírez, Antonio García, Luis Parrilla, Antonio Lloris-Ruíz
2000 C conf
A new architecture to compute the discrete cosine transform using the quadratic residue number system.
ISCAS
Javier Ramírez Perez de Inestrosa, Antonio García, Pedro G. Fernández, Luis Parrilla, Antonio Lloris-Ruíz
2000 — conf
An efficient RNS architecture for the computation of discrete wavelet transforms on programmable devices.
EUSIPCO
Javier Ramírez, Antonio García, Pedro G. Fernández, Antonio Lloris-Ruíz
2000 B conf
Analysis of RNS-FPL Synergy for High Throughput DSP Applications: Discrete Wavelet Transform.
FPL
Javier Ramírez, Antonio García, Pedro G. Fernández, Luis Parrilla, Antonio Lloris-Ruíz
1999 J jnl
A Look-Up Scheme for Scaling in the RNS.
IEEE Trans. Computers
Antonio García, Antonio Lloris-Ruíz
1999 — conf
RNS implementation of FIR filters based on distributed arithmetic using field-programmable logic.
ISCAS (1)
Antonio García, Uwe Meyer-Bäse, Antonio Lloris-Ruíz, Fred J. Taylor
1999 — conf
Using PVM for Distributed Logic Minimization in a Network of Computers.
PVM/MPI
Luis Parrilla, Julio Ortega, Antonio Lloris-Ruíz
1998 — conf
Pipelined RNS multipliers: an application to scaling.
ICECS
Antonio García, Antonio Lloris-Ruíz
1998 — conf
Testability of AND-EXOR logic vs. AND-OR logic.
ICECS
Luis Parrilla, Julio Ortega, Antonio Lloris-Ruíz
1997 Misc conf
Modified Boltzmann Machine for an Efficient Distributed Implementation.
IWANN
Julio Ortega, Luis Parrilla, Alberto Prieto, Antonio Lloris-Ruíz, Carlos García Puntonet
1993 — conf
Entropic Minimization of Multiple-Valued Functions.
ISMVL
Antonio Lloris-Ruíz, Juan Francisco Gómez-Lopera, Ramón Román-Roldán
1993 J jnl
Generalized Hopfield Neural Network for Concurrent Testing.
IEEE Trans. Computers
Julio Ortega Lopera, Alberto Prieto, Antonio Lloris-Ruíz, Francisco J. Pelayo
1993 J jnl
Solution of Switching Equations Based on a Tabular Algebra.
IEEE Trans. Computers
Pablo P. Trabado, Antonio Lloris-Ruíz, Julio Ortega Lopera
1993 J jnl
Test-Pattern Generation Based on Reed-Muller Coefficients.
IEEE Trans. Computers
Julio Ortega Lopera, Antonio Lloris-Ruíz, Alberto Prieto, Francisco J. Pelayo
1991 Misc conf
Optimization Problems on Concurrent Testing Solved by Neural Networks.
IWANN
Julio Ortega, Alberto Prieto, Francisco J. Pelayo, Antonio Lloris-Ruíz, P. Martin-Smith