Anthony S. Wojcik

22 papers A* 3A 1C 1Journal 11Unranked 5
YearRankTypeTitle / Venue / Authors
2001 C conf
Efficient Algorithms for Subcircuit Enumeration and Classification for the Module Identification Problem.
ICCD
Jennifer L. White, Moon-Jung Chung, Anthony S. Wojcik, Travis E. Doom
2000 — conf
Candidate subcircuits for functional module identification in logic circuits.
ACM Great Lakes Symposium on VLSI
Jennifer L. White, Anthony S. Wojcik, Moon-Jung Chung, Travis E. Doom
1999 J jnl
An Application of Formal Analysis to Software in a Fault-Tolerant Environment.
IEEE Trans. Computers
Gregory H. Chisholm, Anthony S. Wojcik
1999 — conf
Design Recovery for Incomplete Combinational Logic.
Great Lakes Symposium on VLSI
Travis E. Doom, Anthony S. Wojcik, Moon-Jung Chung
1998 — conf
Identifying High-Level Components in Combinational Circuits.
Great Lakes Symposium on VLSI
Travis E. Doom, Jennifer L. White, Anthony S. Wojcik, Gregory H. Chisholm
1991 — conf
Reasoning About Digital Systems.
ISMVL
Anthony S. Wojcik
1989 J jnl
A General, Constructive Approach to Fault-Tolerant Design Using Redundancy.
IEEE Trans. Computers
Ahmed E. Barbour, Anthony S. Wojcik
1989 J jnl
An Automated Reasoning Problem Associated with Proving Claims about Programs Using Floyd-Hoare Inductive Assertin Methods.
J. Autom. Reason.
Gregory H. Chisholm, Brian T. Smith, Anthony S. Wojcik
1989 J jnl
Formal Verification of Fault Tolerance Using Theorem-Proving Techniques.
IEEE Trans. Computers
Joseph Kljaich Jr., Brian T. Smith, Anthony S. Wojcik
1988 J jnl
Modular Decomposition of Combinational Multiple-Valued Circuits.
IEEE Trans. Computers
Kwang-Ya Fang, Anthony S. Wojcik
1987 A* conf
A Rule-Based Circuit Representation for Automated CMOS Design and Verification.
DAC
Ching-Farn Eric Wu, Anthony S. Wojcik, Lionel M. Ni
1986 A conf
An Artificial Intelligence Based Implementation of the P-Algorithm for Test Generation.
ITC
Nagendra C. E. Srinivas, Anthony S. Wojcik, Ytzhak H. Levendel
1985 J jnl
Automated Synthesis of Combinational Logic Using Theorem-Proving Techniques.
IEEE Trans. Computers
Waldo C. Kabat, Anthony S. Wojcik
1984 A* conf
A formal design verification system based on an automated reasoning system.
DAC
Anthony S. Wojcik, Joseph Kljaich Jr., Nagendra C. E. Srinivas
1983 J jnl
Automated Design of Multiple-Valued Logic Circuits by Automatic Theorem Proving Techniques.
IEEE Trans. Computers
Witold S. Wojciechowski, Anthony S. Wojcik
1983 A* conf
Formal design verification of digital systems.
DAC
Anthony S. Wojcik
1981 J jnl
On the Design of 4-Valued Digital Systems.
IEEE Trans. Computers
Waldo C. Kabat, Anthony S. Wojcik
1980 J jnl
On the Design of Three-Valued Asynchronous Modules.
IEEE Trans. Computers
Anthony S. Wojcik, Kwang-Ya Fang
1978 — conf
Parallel and serial decompositions of multi-valued sequential machines.
MVL
T. C. Yang, Anthony S. Wojcik
1974 J jnl
An Analysis of Some Relationships Between Post and Boolean Algebras.
J. ACM
Anthony S. Wojcik, Gernot Metze
1971 J jnl
On the Cost of Base N Adders.
IEEE Trans. Computers
Anthony S. Wojcik, Gernot Metze
1971 — —
Relationships Between Post and Boolean Algebras With Application to Multi-Valued Switching Theory
Anthony S. Wojcik