Annajirao Garimella

14 papers C 1Misc 5Journal 1Unranked 7
YearRankTypeTitle / Venue / Authors
2018 Misc conf
Flipped Voltage Follower Based Low Dropout (LDO) Voltage Regulators: A Tutorial Overview.
VLSID
Punith R. Surkanti, Annajirao Garimella, Paul M. Furth
2017 — conf
On the analysis of low output impedance characteristic of flipped voltage follower (FVF) and FVF LDOs.
MWSCAS
Punith R. Surkanti, Annajirao Garimella, Mahender Manda, Paul M. Furth
2015 — conf
Voltage buffer compensation using Flipped Voltage Follower in a two-stage CMOS op-amp.
MWSCAS
Sri Harsh Pakala, Mahender Manda, Punith R. Surkanti, Annajirao Garimella, Paul M. Furth
2012 — conf
A 22dB PSRR enhancement in a two-stage CMOS opamp using tail compensation.
CICC
Paul M. Furth, Sri Harsh Pakala, Annajirao Garimella, Chaitanya Mohan
2012 Misc conf
Embedded Tutorial ET1: Pole-Zero Analysis of Low-Dropout (LDO) Regulators: A Tutorial Overview.
VLSI Design
Annajirao Garimella, Punith R. Surkanti, Paul M. Furth
2012 — conf
Low dropout (LDO) voltage regulator design using split-length compensation.
MWSCAS
Paul M. Furth, Nitya R. Thota, Venkat Harish Nammi, Annajirao Garimella
2012 Misc conf
Pole-Zero Analysis of Low-Dropout (LDO) Regulators: A Tutorial Overview.
VLSI Design
Annajirao Garimella, Punith R. Surkanti, Paul M. Furth
2010 J jnl
Reverse Nested Miller Compensation Using Current Buffers in a Three-Stage LDO.
IEEE Trans. Circuits Syst. II Express Briefs
Annajirao Garimella, M. Wasequr Rashid, Paul M. Furth
2010 C conf
Single Miller compensation using inverting current buffer for multi-stage amplifiers.
ISCAS
Annajirao Garimella, M. Wasequr Rashid, Paul M. Furth
2009 — conf
A 1.21V, 100mA, 0.1µF-10µF output capacitor low drop-out voltage regulator for SoC applications.
ICECS
Annajirao Garimella, Paul M. Furth
2008 Misc conf
An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators.
VLSI Design
Jaime Ramírez-Angulo, Lalitha Mohana Kalyani-Garimella, Annajirao Garimella, Sri Raga Sudha Garimella, Antonio J. López-Martín, Ramón González Carvajal
2007 — conf
Low voltage gain boosting schemes for one stage operational amplifiers.
ECCTD
Jaime Ramírez-Angulo, Annajirao Garimella, Lalitha Mohana Kalyani-Garimella, Milind S. Sawant, Antonio Lopez-Martin, Ramón González Carvajal
2006 — conf
Low-Voltage Universal Cell (LVUC): A Compact Analog/Digital Logic Block for Mixed Signal FPGAs.
CICC
Lalitha Mohana Kalyani-Garimella, Annajirao Garimella, Jaime Ramírez-Angulo, Ramón González Carvajal, Antonio J. López-Martín
2003 Misc conf
VLSI Implementation of Online Digital Watermarking Technique with Difference Encoding for 8-Bit Gray Scale Images.
VLSI Design
Annajirao Garimella, M. V. V. Satyanarayana, R. Satish Kumar, P. S. Murugesh, U. C. Niranjan