Ankesh Jain

31 papers A* 1C 6Misc 1Journal 10Unranked 13
YearRankTypeTitle / Venue / Authors
2026 J jnl
An Independently Programmable Multioutput SAR SC DC-DC Converter.
IEEE Trans. Very Large Scale Integr. Syst.
Abhishek Pradhan, Ankesh Jain
2025 J jnl
A Single Stage Integrated Interface Circuit for Triboelectric Energy Harvester for Wearable Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Pratibha Verma, Dhiman Mallick, Ankesh Jain
2025 Misc conf
Analysis and Design Considerations for MASH of Noise Shaped SAR ADCs.
VLSID
R. Arundeepakvel, Ankesh Jain
2025 — conf
Analysis of Circuit Non-Idealities in Asynchronous Delta Sigma Modulator.
NewCAS
Shrikrishna Sharma, Ankesh Jain
2025 — conf
Embedded Bandpass Filtering for Characterization of High Resolution Continuous Time Delta Sigma Modulators.
NewCAS
Sayan Banerjee, Ankesh Jain
2025 J jnl
ΔΣ Modulators Employing MASH DSM DAC-Based Dual Quantization.
IEEE Trans. Circuits Syst. I Regul. Pap.
Ahmed Abdelaal, Michael Pietzko, John G. Kauffman, Ankesh Jain, Maurits Ortmanns
2024 — conf
Analysis and Design of High-Speed, Linear and Fullscale Input Swing Voltage to Time Converters.
PRIME
Shivani, Ankesh Jain
2024 J jnl
Hybrid Piezoelectric-Triboelectric Biomechanical Harvesting System for Wearable Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Pratibha Verma, Sourav Naval, Dhiman Mallick, Ankesh Jain
2023 A* conf
Graph of Circuits with GNN for Exploring the Optimal Design Space.
NeurIPS
Aditya Hemant Shahane, Saripilli Swapna Manjiri, Ankesh Jain, Sandeep Kumar
2023 — conf
Modified Gm-Free Assisted Opamp Technique in Continuous Time Delta Sigma Modulators.
APCCAS
Sayan Banerjee, Ankesh Jain
2021 — conf
Electrical Energy Injection using Hybrid SECE for High Performance Nonlinear Mechanical Energy Harvesting.
MWSCAS
Jatin Sharma, Pratibha Verma, Dhiman Mallick, Ankesh Jain
2021 — conf
High speed Continuous-time Delta Sigma Modulators for Wide-band Applications: A review paper.
ISOCC
Ankesh Jain
2020 J jnl
A 76.6-dB-SNDR 50-MHz-BW 29.2-mW Multi-Bit CT Sturdy MASH With DAC Non-Linearity Tolerance.
IEEE J. Solid State Circuits
Liang Qi, Ankesh Jain, Dongyang Jiang, Sai-Weng Sin, Rui Paulo Martins, Maurits Ortmanns
2020 — conf
Reduction of the Weight-Decay Rate of Volatile Memory Synapses in an Analog Hardware Neural Network for Accurate and Scalable On-Chip Learning.
ICONS
Janak Sharda, Nilabjo Dey, Ankesh Jain, Debanjan Bhowmik
2020 C conf
System Level Modeling and Optimization of Hybrid Vibration Energy Harvesters.
ISCAS
Mounika Kundurthi, Dhiman Mallick, Ankesh Jain
2019 — conf
A 76.6dB-SNDR 50MHz-BW 29.2mW Noise-Coupling-Assisted CT Sturdy MASH ΔΣ Modulator with 1.5b/4b Quantizers in 28nm CMOS.
ISSCC
Liang Qi, Ankesh Jain, Dongyang Jiang, Sai-Weng Sin, Rui Paulo Martins, Maurits Ortmanns
2019 — conf
An Integrated Readout for Current Sensing based on a Σ∆ Modulator with Switched Capacitor Feedback.
ESSCIRC
Mahdi Rajabzadeh, Matthias Häberle, Ankesh Jain, Maurits Ortmanns
2019 C conf
Effective Filtering of Requantization Error in Dual Quantized CTDSM using FIR DAC.
ISCAS
Ankesh Jain, Ahmed Abdelaal, Maurits Ortmanns
2019 J jnl
Input Referred Comparator Noise in SAR ADCs.
IEEE Trans. Circuits Syst. II Express Briefs
Yanquan Luo, Ankesh Jain, Johannes Wagner, Maurits Ortmanns
2018 J jnl
A 0.4-V G
IEEE J. Solid State Circuits
Lishan Lv, Ankesh Jain, Xiong Zhou, Joachim Becker, Qiang Li, Maurits Ortmanns
2018 C conf
A High-Resolution Delta-Sigma D/A Converter Architecture with High Tolerance to DAC Mismatch.
ISCAS
Yanquan Luo, Liang Qi, Ankesh Jain, Maurits Ortmanns
2018 J jnl
Continuous-Time Delta-Sigma Modulators With Time-Interleaved FIR Feedback.
IEEE Trans. Circuits Syst. I Regul. Pap.
Ankesh Jain, Shanthi Pavan
2018 C conf
Gain Mismatch Insensitive Time-Interleaved DAC for CT Delta Sigma Modulator by application of a Three-State DAC.
ISCAS
Ankesh Jain, Maurits Ortmanns
2018 C conf
Interferer Induced Jitter Reduction in Bandpass CT ΣΔ Modulators for Receiver Applications.
ISCAS
Jiazuo Chi, Ankesh Jain, Jens Sauerbrey, Joachim Becker, Maurits Ortmanns
2017 — conf
An Efficient Self-Routing and Non-Blocking Interconnection Network on Chip.
NoCArc@MICRO
Tripti Jain, Klaus Schneider, Ankesh Jain
2017 — conf
Deriving concentrators from binary sorters using half cleaners.
ReConFig
Tripti Jain, Klaus Schneider, Ankesh Jain
2016 — conf
A 13.3 mW 60 MHz bandwidth, 76 dB DR 6 GS/s CTΔΣM with time interleaved FIR feedback.
VLSI Circuits
Ankesh Jain, Shanthi Pavan
2014 J jnl
Characterization Techniques for High Speed Oversampled Data Converters.
IEEE Trans. Circuits Syst. I Regul. Pap.
Ankesh Jain, Shanthi Pavan
2013 C conf
Improved characterization of high speed continuous-time ΔΣ modulators using a duobinary test interface.
ISCAS
Ankesh Jain, Shanthi Pavan
2012 J jnl
Analysis and Design of a High Speed Continuous-time ΔΣ Modulator Using the Assisted Opamp Technique.
IEEE J. Solid State Circuits
Ankesh Jain, Muthusubramaniam Venkatesan, Shanthi Pavan
2011 — conf
A 4mW 1 GS/s continuous-time ΔΣ modulator with 15.6MHz bandwidth and 67 dB dynamic range.
ESSCIRC
Ankesh Jain, Muthusubramanian Venkateswaran, Shanthi Pavan