Angel Fernandez Herrero

11 papers B 1C 1Journal 5Unranked 4
YearRankTypeTitle / Venue / Authors
2012 J jnl
A reduced complexity scheme for carrier frequency synchronization in uplink 802.16e OFDMA.
EURASIP J. Adv. Signal Process.
Javier Gonzalez Bayon, Angel Fernandez Herrero, Carlos Carreras
2012 J jnl
Evaluation of Rapid Prototyping solutions for a 802.16d frequency Offset estimation Scheme.
J. Circuits Syst. Comput.
Javier Gonzalez Bayon, Angel Fernandez Herrero, Carlos Carreras
2010 — conf
Fast Fixed-Point Optimization of DSP Algorithms.
VLSI-SoC (Selected Papers)
Gabriel Caffarena, Angel Fernandez Herrero, Juan A. López, Carlos Carreras
2010 C conf
Fast fixed-point optimization of DSP algorithms.
VLSI-SoC
Gabriel Caffarena, Carlos Carreras, Juan A. López, Angel Fernandez Herrero
2010 J jnl
Improved schemes for tracking residual frequency offset in DVB-T systems.
IEEE Trans. Consumer Electron.
Javier Gonzalez Bayon, Angel Fernandez Herrero, Carlos Carreras
2010 J jnl
SQNR Estimation of Fixed-Point DSP Algorithms.
EURASIP J. Adv. Signal Process.
Gabriel Caffarena, Carlos Carreras, Juan A. López, Angel Fernandez Herrero
2010 — conf
SQNR estimation of non-linear fixed-point algorithms.
EUSIPCO
Gabriel Caffarena, Juan A. López, Angel Fernandez Herrero, Carlos Carreras
2008 — conf
A Web-Based Environment Providing Remote Access To FPGA Platforms For Teaching Digital Hardware Design.
e-Learning
Angel Fernandez Herrero, Ignacio Elguezábal, Marisa López-Vallejo
2008 J jnl
Design and Implementation of a Hardware Module for MIMO Decoding in a 4G Wireless Receiver.
VLSI Design
Alberto Jimenez-Pacheco, Angel Fernandez Herrero, Francisco Javier Casajús-Quirós
2006 — conf
Design and Implementation in FPGA of a MIMO Decoder for a 4G Wireless Receiver.
ICECS
Alberto Jimenez-Pacheco, Angel Fernandez Herrero, Javier Casajús-Quirós
2006 B conf
Design and Implementation of a Hardware Module for Equalisation in A 4G MIMO Receiver.
FPL
Angel Fernandez Herrero, Alberto Jimenez-Pacheco, Gabriel Caffarena, Javier Casajús-Quirós