Andrés Rodríguez

20 papers B 1Journal 15Unranked 4

Year	Rank	Type	Title / Venue / Authors
2023	J	`jnl`	SkyFlow: Heterogeneous streaming for skyline computation using FlowGraph and SYCL. Future Gener. Comput. Syst. Jose Carlos Romero, Angeles G. Navarro, Andrés Rodríguez, Rafael Asenjo
2022	J	`jnl`	Lightweight asynchronous scheduling in heterogeneous reconfigurable systems. J. Syst. Archit. Andrés Rodríguez, Angeles G. Navarro, Kris Nikov, José L. Núñez-Yáñez, Ruben Gran, Darío Suárez Gracia, Rafael Asenjo
2021	J	`jnl`	Efficient heterogeneous matrix profile on a CPU + High Performance FPGA with integrated HBM. Future Gener. Comput. Syst. Jose Carlos Romero, Angeles G. Navarro, Antonio Vilches, Andrés Rodríguez, Francisco Corbera, Rafael Asenjo
2020	J	`jnl`	High-Performance Simultaneous Multiprocessing for Heterogeneous System-on-Chip. CoRR Kris Nikov, Mohammad Hosseinabady, Rafael Asenjo, Andrés Rodríguez, Angeles G. Navarro, José L. Núñez-Yáñez
2020	J	`jnl`	Parallel multiprocessing and scheduling on the heterogeneous Xeon+FPGA platform. J. Supercomput. Andrés Rodríguez, Angeles G. Navarro, Rafael Asenjo, Francisco Corbera, Ruben Gran, Darío Suárez Gracia, José L. Núñez-Yáñez
2020	J	`jnl`	ScrimpCo: scalable matrix profile on commodity heterogeneous processors. J. Supercomput. Jose Carlos Romero, Antonio Vilches, Andrés Rodríguez, Angeles G. Navarro, Rafael Asenjo
2019	J	`jnl`	Correction to: Simultaneous multiprocessing in a software-defined heterogeneous FPGA. J. Supercomput. José L. Núñez-Yáñez, Sam Amiri, Mohammad Hosseinabady, Andrés Rodríguez, Rafael Asenjo, Angeles G. Navarro, Darío Suárez Gracia, Ruben Gran
2019	J	`jnl`	Designing a Project for Learning Industry 4.0 by Applying IoT to Urban Garden. Rev. Iberoam. de Tecnol. del Aprendiz. Javier Hormigo, Andrés Rodríguez
2019	J	`jnl`	Exploring heterogeneous scheduling for edge computing with CPU and FPGA MPSoCs. J. Syst. Archit. Andrés Rodríguez, Angeles G. Navarro, Rafael Asenjo, Francisco Corbera, Ruben Gran Tejero, Darío Suárez Gracia, José L. Núñez-Yáñez
2019	J	`jnl`	Heterogeneous parallel_for Template for CPU-GPU Chips. Int. J. Parallel Program. Angeles G. Navarro, Francisco Corbera, Andrés Rodríguez, Antonio Vilches, Rafael Asenjo
2019	J	`jnl`	Simultaneous multiprocessing in a software-defined heterogeneous FPGA. J. Supercomput. José L. Núñez-Yáñez, Sam Amiri, Mohammad Hosseinabady, Andrés Rodríguez, Rafael Asenjo, Angeles G. Navarro, Darío Suárez Gracia, Ruben Gran
2018	J	`jnl`	Energy-aware acceleration on GPUs: Findings on a bioinformatics benchmark. Sustain. Comput. Informatics Syst. Jesús Pérez, Andrés Rodríguez, Juan Francisco Chico, Domingo López-Rodríguez, Manuel Ujaldón
2018	J	`jnl`	Parallelizing Workload Execution in Embedded and High-Performance Heterogeneous Systems. CoRR José L. Núñez-Yáñez, Mohammad Hosseinabady, Moslem Amiri, Andrés Rodríguez, Rafael Asenjo, Angeles G. Navarro, Ruben Gran Tejero, Darío Suárez Gracia
2018	B	`conf`	Workload Partitioning Strategy for Improved Parallelism on FPGA-CPU Heterogeneous Chips. FPL Sam Amiri, Mohammad Hosseinabady, Andrés Rodríguez, Rafael Asenjo, Angeles G. Navarro, José L. Núñez-Yáñez
2017	—	`conf`	Simultaneous Multiprocessing on a FPGA+CPU Heterogeneous System-On-Chip. PARCO José L. Núñez-Yáñez, Mohammad Hosseinabady, Andrés Rodríguez, Rafael Asenjo, Angeles G. Navarro, Ruben Gran Tejero, Darío Suárez Gracia
2015	—	`conf`	Parallel Pipeline on Heterogeneous Multi-processing Architectures. TrustCom/BigDataSE/ISPA (3) Andrés Rodríguez, Angeles G. Navarro, Rafael Asenjo, Antonio Vilches, Francisco Corbera, María Jesús Garzarán
2015	—	`conf`	Pipeline Template for Streaming Applications on Heterogeneous Chips. PARCO Andrés Rodríguez, Angeles G. Navarro, Rafael Asenjo, Francisco Corbera, Antonio Vilches, María Jesús Garzarán
2015	J	`jnl`	Proceedings of the Workshop on High Performance Energy Efficient Embedded Systems (HIP3ES) 2015. CoRR Francisco Corbera, Andrés Rodríguez, Rafael Asenjo, Angeles G. Navarro, Antonio Vilches, María Jesús Garzarán, Ismat Chaib Draa, Jamel Tayeb, Smaïl Niar, Mikael Desertot, Daniel Gregorek, Robert Schmidt, Alberto García Ortiz, Pedro López-García, Rémy Haemmerlé, Maximiliano Klemen, Umer Liqat, Manuel V. Hermenegildo, Radim Vavrík, Albert Saà-Garriga, David Castells-Rufas, Jordi Carrabina
2015	J	`jnl`	Reducing overheads of dynamic scheduling on heterogeneous chips. CoRR Francisco Corbera, Andrés Rodríguez, Rafael Asenjo, Angeles G. Navarro, Antonio Vilches, María Jesús Garzarán
2015	—	`conf`	Workload distribution and balancing in FPGAs and CPUs with OpenCL and TBB. PARCO Rafael Asenjo, Angeles G. Navarro, Andrés Rodríguez, José L. Núñez-Yáñez