Andrew T. Yang

25 papers A* 7A 5C 1Misc 1Journal 7Unranked 3
YearRankTypeTitle / Venue / Authors
2016 — conf
Security in Internet of Things: Opportunities and Challenges.
IIKI
Wei Wei, Andrew T. Yang, Weisong Shi
2004 — conf
Full-chip vectorless dynamic power integrity analysis and verification against 100uV/100ps-resolution measurement.
CICC
Shen Lin, Makoto Nagata, Kenji Shimazaki, Kazuhiro Satoh, Masaya Sumita, Hiroyuki Tsujikawa, Andrew T. Yang
1998 J jnl
Preservation of passivity during RLC network reduction via split congruence transformations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kevin J. Kerns, Andrew T. Yang
1997 A* conf
Preservation of Passivity During RLC Network Reduction via Split Congruence Transformations.
DAC
Kevin J. Kerns, Andrew T. Yang
1997 J jnl
Stable and efficient reduction of large, multiport RC networks by pole analysis via congruence transformations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kevin J. Kerns, Andrew T. Yang
1996 A conf
Automatic netlist extraction for measurement-based characterization of off-chip interconnect.
ICCAD
Steven D. Corey, Andrew T. Yang
1996 A* conf
Stable and Efficient Reduction of Large, Multiport RC Networks by Pole Analysis via Congruence Transformations.
DAC
Kevin J. Kerns, Andrew T. Yang
1995 J jnl
Integrated circuit substrate coupling models based on Voronoi tessellation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ivan L. Wemple, Andrew T. Yang
1995 A* conf
Mixed-Signal Switching Noise Analysis Using Voronoi-Tessellated Substrate Macromodels.
DAC
Ivan L. Wemple, Andrew T. Yang
1995 J jnl
STYLE: a statistical design approach based on nonparametric performance macromodeling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Julie Chen, Andrew T. Yang
1995 A conf
Stable and efficient reduction of substrate model networks using congruence transforms.
ICCAD
Kevin J. Kerns, Ivan L. Wemple, Andrew T. Yang
1994 J jnl
An efficient nonquasi-static diode model for circuit simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Andrew T. Yang, Yu Liu, Jack T. Yao
1993 — conf
A consistent nonlinear simulation environment based on improved harmonic balance techniques.
EURO-DAC
Jack T. Yao, Andrew T. Yang
1993 A* conf
An Efficient Non-Quasi-Static Diode Model for Circuit Simulation.
DAC
Andrew T. Yang, Yu Liu, Jack T. Yao, R. R. Daniels
1993 A conf
Style: a technology-independent approach to statistical design.
ICCAD
Julie Chen, Andrew T. Yang
1993 J jnl
Switch-level timing simulation of bipolar ECL circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Andrew T. Yang, Yu-Hsu Chang, Daniel G. Saab, Ibrahim N. Hajj
1992 A conf
Analytic macromodeling and simulation fo tightly-coupled mixed analog-digital circuits.
ICCAD
Yu-Hsu Chang, Andrew T. Yang
1992 J jnl
Physical timing modeling for bipolar VLSI.
IEEE J. Solid State Circuits
Andrew T. Yang, Yu-Hsu Chang
1991 A conf
Bipolar Timing Modeling Including Interconnects Based on Parametric Correction.
ICCAD
Andrew T. Yang, Yu-Hsu Chang
1991 Misc conf
Fault modeling and testing of self-timed circuits.
VTS
Stanford S. Guillory, Daniel G. Saab, Andrew T. Yang
1991 A* conf
Modeling and Simulation of High-Frequency Integrated Circuits Based on Scattering Parameters.
DAC
Andrew T. Yang, C. H. Chan, Jack T. Yao, R. R. Daniels, J. P. Harrang
1989 A* conf
iSMILE: A Novel Circuit Simulation Program with Emphasis on New Device Model Development.
DAC
Andrew T. Yang, S. M. Kang
1989 — —
iSMILE: An integrated system for device model design, parameter extraction, and circuit simulation
Andrew T. Yang
1988 C conf
Computer-aided simulation of optical interconnects for high-speed digital systems.
ICCD
Andrew T. Yang, D. S. Gao, S. M. Kang
1988 A* conf
Delay Modeling and Time of Bipolar Digital Circuits.
DAC
Daniel G. Saab, Andrew T. Yang, Ibrahim N. Hajj