Andrew Boutros

39 papers A 2B 7Misc 4Journal 18Unranked 8

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Corrigendum: VTR 9: Open-Source CAD for Fabric and Beyond FPGA Architecture Exploration. ACM Trans. Reconfigurable Technol. Syst. Mohamed A. Elgammal, Amin Mohaghegh, Soheil Gholami Shahrouz, Fatemehsadat Mahmoudi, Fahrican Kosar, Kimia Talaei, Joshua Fife, Daniel Khadivi, Kevin E. Murray, Andrew Boutros, Kenneth B. Kent, Jeffrey B. Goeders, Vaughn Betz
2025	B	`conf`	Double Duty: FPGA Architecture to Enable Concurrent LUT and Adder Chain Usage. FPL Junius Pun, Xilai Dai, Grace Zgheib, Mahesh A. Iyer, Andrew Boutros, Vaughn Betz, Mohamed S. Abdelfattah
2025	J	`jnl`	Double Duty: FPGA Architecture to Enable Concurrent LUT and Adder Chain Usage. CoRR Junius Pun, Xilai Dai, Grace Zgheib, Mahesh A. Iyer, Andrew Boutros, Vaughn Betz, Mohamed S. Abdelfattah
2025	J	`jnl`	Field-Programmable Gate Array Architecture for Deep Learning: Survey and Future Directions. Proc. IEEE Andrew Boutros, Aman Arora, Vaughn Betz
2025	J	`jnl`	VTR 9: Open-Source CAD for Fabric and Beyond FPGA Architecture Exploration. ACM Trans. Reconfigurable Technol. Syst. Mohamed A. Elgammal, Amin Mohaghegh, Soheil Gholami Shahrouz, Fatemehsadat Mahmoudi, Fahrican Kosar, Kimia Talaei, Joshua Fife, Daniel Khadivi, Kevin E. Murray, Andrew Boutros, Kenneth B. Kent, Jeffrey B. Goeders, Vaughn Betz
2024	B	`conf`	A Software-Programmable Neural Processing Unit for Graph Neural Network Inference on FPGAs. FPL Taikun Zhang, Andrew Boutros, Sergey Gribok, Kwadwo Boateng, Vaughn Betz
2024	J	`jnl`	Field-Programmable Gate Array Architecture for Deep Learning: Survey & Future Directions. CoRR Andrew Boutros, Aman Arora, Vaughn Betz
2024	J	`jnl`	High Throughput FPGA-Based Object Detection via Algorithm-Hardware Co-Design. ACM Trans. Reconfigurable Technol. Syst. Anupreetham Anupreetham, Mohamed Ibrahim, Mathew Hall, Andrew Boutros, Ajay Kuzhively, Abinash Mohanty, Eriko Nurvitadhi, Vaughn Betz, Yu Cao, Jae-sun Seo
2024	Misc	`conf`	Stay Flexible: A High-Performance FPGA NPU Overlay for Graph Neural Networks. FCCM Taikun Zhang, Andrew Boutros, Sergey Gribok, Kwadwo Boateng, Vaughn Betz
2023	J	`jnl`	A Fast and Flexible FPGA-based Accelerator for Natural Language Processing Neural Networks. ACM Trans. Archit. Code Optim. Suyeon Hur, Seongmin Na, Dongup Kwon, Joonsung Kim, Andrew Boutros, Eriko Nurvitadhi, Jangwoo Kim
2023	B	`conf`	A Whole New World: How to Architect Beyond-FPGA Reconfigurable Acceleration Devices? FPL Andrew Boutros, Stephen More, Vaughn Betz
2023	—	`conf`	Into the Third Dimension: Architecture Exploration Tools for 3D Reconfigurable Acceleration Devices. ICFPT Andrew Boutros, Fatemehsadat Mahmoudi, Amin Mohaghegh, Stephen More, Vaughn Betz
2023	J	`jnl`	Koios 2.0: Open-Source Deep Learning Benchmarks for FPGA Architecture and CAD Research. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Aman Arora, Andrew Boutros, Seyed Alireza Damghani, Karan Mathur, Vedant Mohanty, Tanmay Anand, Mohamed A. Elgammal, Kenneth B. Kent, Vaughn Betz, Lizy K. John
2023	Misc	`conf`	Placement Optimization for NoC-Enhanced FPGAs. FCCM Srivatsan Srinivasan, Andrew Boutros, Fatemehsadat Mahmoudi, Vaughn Betz
2023	J	`jnl`	RAD-Sim: Rapid Architecture Exploration for Novel Reconfigurable Acceleration Devices. CoRR Andrew Boutros, Eriko Nurvitadhi, Vaughn Betz
2022	J	`jnl`	Architecture and Application Co-Design for Beyond-FPGA Reconfigurable Acceleration Devices. IEEE Access Andrew Boutros, Eriko Nurvitadhi, Vaughn Betz
2022	J	`jnl`	FPGA-Based AI Smart NICs for Scalable Distributed AI Training Systems. IEEE Comput. Archit. Lett. Rui Ma, Evangelos Georganas, Alexander Heinecke, Sergey Gribok, Andrew Boutros, Eriko Nurvitadhi
2022	J	`jnl`	FPGA-based AI Smart NICs for Scalable Distributed AI Training Systems. CoRR Rui Ma, Evangelos Georganas, Alexander Heinecke, Andrew Boutros, Eriko Nurvitadhi
2022	B	`conf`	RAD-Sim: Rapid Architecture Exploration for Novel Reconfigurable Acceleration Devices. FPL Andrew Boutros, Eriko Nurvitadhi, Vaughn Betz
2022	J	`jnl`	Recurrent Neural Networks With Column-Wise Matrix-Vector Multiplication on FPGAs. IEEE Trans. Very Large Scale Integr. Syst. Zhiqiang Que, Hiroki Nakahara, Eriko Nurvitadhi, Andrew Boutros, Hongxiang Fan, Chenglong Zeng, Jiuxi Meng, Kuen Hung Tsoi, Xinyu Niu, Wayne Luk
2021	Misc	`conf`	Compute-Capable Block RAMs for Efficient Deep Learning Acceleration on FPGAs. FCCM Xiaowei Wang, Vidushi Goyal, Jiecao Yu, Valeria Bertacco, Andrew Boutros, Eriko Nurvitadhi, Charles Augustine, Ravi R. Iyer, Reetuparna Das
2021	B	`conf`	End-to-End FPGA-based Object Detection Using Pipelined CNN and Non-Maximum Suppression. FPL Anupreetham Anupreetham, Mohamed Ibrahim, Mathew Hall, Andrew Boutros, Ajay Kuzhively, Abinash Mohanty, Eriko Nurvitadhi, Vaughn Betz, Yu Cao, Jae-sun Seo
2021	B	`conf`	Koios: A Deep Learning Benchmark Suite for FPGA Architecture and CAD Research. FPL Aman Arora, Andrew Boutros, Daniel Rauch, Aishwarya Rajen, Aatman Borda, Seyed Alireza Damghani, Samidh Mehta, Sangram Kate, Pragnesh Patel, Kenneth B. Kent, Vaughn Betz, Lizy K. John
2021	J	`jnl`	Koios: A Deep Learning Benchmark Suite for FPGA Architecture and CAD Research. CoRR Aman Arora, Andrew Boutros, Daniel Rauch, Aishwarya Rajen, Aatman Borda, Seyed Alireza Damghani, Samidh Mehta, Sangram Kate, Pragnesh Patel, Kenneth B. Kent, Vaughn Betz, Lizy K. John
2021	—	`conf`	Specializing for Efficiency: Customizing AI Inference Processors on FPGAs. ICM Andrew Boutros, Eriko Nurvitadhi, Vaughn Betz
2020	—	`conf`	Beyond Peak Performance: Comparing the Real Performance of AI-Optimized FPGAs and GPUs. FPT Andrew Boutros, Eriko Nurvitadhi, Rui Ma, Sergey Gribok, Zhipeng Zhao, James C. Hoe, Vaughn Betz, Martin Langhammer
2020	J	`jnl`	FPGA Logic Block Architectures for Efficient Deep Learning Inference. ACM Trans. Reconfigurable Technol. Syst. Mohamed Eldafrawy, Andrew Boutros, Sadegh Yazdanshenas, Vaughn Betz
2020	—	`conf`	Neighbors From Hell: Voltage Attacks Against Deep Learning Accelerators on Multi-Tenant FPGAs. FPT Andrew Boutros, Mathew Hall, Nicolas Papernot, Vaughn Betz
2020	J	`jnl`	Neighbors From Hell: Voltage Attacks Against Deep Learning Accelerators on Multi-Tenant FPGAs. CoRR Andrew Boutros, Mathew Hall, Nicolas Papernot, Vaughn Betz
2019	A	`conf`	Evaluating and Enhancing Intel® Stratix® 10 FPGAs for Persistent Real-Time AI. FPGA Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, Andrew Boutros, Jaewoong Sim, Phillip Tomson, Huseyin Sumbul, Gregory K. Chen, Phil C. Knag, Raghavan Kumar, Ram Krishnamurthy, Debbie Marr, Sergey Gribok, Bogdan Pasca, Martin Langhammer, Aravind Dasu
2019	A	`conf`	Math Doesn't Have to be Hard: Logic Block Architectures to Enhance Low-Precision Multiply-Accumulate on FPGAs. FPGA Andrew Boutros, Mohamed Eldafrawy, Sadegh Yazdanshenas, Vaughn Betz
2019	—	`conf`	Scalable Low-Latency Persistent Neural Machine Translation on CPU Server with Multiple FPGAs. FPT Eriko Nurvitadhi, Mishali Naik, Andrew Boutros, Prerna Budhkar, Ali Jafari, Dongup Kwon, David Sheffield, Abirami Prabhakaran, Karthik Gururaj, Pranavi Appana
2019	Misc	`conf`	Why Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs. FCCM Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, Andrew Boutros, Jaewoong Sim, Phillip Tomson, Huseyin Sumbul, Gregory K. Chen, Phil C. Knag, Raghavan Kumar, Ram Krishnamurthy, Sergey Gribok, Bogdan Pasca, Martin Langhammer, Debbie Marr, Aravind Dasu
2018	B	`conf`	Embracing Diversity: Enhanced DSP Blocks for Low-Precision Deep Learning on FPGAs. FPL Andrew Boutros, Sadegh Yazdanshenas, Vaughn Betz
2018	J	`jnl`	You Cannot Improve What You Do not Measure: FPGA vs. ASIC Efficiency Gaps for Convolutional Neural Network Inference. ACM Trans. Reconfigurable Technol. Syst. Andrew Boutros, Sadegh Yazdanshenas, Vaughn Betz
2017	—	`conf`	Build fast, trade fast: FPGA-based high-frequency trading using high-level synthesis. ReConFig Andrew Boutros, Brett Grady, Mustafa Abbas, Paul Chow
2017	J	`jnl`	HW/SW Co-Design of the HOG algorithm on a Xilinx Zynq SoC. J. Parallel Distributed Comput. Jens Rettkowski, Andrew Boutros, Diana Göhringer
2017	—	`conf`	Hardware acceleration of novel chaos-based image encryption for IoT applications. ICM Andrew Boutros, Salma Hesham, Barbara Georgey, Mohamed A. Abd El Ghany
2015	—	`conf`	Real-time pedestrian detection on a xilinx zynq using the HOG algorithm. ReConFig Jens Rettkowski, Andrew Boutros, Diana Göhringer