Andrew A. Kennings

54 papers A* 2A 10B 5C 2Journal 13Unranked 17

Year	Rank	Type	Title / Venue / Authors
2020	J	`jnl`	Eh?Predictor: A Deep Learning Framework to Identify Detailed Routing Short Violations From a Placed Netlist. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Aysa Fakheri Tabrizi, Nima Karimpour Darav, Logan Rakai, Ismail Bustany, Andrew A. Kennings, Laleh Behjat
2019	A	`conf`	Multi-Commodity Flow-Based Spreading in a Commercial Analytic Placer. FPGA Nima Karimpour Darav, Andrew A. Kennings, Kristofer Vorwerk, Arun Kundu
2018	A*	`conf`	A machine learning framework to identify detailed routing short violations from a placed netlist. DAC Aysa Fakheri Tabrizi, Nima Karimpour Darav, Shuchang Xu, Logan Rakai, Ismail Bustany, Andrew A. Kennings, Laleh Behjat
2018	J	`jnl`	Eh?Legalizer: A High Performance Standard-Cell Legalizer Observing Technology Constraints. ACM Trans. Design Autom. Electr. Syst. Nima Karimpour Darav, Ismail S. Bustany, Andrew A. Kennings, David T. Westwick, Laleh Behjat
2018	J	`jnl`	Simple FPGA routing graph compression. CoRR Andrew A. Kennings
2017	—	`conf`	A Fast, Robust Network Flow-based Standard-Cell Legalization Method for Minimizing Maximum Movement. ISPD Nima Karimpour Darav, Ismail S. Bustany, Andrew A. Kennings, Laleh Behjat
2017	—	`conf`	Detailed routing violation prediction during placement using machine learning. VLSI-DAT Aysa Fakheri Tabrizi, Nima Karimpour Darav, Logan Rakai, Andrew A. Kennings, Laleh Behjat
2017	A	`conf`	ICCAD-2017 CAD contest in multi-deck standard cell legalization and benchmarks. ICCAD Nima Karimpour Darav, Ismail S. Bustany, Andrew A. Kennings, Ravi Mamidi
2016	—	`ch.`	Circuit Placement. Encyclopedia of Algorithms Andrew A. Kennings, Igor L. Markov
2016	J	`jnl`	Eh?Placer: A High-Performance Modern Technology-Driven Placer. ACM Trans. Design Autom. Electr. Syst. Nima Karimpour Darav, Andrew A. Kennings, Aysa Fakheri Tabrizi, David T. Westwick, Laleh Behjat
2016	—	`conf`	Routing-Aware Incremental Timing-Driven Placement. ISVLSI Jucemar Monteiro, Nima Karimpour Darav, Guilherme Flach, Mateus Fogaça, Ricardo Augusto da Luz Reis, Andrew A. Kennings, Marcelo O. Johann, Laleh Behjat
2015	—	`conf`	A Detailed Routing-Aware Detailed Placement Technique. ISVLSI Aysa Fakheri Tabrizi, Nima Karimpour Darav, Logan M. Rakai, Andrew A. Kennings, William Swartz, Laleh Behjat
2015	A	`conf`	An FPGA Implementation of a Timing-Error Tolerant Discrete Cosine Transform (Abstract Only). FPGA Yaoqiang Li, Pierce I-Jen Chuang, Andrew A. Kennings, Manoj Sachdev
2015	A	`conf`	High Performance Global Placement and Legalization Accounting for Fence Regions. ICCAD Nima Karimpour Darav, Andrew A. Kennings, David T. Westwick, Laleh Behjat
2015	—	`conf`	Runtime slack-deficit detection for a low-voltage DCT circuit. MWSCAS Yaoqiang Li, Pierce I-Jen Chuang, Andrew A. Kennings, Manoj Sachdev
2015	—	`conf`	The impact of industry-organized contests on EDA education. MSE Nima Karimpour Darav, Amin Farshidi, Aysa Fakheri Tabrizi, Emily Marasco, Amir Karbalaei, Andrew A. Kennings, Ismail S. Bustany, Laleh Behjat
2015	—	`conf`	Voltage-Boosted Synchronizers. ACM Great Lakes Symposium on VLSI Yaoqiang Li, Pierce I-Jen Chuang, Andrew A. Kennings, Manoj Sachdev
2014	C	`conf`	Detailed placement accounting for technology constraints. VLSI-SoC Andrew A. Kennings, Nima Karimpour Darav, Laleh Behjat
2012	—	`conf`	Analysis and evaluation of greedy thread swapping based dynamic power management for MPSoC platforms. ISQED Chirag Ravishankar, Sundaram Ananthanarayanan, Siddharth Garg, Andrew A. Kennings
2012	A	`conf`	EmPower: FPGA based emulation of dynamic power management algorithms for multi-core systems on chip (abstract only). FPGA Sundaram Ananthanarayanan, Chirag Ravishankar, Siddharth Garg, Andrew A. Kennings
2012	B	`conf`	EmPower: FPGA based rapid prototyping of dynamic power management algorithms for multi-processor systems on chip. FPL Chirag Ravishankar, Sundaram Ananthanarayanan, Siddharth Garg, Andrew A. Kennings
2012	J	`jnl`	FPGA Power Reduction by Guarded Evaluation Considering Logic Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Chirag Ravishankar, Jason Helge Anderson, Andrew A. Kennings
2012	C	`conf`	FPGA power reduction by guarded evaluation considering physical information. VLSI-SoC Chirag Ravishankar, Andrew A. Kennings, Jason Helge Anderson
2011	J	`jnl`	FPGA technology mapping with encoded libraries and staged priority cuts. ACM Trans. Reconfigurable Technol. Syst. Andrew A. Kennings, Kristofer Vorwerk, Arun Kundu, Val Pevzner, Andy Fox
2011	—	`conf`	Parallel FPGA technology mapping using multi-core architectures. CCECE Andrew A. Kennings, Chirag Ravishankar
2010	B	`conf`	Efficient FPGA Resynthesis Using Precomputed LUT Structures. FPL Andrew A. Kennings, Alan Mishchenko, Kristofer Vorwerk, Val Pevzner, Arun Kundu
2010	J	`jnl`	Power minimisation during field programmable gate array placement. IET Comput. Digit. Tech. Kristofer Vorwerk, Andrew A. Kennings, Val Pevzner, Arun Kundu, Madhu Raman, Julien Dunoyer, Yaun-shung Hsu
2009	A	`conf`	FPGA technology mapping with encoded libraries andstaged priority cuts. FPGA Andrew A. Kennings, Kristofer Vorwerk, Arun Kundu, Val Pevzner, Andy Fox
2009	J	`jnl`	Improving Simulated Annealing-Based FPGA Placement With Directed Moves. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kristofer Vorwerk, Andrew A. Kennings, Jonathan W. Greene
2009	—	`conf`	Physical optimization for FPGAs using post-placement topology rewriting. ISPD Val Pevzner, Andrew A. Kennings, Andy Fox
2008	B	`conf`	A technique for minimizing power during FPGA placement. FPL Kristofer Vorwerk, Madhu Raman, Julien Dunoyer, Yaun-Chung Hsu, Arun Kundu, Andrew A. Kennings
2008	—	`ch.`	Circuit Placement. Encyclopedia of Algorithms Andrew A. Kennings, Igor L. Markov
2008	—	`ch.`	Force-Directed and Other Continuous Placement Methods. Handbook of Algorithms for Physical Design Automation Andrew A. Kennings, Kristofer Vorwerk
2008	—	`ed.`	The Tenth International Workshop on System-Level Interconnect Prediction (SLIP 2008), Newcastle, UK, April 5-8, 2008, Proceedings SLIP Ion I. Mandoiu, Andrew A. Kennings
2007	—	`conf`	Adaptive multiple texture approach to texture packing for 3D video games. Future Play Alexander Wong, Andrew A. Kennings
2007	—	`conf`	Floorplan repair using dynamic whitespace management. ACM Great Lakes Symposium on VLSI Kristofer Vorwerk, Andrew A. Kennings, Doris T. Chen, Laleh Behjat
2007	B	`conf`	Improving Annealing Via Directed Moves. FPL Kristofer Vorwerk, Andrew A. Kennings, Jonathan W. Greene, Doris T. Chen
2007	B	`conf`	Improving Timing-Driven FPGA Packing With Physical Information. FPL Doris T. Chen, Kristofer Vorwerk, Andrew A. Kennings
2007	J	`jnl`	Net Cluster: A Net-Reduction-Based Clustering Preprocessing Algorithm for Partitioning and Placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jianhua Li, Laleh Behjat, Andrew A. Kennings
2007	—	`ed.`	The Ninth International Workshop on System-Level Interconnect Prediction (SLIP 2007), Austin, Texas, USA, March 17-18, 2007, Proceedings SLIP Andrew A. Kennings, Ion I. Mandoiu
2006	J	`jnl`	Force-Directed Methods for Generic Placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Andrew A. Kennings, Kristofer Vorwerk
2005	J	`jnl`	A semidefinite optimization approach for the single-row layout problem with unequal dimensions. Discret. Optim. Miguel F. Anjos, Andrew A. Kennings, Anthony Vannelli
2005	A	`conf`	An Improved Multi-Level Framework for Force-Directed Placement. DATE Kristofer Vorwerk, Andrew A. Kennings
2005	A	`conf`	Mixed-size placement via line search. ICCAD Kristofer Vorwerk, Andrew A. Kennings
2005	A	`conf`	Symmetric Multiprocessing on Programmable Chips Made Easy. DATE Austin Hung, William D. Bishop, Andrew A. Kennings
2004	—	`conf`	Enabling Cache Coherency for N-Way SMP Systems on Programmable Chips. ERSA Austin Hung, William D. Bishop, Andrew A. Kennings
2004	A	`conf`	Engineering details of a stable force-directed placer. ICCAD Kristofer Vorwerk, Andrew A. Kennings, Anthony Vannelli
2004	J	`jnl`	Segmented channel routability via satisfiability. ACM Trans. Design Autom. Electr. Syst. William N. N. Hung, Xiaoyu Song, El Mostapha Aboulhamid, Andrew A. Kennings, Alan J. Coppola
2003	J	`jnl`	Board-level multiterminal net assignment for the partial cross-bar architecture. IEEE Trans. Very Large Scale Integr. Syst. Xiaoyu Song, William N. N. Hung, Alan Mishchenko, Malgorzata Chrzanowska-Jeske, Andrew A. Kennings, Alan J. Coppola
2002	—	`conf`	Board-level multiterminal net assignment. ACM Great Lakes Symposium on VLSI Xiaoyu Song, William N. N. Hung, Alan Mishchenko, Malgorzata Chrzanowska-Jeske, Alan J. Coppola, Andrew A. Kennings
2002	—	`conf`	On segmented channel routability. ISCAS (1) William N. N. Hung, Xiaoyu Song, Alan J. Coppola, Andrew A. Kennings
2000	—	`conf`	Analytical minimization of half-perimeter wirelength. ASP-DAC Andrew A. Kennings, Igor L. Markov
1999	—	`conf`	Function Smoothing with Applications to VLSI Layout. ASP-DAC Ross Baldick, Andrew B. Kahng, Andrew A. Kennings, Igor L. Markov
1999	A*	`conf`	Hypergraph Partitioning for VLSI CAD: Methodology for Heuristic Development, Experimentation and Reporting. DAC Andrew E. Caldwell, Andrew B. Kahng, Andrew A. Kennings, Igor L. Markov