Andrej Zemva

26 papers A 2B 3C 2Misc 1Journal 11Unranked 7
YearRankTypeTitle / Venue / Authors
2021 J jnl
Image Acquisition Device for Smart-City Access Control Applications Based on Iris Recognition.
Sensors
Damjan Zadnik, Andrej Zemva
2020 C conf
Message from the Program Chairs.
DSD
Andrej Zemva, Andrej Trost
2019 — conf
Online VHDL Generator and Analysis Tool.
MECO
Andrej Trost, Andrej Zemva
2017 — conf
Pipeline circuit synthesis from Python code.
MECO
Andrej Trost, Andrej Zemva
2015 — conf
Configurable hardware components generator in Python.
MECO
Andrej Trost, Andrej Zemva
2012 J jnl
A systematic approach to configurable functional verification of HW IP blocks at transaction level.
Comput. Electr. Eng.
Tomaz Nahtigal, Primoz Puhar, Andrej Zemva
2012 — conf
Communication-control concept in distribution network with dispersed energy resources.
ISGT Europe
Jure Mocnik, Andrej Zemva
2012 — conf
Verification structures for design of video processing circuits.
MIPRO
Andrej Trost, Andrej Zemva
2011 J jnl
Simulation and Verification of a Dynamic Model of the Electric Forklift Truck.
Intell. Autom. Soft Comput.
Kristjan Basa, Andrej Zemva
2010 J jnl
Elliptic IIR filter sharpening implemented on FPGA.
Digit. Signal Process.
Vladimir M. Poucki, Andrej Zemva, Miroslav D. Lutovac, Tomaz Karcnik
2010 J jnl
FPGA-oriented HW/SW implementation of ECG beat detection and classification algorithm.
Digit. Signal Process.
Matej Cvikl, Andrej Zemva
2009 J jnl
The integration of home-automation and IPTV system and services.
Comput. Stand. Interfaces
Mark Umberger, Iztok Humar, Andrej Kos, Joze Guna, Andrej Zemva, Janez Bester
2008 C conf
Functional Verification of a USB Host Controller.
DSD
Primoz Puhar, Andrej Zemva
2007 J jnl
FPGA-oriented HW/SW implementation of the MPEG-4 video decoder.
Microprocess. Microsystems
Andrej Zemva, Matjaz Verderber
2007 J jnl
Hardware Implementation of a Modified Delay-Coordinate Mapping-Based QRS Complex Detection Algorithm.
EURASIP J. Adv. Signal Process.
Matej Cvikl, Franc Jager, Andrej Zemva
2005 J jnl
A systematic approach to profiling for hardware/software partitioning.
Comput. Electr. Eng.
Matjaz Finc, Andrej Zemva
2005 J jnl
Profiling soft-core processor applications for hardware/software partitioning.
J. Syst. Archit.
Matjaz Finc, Andrej Zemva
2005 J jnl
Test generation for technology-specific multi-faults based on detectable perturbations.
Microelectron. Reliab.
Andrej Zemva, Baldomir Zajc
2003 A conf
HW/SW Codesign of the MPEG-2 Video Decoder.
IPDPS
Matjaz Verderber, Andrej Zemva, Andrej Trost
2003 A conf
HW/SW Partitioned Optimization and VLSI-FPGA Implementation of the MPEG-2 Video Decoder.
DATE
Matjaz Verderber, Andrej Zemva, Damjan Lampret
2000 B conf
Educational Programmable Hardware Prototyping and Verification System.
FPL
Andrej Trost, Andrej Zemva, Baldomir Zajc
1999 — conf
HW/SW Co-Simulation of Target C++ Applications and Synthesizable HDL with Performance Estimation.
EUROMICRO
Gregor Polansek, Andrej Zemva, Andrej Trost
1998 B conf
Programmabel Prototyping System for Image Processing.
FPL
Andrej Trost, Andrej Zemva, Baldomir Zajc
1996 B conf
An Experimental Programmable Environment for Prototyping Digital Circuits.
FPL
Andrej Trost, Roman Kuznar, Andrej Zemva, Baldomir Zajc
1995 Misc conf
Detectable perturbations: a paradigm for technology-specific multi-fault test generation.
VTS
Andrej Zemva, Franc Brglez
1994 — conf
A Functionality Fault Model: Feasibility and Applications.
EDAC-ETC-EUROASIC
Andrej Zemva, Franc Brglez, Krzysztof Kozminski, Baldomir Zajc