Andreia Cathelin

127 papers A 1C 6Journal 39Unranked 81

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	A Comprehensive Review of State-of-the-Art Harmonic Rejection Techniques in N-Path Mixers. LASCAS Malak Bouaamri, Fadel Mohsen, Imadeddine Bendjeddou, Manuel J. Barragán, Andreia Cathelin, Sylvain Bourdel
2026	—	`conf`	Sequential Dual-Loop Digital and Analog PLL Synthesizer for Fast-Locking IoT Applications in 18nm FD-SOI CMOS. LASCAS Virgile Colrat, David Gaidioz, Andres Asprilla, Frédéric Paillardet, Andreia Cathelin, Yann Deval
2025	—	`conf`	A 100 V Input Common-Mode Range Compact Three-Step Incremental ADC Architecture Evaluation Achieving 101.48 dB SNDR and 6.46 μVRMS Input-Referred Noise. ICECS Timothee Trembly, Matthieu Desvergne, Patrik Arno, Andreia Cathelin, Andreas Kaiser
2025	J	`jnl`	A Sub-400-nW Real-Time Event-Driven Spectrogram Extraction Unit in 28-nm FD-SOI CMOS for Keyword Spotting Application. IEEE J. Solid State Circuits Soufiane Mourrane, Benoit Larras, Sylvain Clerc, Andreia Cathelin, Antoine Frappé
2024	—	`conf`	24.4 Sub-THz Ruler: Spectral Bistability in a 235GHz Self-Injection-Locked Oscillator for Agile and Unambiguous Ranging. ISSCC S. M. Hossein Naghavi, Morteza Tavakoli Taba, Amirata Tabatabavakili, Ali Mostajeran, Mohammed Aseeri, Andreia Cathelin, Ehsan Afshari
2024	J	`jnl`	A Fast Back-to-Lock DPLL-Based 192-210-GHz Chirp Generator With +5.9-dBm Peak Output Power for Sub-THz Imaging and Sensing. IEEE J. Solid State Circuits Lili Chen, Morteza Tavakoli Taba, Zainulabideen J. Khalifa, Andreia Cathelin, Ehsan Afshari
2024	J	`jnl`	A High-Efficiency High-Power 170-176-GHz Frequency Stabilized Quadrature Radiator. IEEE J. Solid State Circuits Lili Chen, Andreia Cathelin, Ehsan Afshari
2024	J	`jnl`	Design-Oriented Single-Piece 5-DC-Parameter MOSFET Model. IEEE Access Deni Germano Alves Neto, Mohamed Khalil Bouchoucha, Gabriel Maranhão, Manuel J. Barragán, Márcio Cherem Schneider, Andreia Cathelin, Sylvain Bourdel, Carlos Galup-Montoro
2024	J	`jnl`	Design-Oriented Single-Piece Explicit I-V DC Charge-Based Model for MOS Transistors in Nanometric Technologies. IEEE Access Julien Poupon, Manuel J. Barragan Asian, Andreia Cathelin, Sylvain Bourdel
2024	C	`conf`	Dynamic Analysis of RF CMOS Inverter-Based Ring Oscillators using an All-Region MOSFET Charge-Based Model in 28nm FD-SOI CMOS. ISCAS Julien Poupon, Manuel J. Barragán, Andreia Cathelin, Sylvain Bourdel
2024	—	`conf`	Exploration of Low-Energy Floating-Point Flash Attention Mechanism for 18nm FD-SOI CMOS Integration at the Edge. MWSCAS Joaquin Cornejo, Filipe Pouget, Sylvain Clerc, Tifenn Hirtzlin, Benoit Larras, Andreia Cathelin, Antoine Frappé
2023	—	`conf`	0.45-mW 2.35-3.0 GHz Multiplying DLL with Calibration Loop in 28nm CMOS FD-SOI. ESSCIRC Andres Asprilla, Andreia Cathelin, Yann Deval
2023	—	`conf`	A 194-238GHz Fully On-Chip Self-Referenced Frequency Stabilized Radiator for High Range Resolution Imaging. CICC Bahareh Hadidian, Farzad Khoeini, S. M. Hossein Naghavi, Andreia Cathelin, Kamal Sarabandi, Ehsan Afshari
2023	—	`conf`	A 291nW Real-Time Event-Driven Spectrogram Extraction unit in 28nm FD-SOI CMOS for Keyword Spotting Application. ESSCIRC Soufiane Mourrane, Benoit Larras, Sylvain Clerc, Andreia Cathelin, Antoine Frappé
2023	—	`conf`	A 5-DC-parameter MOSFET model for circuit simulation in QucsStudio and SPECTRE. NEWCAS Deni Germano Alves Neto, Cristina Missel Adotnes, Gabriel Maranhão, Mohamed Khalil Bouchoucha, Manuel J. Barragán, Andreia Cathelin, Márcio Cherem Schneider, Sylvain Bourdel, Carlos Galup-Montoro
2023	—	`conf`	A 53-62 GHz Two-channel Differential 6-bit Active Phase Shifter in 55-nm SiGe Technology. ESSCIRC Morteza Tavakoli Taba, S. M. Hossein Naghavi, Sara Shoouri, Andreia Cathelin, Ehsan Afshari
2023	—	`conf`	A Compact CMOS 363 GHz Autodyne FMCW Radar with 57 GHz Bandwidth for Dental Imaging. CICC Morteza Tavakoli Taba, S. M. Hossein Naghavi, Morteza Fayazi, Ali Sadeghi, Andreia Cathelin, Ehsan Afshari
2023	—	`conf`	A Low-Power 20Gb/s 196GHz BPSK Wireless Transmitter with Energy Efficiency FoM of 0.15pJ/bit/cm. CICC Lili Chen, Morteza Tavakoli Taba, Andreia Cathelin, Ehsan Afshari
2023	—	`conf`	A wideband sub-6GHz continuously tunable gm-boosted CG Low Noise Amplifier in 28 nm FD-SOI CMOS technology. ESSCIRC Mohamed Khalil Bouchoucha, Manuel J. Barragán, Andreia Cathelin, Sylvain Bourdel
2023	—	`conf`	ASIL-D automotive-grade microcontroller in 28nm FD-SOI with full-OTA capable 21MB embedded PCM memory and highly scalable power management. VLSI Technology and Circuits Nicolas Grossier, Fabio Disegni, A. Ventre, Antonio Barcella, R. Mariani, V. Marino, S. Mazzara, A. Scavuzzo, M. Bansal, B. Soni, A. Anand, S. Banzal, D. Joshi, R. Narwal, M. Niranjani, K. Trivedi, P. Ferreira, Rossella Ranica, L. Vullo, Andreia Cathelin, Alfonso Maurelli, S. Pezzini, M. Peri
2023	J	`jnl`	Corrections to "Design-Oriented All-Regime All-Region 7-Parameter Short-Channel MOSFET Model Based on Inversion Charge". IEEE Access Dayana A. Pino-Monroy, Patrick Scheer, Mohamed Khalil Bouchoucha, Carlos Galup-Montoro, Manuel J. Barragán, Philippe Cathelin, Jean-Michel Fournier, Andreia Cathelin, Sylvain Bourdel
2023	—	`conf`	Design-oriented model for short-channel MOS transistors based on inversion charge. LASCAS Dayana A. Pino-Monroy, Patrick Scheer, Mohamed Khalil Bouchoucha, Carlos Galup-Montoro, Manuel J. Barragán, Jean-Michel Fournier, Andreia Cathelin, Sylvain Bourdel
2023	—	`conf`	High-Resolution Fractional Digital Frequency Divider using a Binary-Rate Multiplier. NEWCAS Denis Flores, Dominique Dallet, Andrei Vladimirescu, Andreia Cathelin, Yann Deval
2023	—	`conf`	Low-Power Event-Driven Spectrogram Extractor for Multiple Keyword Spotting: A proof of concept. NEWCAS Soufiane Mourrane, Benoit Larras, Sylvain Clerc, Andreia Cathelin, Antoine Frappé
2023	C	`conf`	Performance benchmark of State-of-the-art Sub-6-GHz wideband LNAs Based on an Extensive Survey. ISCAS Mohamed Khalil Bouchoucha, Mathieu Coustans, Manuel J. Barragán, Andreia Cathelin, Sylvain Bourdel
2023	C	`conf`	Resistive Feedback LNA design using a 7-parameter design-oriented model for advanced technologies. ISCAS Mohamed Khalil Bouchoucha, Dayana A. Pino-Monroy, Patrick Scheer, Philippe Cathelin, Jean-Michel Fournier, Manuel J. Barragán, Andreia Cathelin, Sylvain Bourdel
2023	—	`conf`	Substrate noise mitigation using high resistivity base silicon wafer for a 14 GHz VCO on 28 nm FD-SOI. NEWCAS Youssef Bendou, Martin Rack, Dimitri Lederer, Andreia Cathelin, Jean-Pierre Raskin
2022	J	`jnl`	A 220-GHz Energy-Efficient High-Data-Rate Wireless ASK Transmitter Array. IEEE J. Solid State Circuits Bahareh Hadidian, Farzad Khoeini, S. M. Hossein Naghavi, Andreia Cathelin, Ehsan Afshari
2022	—	`conf`	A 24-31GHz 28nm FD-SOI CMOS Power Amplifier Supporting 5G NR FR2 64-QAM Signals. ICECS 2022 G. Diverrez, Eric Kerhervé, Andreia Cathelin
2022	J	`jnl`	A Sub-100-μW 0.1-to-27-Mb/s Pulse-Based Digital Transmitter for the Human Intranet in 28-nm FD-SOI CMOS. IEEE J. Solid State Circuits Guillaume Tochou, Robin Benarrouch, David Gaidioz, Andreia Cathelin, Antoine Frappé, Andreas Kaiser, Jan M. Rabaey
2022	J	`jnl`	Design-Oriented All-Regime All-Region 7-Parameter Short-Channel MOSFET Model Based on Inversion Charge. IEEE Access Dayana A. Pino-Monroy, Patrick Scheer, Mohamed Khalil Bouchoucha, Carlos Galup-Montoro, Manuel J. Barragán, Philippe Cathelin, Jean-Michel Fournier, Andreia Cathelin, Sylvain Bourdel
2022	—	`conf`	Highly Linear Large Signal Compact Voltage-to-Current Converter in 28 nm FD-SOI Technology. LASCAS Andres Asprilla, Andreia Cathelin, Yann Deval
2022	J	`jnl`	Impact of Forward Body-Biasing on Ultra-Low Voltage Switched-Capacitor RF Power Amplifier in 28 nm FD-SOI. IEEE Trans. Circuits Syst. II Express Briefs Guillaume Tochou, Andreia Cathelin, Antoine Frappé, Andreas Kaiser, Jan M. Rabaey
2022	J	`jnl`	Multi-Watt-Level 4.9-GHz Silicon Power Amplifier for Portable Thermoacoustic Imaging. IEEE J. Solid State Circuits Christopher Sutardja, Ajay Singhvi, Aidan Fitzpatrick, Andreia Cathelin, Amin Arbabian
2022	—	`conf`	The Hardware Foundation of 6G: The NEW-6G Approach. EuCNC Emilio Calvanese Strinati, Michaël Peeters, César Roda Neve, Manil Dev Gomony, Andreia Cathelin, Mauro Renato Boldi, Mark Ingels, Aritra Banerjee, Pascal Chevalier, Bartek Kozicki, Didier Belot
2021	—	`conf`	16MB High Density Embedded PCM macrocell for automotive-grade microcontroller in 28nm FD-SOI, featuring extension to 24MB for Over-The-Air software update. VLSI Circuits Fabio Disegni, A. Ventre, A. Molgora, Paolo Cappelletti, R. Badalamenti, P. Ferreira, G. Castagna, Andreia Cathelin, Anna Gandolfo, Andrea Redaelli, D. Manfrè, Alfonso Maurelli, C. Torti, F. Piazza, M. Carfì, Franck Arnaud, M. Perroni, M. Caruso, S. Pezzini, Roberto Annunziata, G. Piazza, Olivier Weber, M. Peri
2021	—	`conf`	200-GS/s ADC Front-End Employing 25% Duty Cycle Quadrature Clock Generator. ESSCIRC Naftali Weiss, Gregory Cooke, Peter Schvan, Pascal Chevalier, Andreia Cathelin, Sorin P. Voinigescu
2021	—	`conf`	A 250GHz Autodyne FMCW Radar in 55nm BiCMOS with Micrometer Range Resolution. ISSCC S. M. Hossein Naghavi, Saghar Seyedabbaszadehesfahlani, Farzad Khoeini, Andreia Cathelin, Ehsan Afshari
2021	—	`conf`	A Low-Noise mm-Wave Injection-Locked Oscillator designed in 65nm Partially Depleted SOI CMOS Technology. NEWCAS Romane Dumont, Magali De Matos, Andreia Cathelin, Yann Deval
2021	—	`conf`	A gm/ID Design Methodology for 28 nm FD-SOI CMOS Resistive Feedback LNAs. ICECS Sylvain Bourdel, Serge Subias, Mohamed Khalil Bouchoucha, Manuel J. Barragán, Andreia Cathelin, Carlos Galup-Montoro
2021	—	`conf`	An Active Quenching Circuit for a Native 3D SPAD Pixel in a 28 nm CMOS FDSOI Technology. NEWCAS Mohammadreza Dolatpoor Lakeh, Jean-Baptiste Kammerer, Jean-Baptiste Schell, Dylan Issartel, Françis Calmon, Andreia Cathelin, Wilfried Uhring
2021	—	`conf`	An Energy Efficient Fully Integrated 20Gbps OOK Wireless Transmitter at 220GHz. CICC Bahareh Hadidian, Farzad Khoeini, S. M. Hossein Naghavi, Andreia Cathelin, Ehsan Afshari
2021	J	`jnl`	An Ultrafast Active Quenching Active Reset Circuit with 50% SPAD Afterpulsing Reduction in a 28 nm FD-SOI CMOS Technology Using Body Biasing Technique. Sensors Mohammadreza Dolatpoor Lakeh, Jean-Baptiste Kammerer, Enagnon Aguénounon, Dylan Issartel, Jean-Baptiste Schell, Sven Rink, Andreia Cathelin, Françis Calmon, Wilfried Uhring
2021	—	`conf`	Artificial Intelligence: Why moving it to the Edge? ESSCIRC Joël Hartmann, Paolo Cappelletti, Nitin Chawla, Franck Arnaud, Andreia Cathelin
2021	—	`conf`	Artificial Intelligence: Why moving it to the Edge? ESSDERC Joël Hartmann, Paolo Cappelletti, Nitin Chawla, Franck Arnaud, Andreia Cathelin
2021	—	`conf`	Event-Driven Continuous-Time Feature Extraction for Ultra Low-Power Audio Keyword Spotting. AICAS Soufiane Mourrane, Benoit Larras, Andreia Cathelin, Antoine Frappé
2021	—	`conf`	F3: Silicon Technologies in the Fight Against Pandemics - From Point of Care to Computational Epidemiology. ISSCC Nick Van Helleputte, Arijit Raychowdhury, Ping-Hsuan Hsieh, Jun Deguchi, Matteo Perenzoni, Esther Rodríguez-Villegas, Long Yan, Andreia Cathelin, Keith A. Bowman, Chris Van Hoof
2021	—	`conf`	F4: Electronics for a Quantum World. ISSCC Edoardo Charbon, Alicia Klinefelter, Massimo Alioto, Yao-Hong Liu, Munehiko Nagatani, Arijit Raychowdhury, Andreia Cathelin, Boris Murmann
2020	—	`conf`	A Performance-Flexible Energy-Optimized Automotive-Grade Cortex-R4F SoC through Combined AVS/ABB/Bias-in-Memory-Array Closed-Loop Regulation in 28nm FD-SOI. VLSI Circuits Ricardo Gomez Gomez, Edwige Bano, Andreia Cathelin, Sylvain Clerc
2020	J	`jnl`	Energy Efficient Heartbeat-Based MAC Protocol for WBAN Employing Body Coupled Communication. IEEE Access Flavien Solt, Robin Benarrouch, Guillaume Tochou, Olivér Facklam, Antoine Frappé, Andreia Cathelin, Andreas Kaiser, Jan M. Rabaey
2020	C	`conf`	Heartbeat-Based Synchronization Scheme for the Human Intranet: Modeling and Analysis. ISCAS Robin Benarrouch, Ali Moin, Flavien Solt, Antoine Frappé, Andreia Cathelin, Andreas Kaiser, Jan M. Rabaey
2020	J	`jnl`	Heartbeat-Based Synchronization Scheme for the Human Intranet: Modeling and Analysis. CoRR Robin Benarrouch, Ali Moin, Flavien Solt, Antoine Frappé, Andreia Cathelin, Andreas Kaiser, Jan M. Rabaey
2020	C	`conf`	Ring VCO Phase Noise Optimization by Pseudo-Differential Architecture in 28nm FD-SOI CMOS. ISCAS David Gaidioz, Magali De Matos, Andreia Cathelin, Yann Deval
2019	J	`jnl`	A 115-135-GHz 8PSK Receiver Using Multi-Phase RF-Correlation-Based Direct-Demodulation Method. IEEE J. Solid State Circuits Hossein Mohammadnezhad, Huan Wang, Andreia Cathelin, Payam Heydari
2019	—	`conf`	A Single-Channel RF-to-Bits 36Gbps 8PSK RX with Direct Demodulation in RF Domain. CICC Hossein Mohammadnezhad, Huan Wang, Andreia Cathelin, Payam Heydari
2019	J	`jnl`	A Spectrum-Sensing DPD Feedback Receiver With 30× Reduction in ADC Acquisition Bandwidth and Sample Rate. IEEE Trans. Circuits Syst. I Regul. Pap. Nikolaus Hammler, Andreia Cathelin, Philippe Cathelin, Boris Murmann
2019	—	`conf`	Body-biasing considerations with SPAD FDSOI: advantages and drawbacks. ESSDERC Tulio Chaves de Albuquerque, Dylan Issartel, Raphael Clerc, Patrick Pittet, Remy Cellier, Wilfried Uhring, Andreia Cathelin, Françis Calmon
2019	—	`conf`	Capacitive Body-Coupled Communication in the 400-500 MHz Frequency Band. BODYNETS Robin Benarrouch, Arno Thielens, Andreia Cathelin, Antoine Frappé, Andreas Kaiser, Jan M. Rabaey
2019	—	`conf`	Embedded PCM macro for automotive-grade microcontroller in 28nm FD-SOI. VLSI Circuits Fabio Disegni, Roberto Annunziata, A. Molgora, G. Campardo, Paolo Cappelletti, P. Zuliani, P. Ferreira, A. Ventre, G. Castagna, Andreia Cathelin, Anna Gandolfo, F. Goller, S. Malhi, D. Manfrè, Alfonso Maurelli, C. Torti, Franck Arnaud, M. Carfì, M. Perroni, M. Caruso, S. Pezzini, G. Piazza, Olivier Weber, M. Peri
2018	—	`conf`	90° Hybrid coupler design technique for wideband and multimode mm-wave operations featuring lateral ground planes virtual expansion in 28nm FD-SOI CMOS technology. LASCAS Florent Torres, Eric Kerherve, Andreia Cathelin
2018	J	`jnl`	A 128 kb 7T SRAM Using a Single-Cycle Boosting Mechanism in 28-nm FD-SOI. IEEE Trans. Circuits Syst. I Regul. Pap. Babak Mohammadi, Oskar Andersson, Joseph Nguyen, Lorenzo Ciampolini, Andreia Cathelin, Joachim Neves Rodrigues
2018	—	`conf`	A 301.7-to-331.8GHz source with entirely on-chip feedback loop for frequency stabilization in 0.μm BiCMOS. ISSCC Chen Jiang, Mohammed Aseeri, Andreia Cathelin, Ehsan Afshari
2018	J	`jnl`	A Comparative Study of On-Body Radio-Frequency Links in the 420 MHz-2.4 GHz Range. Sensors Arno Thielens, Robin Benarrouch, Stijn Wielandt, Matthew G. Anderson, Ali Moin, Andreia Cathelin, Jan M. Rabaey
2018	—	`conf`	A bidirectional short range low power and high data rate W-Band transceiver for network on chip. NEWCAS Dipal Ghosh, Antoine Frappé, Christophe Loyez, Andreia Cathelin
2018	J	`jnl`	All-Digital Transmitter Architecture Based on Two-Path Parallel 1-bit High Pass Filtering DACs. IEEE Trans. Circuits Syst. I Regul. Pap. Fikre Tsigabu Gebreyohannes, Antoine Frappé, Philippe Cathelin, Andreia Cathelin, Andreas Kaiser
2018	—	`conf`	FD-SOI Integration Solutions for Analog, RF and Millimeter-Wave Applications. ESSCIRC Andreia Cathelin
2018	—	`conf`	FD-SOI integration solutions for analog, RF and Millimeter-wave applications. ESSDERC Andreia Cathelin
2018	—	`conf`	Integration of SPAD in 28nm FDSOI CMOS technology. ESSDERC Tulio Chaves de Albuquerque, Françis Calmon, Raphael Clerc, Patrick Pittet, Younes Benhammou, Dominique Golanski, Sebastien Jouan, Denis Rideau, Andreia Cathelin
2017	—	`conf`	27.5 A pixel-pitch-matched ultrasound receiver for 3D photoacoustic imaging with integrated delta-sigma beamformer in 28nm UTBB FDSOI. ISSCC Man-Chia Chen, Aldo Pena Perez, Sri-Rajasekhar Kothapalli, Philippe Cathelin, Andreia Cathelin, Sanjiv Sam Gambhir, Boris Murmann
2017	J	`jnl`	A 0.92-THz SiGe Power Radiator Based on a Nonlinear Theory for Harmonic Generation. IEEE J. Solid State Circuits Hamidreza Aghasi, Andreia Cathelin, Ehsan Afshari
2017	J	`jnl`	A 170-GHz Fully Integrated Single-Chip FMCW Imaging Radar with 3-D Imaging Capability. IEEE J. Solid State Circuits Ali Mostajeran, Andreia Cathelin, Ehsan Afshari
2017	J	`jnl`	A High-Speed Efficient 220-GHz Spatial-Orthogonal ASK Transmitter in 130-nm SiGe BiCMOS. IEEE J. Solid State Circuits Chen Jiang, Andreia Cathelin, Ehsan Afshari
2017	J	`jnl`	A Pixel Pitch-Matched Ultrasound Receiver for 3-D Photoacoustic Imaging With Integrated Delta-Sigma Beamformer in 28-nm UTBB FD-SOI. IEEE J. Solid State Circuits Man-Chia Chen, Aldo Pena Perez, Sri-Rajasekhar Kothapalli, Philippe Cathelin, Andreia Cathelin, Sanjiv Sam Gambhir, Boris Murmann
2017	—	`conf`	RF/analog and mixed-signal design techniques in FD-SOI technology. CICC Andreia Cathelin
2017	J	`jnl`	SleepTalker: A ULV 802.15.4a IR-UWB Transmitter SoC in 28-nm FDSOI Achieving 14 pJ/b at 27 Mb/s With Channel Selection Based on Adaptive FBB and Digitally Programmable Pulse Shaping. IEEE J. Solid State Circuits Guerric de Streel, François Stas, Thibaut Gurne, François Durant, Charlotte Frenkel, Andreia Cathelin, David Bol
2016	—	`conf`	25.5 A 320GHz subharmonic-mixing coherent imager in 0.13µm SiGe BiCMOS. ISSCC Chen Jiang, Ali Mostajeran, Ruonan Han, Mohammad Emadi, Hani Sherry, Andreia Cathelin, Ehsan Afshari
2016	J	`jnl`	55-nm SiGe BiCMOS Distributed Amplifier Topologies for Time-Interleaved 120-Gb/s Fiber-Optic Receivers and Transmitters. IEEE J. Solid State Circuits James Hoffman, Stefan Shopov, Pascal Chevalier, Andreia Cathelin, Peter Schvan, Sorin P. Voinigescu
2016	—	`conf`	A 128 kb single-bitline 8.4 fJ/bit 90MHz at 0.3V 7T sense-amplifierless SRAM in 28 nm FD-SOI. ESSCIRC Babak Mohammadi, Oskar Andersson, Joseph Nguyen, Lorenzo Ciampolini, Andreia Cathelin, Joachim Neves Rodrigues
2016	J	`jnl`	A 2.4 GHz Interferer-Resilient Wake-Up Receiver Using A Dual-IF Multi-Stage N-Path Architecture. IEEE J. Solid State Circuits Camilo Salazar, Andreia Cathelin, Andreas Kaiser, Jan M. Rabaey
2016	J	`jnl`	A 234-261-GHz 55-nm SiGe BiCMOS Signal Source with 5.4-7.2 dBm Output Power, 1.3% DC-to-RF Efficiency, and 1-GHz Divided-Down Output. IEEE J. Solid State Circuits Stefan Shopov, Andreea Balteanu, Jürgen Hasch, Pascal Chevalier, Andreia Cathelin, Sorin P. Voinigescu
2016	J	`jnl`	A Fully Integrated 320 GHz Coherent Imaging Transceiver in 130 nm SiGe BiCMOS. IEEE J. Solid State Circuits Chen Jiang, Ali Mostajeran, Ruonan Han, Mohammad Emadi, Hani Sherry, Andreia Cathelin, Ehsan Afshari
2016	—	`conf`	A concurrent transmitter in CMOS 28nm FDSOI technology based on Walsh sequences generator. NEWCAS Nassim Bouassida, Francois Rivet, Yann Deval, David Duperray, Andreia Cathelin
2016	—	`conf`	A digital delay line with coarse/fine tuning through gate/body biasing in 28nm FDSOI. ESSCIRC Ilias Sourikopoulos, Antoine Frappé, Andreia Cathelin, Laurent Clavier, Andreas Kaiser
2016	J	`jnl`	Introduction to the Special Issue on the 2015 Symposium on VLSI Circuits. IEEE J. Solid State Circuits Masato Motomura, Andreia Cathelin
2016	—	`conf`	Low power advanced digital technologies to enable Internet of Things. ESSDERC Laurent Malier, Andreia Cathelin, Giorgio Cesana, Laurent Le Pailleur
2016	—	`conf`	Sampling modulation: An energy efficient novel feature extraction for biosignal processing. BioCAS M. Causo, Simone Benatti, Antoine Frappé, Andreia Cathelin, Elisabetta Farella, Andreas Kaiser, Luca Benini, Jan M. Rabaey
2015	—	`conf`	13.5 A -97dBm-sensitivity interferer-resilient 2.4GHz wake-up receiver using dual-IF multi-N-Path architecture in 65nm CMOS. ISSCC Camilo Salazar, Andreas Kaiser, Andreia Cathelin, Jan M. Rabaey
2015	—	`conf`	25.5 A 320GHz phase-locked transmitter with 3.3mW radiated power and 22.5dBm EIRP for heterodyne THz imaging systems. ISSCC Ruonan Han, Chen Jiang, Ali Mostajeran, Mohammad Emadi, Hamidreza Aghasi, Hani Sherry, Andreia Cathelin, Ehsan Afshari
2015	—	`conf`	5.5 A forward-body-bias tuned 450MHz Gm-C 3 ISSCC Joeri Lechevallier, Remko E. Struiksma, Hani Sherry, Andreia Cathelin, Eric A. M. Klumperink, Bram Nauta
2015	J	`jnl`	A SiGe Terahertz Heterodyne Imaging Transmitter With 3.3 mW Radiated Power and Fully-Integrated Phase-Locked Loop. IEEE J. Solid State Circuits Ruonan Han, Chen Jiang, Ali Mostajeran, Mohammad Emadi, Hamidreza Aghasi, Hani Sherry, Andreia Cathelin, Ehsan Afshari
2015	—	`conf`	A self-powered IPv6 bidirectional wireless sensor & actuator network for indoor conditions. VLSIC Pascal Urard, G. Romagnello, Andrei Banciu, J. C. Grasset, V. Heinrich, Mounir Boulemnakher, F. Todeschni, Laurent Damon, Roberto Guizzetti, L. Andre, Andreia Cathelin
2015	—	`conf`	Considerations for high-speed configurable-bandwidth time-interleaved digital delta-sigma modulators and synthesis in 28 nm UTBB FDSOI. NEWCAS Razvan-Cristian Marin, Antoine Frappé, Andreas Kaiser, Andreia Cathelin
2015	—	`conf`	Design considerations for low-noise transconductance amplifiers in 28nm UTBB-FDSOI. NEWCAS D. Danilovic, Andreia Cathelin, Andrei Vladimirescu, Borivoje Nikolic
2014	J	`jnl`	A 3 GHz Dual Core Processor ARM Cortex TM -A9 in 28 nm UTBB FD-SOI CMOS With Ultra-Wide Voltage Range and Energy Efficiency Optimization. IEEE J. Solid State Circuits David Jacquet, Frederic Hasbani, Philippe Flatresse, Robin Wilson, Franck Arnaud, Giorgio Cesana, Thierry Di Gilio, Christophe Lecocq, Tanmoy Roy, Amit Chhabra, Chiranjeev Grover, Olivier Minez, Jacky Uginet, Guy Durieu, Cyril Adobati, Davide Casalotto, Frederic Nyer, Patrick Menut, Andreia Cathelin, Indavong Vongsavady, Philippe Magarshack
2013	—	`conf`	A digitally modulated mm-Wave cartesian beamforming transmitter with quadrature spatial combining. ISSCC Jiashu Chen, Lu Ye, Diane Titz, Fred Gianesello, Romain Pilard, Andreia Cathelin, Fabien Ferrero, Cyril Luxey, Ali M. Niknejad
2012	J	`jnl`	A 1 k-Pixel Video Camera for 0.7-1.1 Terahertz Imaging Applications in 65-nm CMOS. IEEE J. Solid State Circuits Richard Al Hadi, Hani Sherry, Janus Grzyb, Yan Zhao, Wolfgang Forster, H. M. Keller, Andreia Cathelin, Andreas Kaiser, Ullrich R. Pfeiffer
2012	—	`conf`	A 1kpixel CMOS camera chip for 25fps real-time terahertz imaging applications. ISSCC Hani Sherry, Janus Grzyb, Yan Zhao, Richard Al Hadi, Andreia Cathelin, Andreas Kaiser, Ullrich R. Pfeiffer
2012	—	`conf`	A 65nm CMOS 1-to-10GHz tunable continuous-time low-pass filter for high-data-rate communications. ISSCC Fawzi Houfaf, Mathieu Egot, Andreas Kaiser, Andreia Cathelin, Bram Nauta
2012	J	`jnl`	A 7-Bit 18th Order 9.6 GS/s FIR Up-Sampling Filter for High Data Rate 60-GHz Wireless Transmitters. IEEE J. Solid State Circuits Jonathan Müller, Bruno Stefanelli, Antoine Frappé, Lu Ye, Andreia Cathelin, Ali Niknejad, Andreas Kaiser
2012	—	`conf`	Gaining 10x in energy efficiency in the next decade in consumer products. VLSI-DAT Philippe Magarshack, Andreia Cathelin
2011	—	`conf`	A 20-23GHz Coupled Oscillators Array in 65nm CMOS for HDR 60GHz beamforming applications. ESSCIRC Mathieu Egot, Baudouin Martineau, Olivier Richard, Nathalie Rolland, Andreia Cathelin, Andreas Kaiser
2011	—	`conf`	A 6.7-ENOB, 500-MS/s, 5.1-mW dynamic pipeline ADC in 65-nm SOI CMOS. ESSCIRC Ray Nguyen, Christine Raynaud, Andreia Cathelin, Boris Murmann
2011	J	`jnl`	A 65-nm CMOS Fully Integrated Transceiver Module for 60-GHz Wireless HD Applications. IEEE J. Solid State Circuits Alexandre Siligaris, Olivier Richard, Baudouin Martineau, Christopher Mounet, Fabrice Chaix, Romain Ferragut, Cedric Dehos, Jérôme Lantéri, Laurent Dussopt, Silas D. Yamamoto, Romain Pilard, Pierre Busson, Andreia Cathelin, Didier Belot, Pierre Vincent
2011	—	`conf`	A 65nm CMOS fully integrated transceiver module for 60GHz wireless HD applications. ISSCC Alexandre Siligaris, Olivier Richard, Baudouin Martineau, Christopher Mounet, Fabrice Chaix, Romain Ferragut, Cedric Dehos, Jérôme Lantéri, Laurent Dussopt, Silas D. Yamamoto, Romain Pilard, Pierre Busson, Andreia Cathelin, Didier Belot, Pierre Vincent
2011	—	`conf`	A 7-bit 18 ESSCIRC Jonathan Müller, Bruno Stefanelli, Antoine Frappé, Lu Ye, Andreia Cathelin, Ali Niknejad, Andreas Kaiser
2011	—	`conf`	Design of 10 GHz sampling rate digital FIR filters with powers-of-two coefficients. ECCTD Benjamin Parent, Jonathan Müller, Andreas Kaiser, Andreia Cathelin
2011	—	`conf`	Towards personalized medicine and monitoring for healthy living. ISSCC Christian C. Enz, Andreia Cathelin, Maysam Ghovanloo, Stefan Heinen, Minkyu Je, David Scott
2010	C	`conf`	A FIR baseband filter for high data rate 60-GHz wireless communications. ISCAS Jonathan Müller, Andreia Cathelin, Ali Niknejad, Andreas Kaiser
2009	—	`conf`	A 60GHz 65nm CMOS RMS power detector for antenna impedance mismatch detection. ESSCIRC Jean Gorisse, Andreia Cathelin, Andreas Kaiser, Eric Kerherve
2009	—	`conf`	A combined 4-bit quadrature digital to analog converter/mixer for millimeter-wave applications. ICECS Axel Flament, Philippe Lombard, Bruno Stefanelli, Andreas Kaiser, Andreia Cathelin
2009	J	`jnl`	An All-Digital RF Signal Generator Using High-Speed ΔΣ Modulators. IEEE J. Solid State Circuits Antoine Frappé, Axel Flament, Bruno Stefanelli, Andreas Kaiser, Andreia Cathelin
2008	—	`conf`	A 1.2 GHz semi-digital reconfigurable FIR bandpass filter with passive power combiner. ESSCIRC Axel Flament, Antoine Frappé, Andreas Kaiser, Bruno Stefanelli, Andreia Cathelin, Hilal Ezzeddine
2007	—	`conf`	80 GHz low noise amplifiers in 65nm CMOS SOI. ESSCIRC Baudouin Martineau, Andreia Cathelin, François Danneville, Andreas Kaiser, Gilles Dambrine, Sylvie Lépilliet, Frederic Gianesello, Didier Belot
2007	—	`conf`	A 2GHz 0.25μm SiGe BiCMOS Oscillator with Flip-Chip Mounted BAW Resonator. ISSCC S. Razafimandimby, Andreia Cathelin, Jerome Lajoinie, Andreas Kaiser, Didier Belot
2007	—	`conf`	A Mixed Ladder-Lattice Bulk Acoustic Wave Duplexer for W-CDMA Handsets. ICECS Alexandre A. Shirakawa, Moustapha El Hassan, Andreia Cathelin
2007	J	`jnl`	A Switchable-Order G IEEE J. Solid State Circuits David Chamla, Andreas Kaiser, Andreia Cathelin, Didier Belot
2007	—	`conf`	Design for millimeter-wave applications in silicon technologies. ESSCIRC Andreia Cathelin, Baudouin Martineau, N. Seller, S. Douyere, Jean Gorisse, Sébastien Pruvost, Christine Raynaud, Frederic Gianesello, Sébastien Montusclat, Sorin P. Voinigescu, Ali M. Niknejad, Didier Belot, Jean-Pierre Schoellkopf
2007	—	`conf`	Digital tuning of an analog tunable bandpass BAW-filter at GHz frequency. ESSCIRC Stephane Razafimandimby, Cyrille Tilhac, Andreia Cathelin, Andreas Kaiser, Didier Belot
2007	—	`conf`	Reconfigurable digital Delta-Sigma Modulator Synthesis for digital wireless transmitters. ECCTD C. Nsiala Nzeza, Jean Gorisse, Antoine Frappé, Axel Flament, Andreas Kaiser, Andreia Cathelin
2006	—	`conf`	Design techniques for very high speed digital delta-sigma modulators aimed at all-digital RE transmitters. ICECS Antoine Frappé, Axel Flament, Andreas Kaiser, Bruno Stefanelli, Andreia Cathelin
2005	J	`jnl`	A 1 V 270 My-W 2 GHz CMOS Synchronized Ring Oscillator Based Prescaler. J. Low Power Electron. Olivier Mazouffre, Hervé Lapuyade, Jean-Baptiste Bégueret, Andreia Cathelin, Didier Belot, Yann Deval
2005	J	`jnl`	A G IEEE J. Solid State Circuits David Chamla, Andreas Kaiser, Andreia Cathelin, Didier Belot
2005	—	`conf`	A study on FBAR Filters reconfiguration. ICECS Moustapha El Hassan, Eric Kerherve, Yann Deval, Alexandre A. Shirakawa, Pierre Jarry, Andreia Cathelin
2005	—	`conf`	Evaluation of Capacitor Ratios in Automated Accurate Common-Centroid Capacitor Arrays. ISQED DiaaEldin Khalil, Mohamed Dessouky, Vincent Bourguet, Marie-Minerve Louërat, Andreia Cathelin, Hani F. Ragai
2004	—	`conf`	A multi-mode continuously-tunable lowpass filter for zero-IF mobile applications. ESSCIRC David Chamla, Andreas Kaiser, Andreia Cathelin, Didier Belot
2002	A	`conf`	Substrate Parasitic Extraction for RF Integrated Circuits. DATE Andreia Cathelin, Daniel Saias, Didier Belot, Youri Leclercq, François J. R. Clément
1998	J	`jnl`	A fully integrated CMOS PM radio receiver for wristwatch calibration. IEEE J. Solid State Circuits Philippe Cathelin, Andreia Cathelin, Xavier Saboret, Nicolas Krasnanski, Pierre Legras, Raed V. Moughabghab, Olivier Declerck, Marc Miodini, Frank Op't Eynde