Andreas Peter Burg

37 papers A* 1A 2B 1C 4Misc 1Journal 14Unranked 14

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Decoding Product Codes with Belief Propagation. SiPS Yifei Shen, Zongyao Li, Yuqing Ren, Emmanuel Boutillon, Chuan Zhang, Xiaohu You, Andreas Peter Burg
2025	J	`jnl`	Edge-Spreading Raptor-Like LDPC Codes for 6G Wireless Systems. IEEE Trans. Commun. Yuqing Ren, Leyu Zhang, Yifei Shen, Wenqing Song, Emmanuel Boutillon, Alexios Balatsoukas-Stimming, Andreas Peter Burg
2025	—	`conf`	Enhancing Channel Decoding Through Full-Custom Hardware Design. IEEECONF Ludovic Damien Blanc, Alessandro Cardinale, Wenqing Song, Yifei Shen, Christoph Müller, Andreas Peter Burg
2022	J	`jnl`	Dynamic SCL Decoder With Path-Flipping for 5G Polar Codes. IEEE Wirel. Commun. Lett. Yifei Shen, Alexios Balatsoukas-Stimming, Xiaohu You, Chuan Zhang, Andreas Peter Burg
2022	—	`conf`	Fast Sequence Repetition Node-Based Successive Cancellation List Decoding for Polar Codes. ICC Yifei Shen, Yuqing Ren, Andreas Toftegaard Kristensen, Alexios Balatsoukas-Stimming, Xiaohu You, Chuan Zhang, Andreas Peter Burg
2017	J	`jnl`	A Multi-Gbps Unrolled Hardware List Decoder for a Systematic Polar Code. CoRR Pascal Giard, Alexios Balatsoukas-Stimming, Thomas Christoph Müller, Andreas Peter Burg, Claude Thibeault, Warren J. Gross
2016	Misc	`conf`	A multi-Gbps unrolled hardware list decoder for a systematic polar code. ACSSC Pascal Giard, Alexios Balatsoukas-Stimming, Thomas Christoph Müller, Andreas Peter Burg, Claude Thibeault, Warren J. Gross
2016	—	`conf`	Approximate computing for unreliable silicon. DTIS Andreas Peter Burg
2016	—	`conf`	Digital predistortion of power amplifier non-linearities for full-duplex transceivers. SPAWC Andrew Charles Mallory Austin, Alexios Balatsoukas-Stimming, Andreas Peter Burg
2016	C	`conf`	Hardware decoders for polar codes: An overview. ISCAS Pascal Giard, Gabi Sarkis, Alexios Balatsoukas-Stimming, YouZhe Fan, Chi-Ying Tsui, Andreas Peter Burg, Claude Thibeault, Warren J. Gross
2016	J	`jnl`	Near-Field Perturbation Effect on Constellation Error in Beam-Space MIMO. CoRR Mohsen Yousefbeiki, Juan R. Mosig, Andreas Peter Burg
2016	J	`jnl`	Sliding Window Spectrum Sensing for Full-Duplex Cognitive Radios with Low Access-Latency. CoRR Orion Afisiadis, Andrew Charles Mallory Austin, Alexios Balatsoukas-Stimming, Andreas Peter Burg
2016	A*	`conf`	Statistical fault injection for impact-evaluation of timing errors on application performance. DAC Jeremy Constantin, Andreas Peter Burg, Zheng Wang, Anupam Chattopadhyay, Georgios Karakonstantis
2015	J	`jnl`	A Fully-Unrolled LDPC Decoder Based on Quantized Message Passing. CoRR Alexios Balatsoukas-Stimming, Michael Meidlinger, Reza Ghanaatian, Gerald Matz, Andreas Peter Burg
2015	J	`jnl`	An Evolved GSM/EDGE Baseband ASIC Supporting Rx Diversity. IEEE J. Solid State Circuits Harald Kröll, Stefan Zwicky, Benjamin Weber, Christoph Roth, David Tschopp, Christian Benkeser, Andreas Peter Burg, Qiuting Huang
2015	—	`conf`	Controlled placement of standard cell memory arrays for high density and low power in 28nm FD-SOI. ASP-DAC Adam Teman, Davide Rossi, Pascal Andreas Meinerzhagen, Luca Benini, Andreas Peter Burg
2015	B	`conf`	Demo: Concurrent Spectrum Sensing and Transmission for Cognitive Radio using Self-Interference Cancellation. MobiHoc Andrew Charles Mallory Austin, Orion Afisiadis, Alexios Balatsoukas-Stimming, Andreas Peter Burg
2015	A	`conf`	Energy versus data integrity trade-offs in embedded high-density logic compatible dynamic memories. DATE Adam Teman, Georgios Karakonstantis, Robert Giterman, Pascal Andreas Meinerzhagen, Andreas Peter Burg
2015	J	`jnl`	LLR-Based Successive Cancellation List Decoding of Polar Codes. IEEE Trans. Signal Process. Alexios Balatsoukas-Stimming, Mani Bastani Parizi, Andreas Peter Burg
2015	A	`conf`	On the statistical memory architecture exploration and optimization. DATE Charalampos Antoniadis, Georgios Karakonstantis, Nestor E. Evmorfopoulos, Andreas Peter Burg, George I. Stamoulis
2015	J	`jnl`	Quantized Message Passing for LDPC Codes. CoRR Michael Meidlinger, Alexios Balatsoukas-Stimming, Andreas Peter Burg, Gerald Matz
2015	C	`conf`	Refresh-free dynamic standard-cell based memories: Application to a QC-LDPC decoder. ISCAS Pascal Andreas Meinerzhagen, Andrea Bonetti, Georgios Karakonstantis, Christoph Roth, Frank Giirkaynak, Andreas Peter Burg
2014	J	`jnl`	A Low-Complexity Improved Successive Cancellation Decoder for Polar Codes. CoRR Orion Afisiadis, Alexios Balatsoukas-Stimming, Andreas Peter Burg
2014	C	`conf`	A Wireless Body Sensor Network for Activity Monitoring with Low Transmission Overhead. EUC Rubén Braojos, Ivan Beretta, Jeremy Constantin, Andreas Peter Burg, David Atienza
2014	—	`conf`	An evolved EDGE PHY ASIC supporting soft-output equalization and Rx diversity. ESSCIRC Harald Kroll, Stefan Zwicky, Benjamin Weber, Christoph Roth, Christian Benkeser, Andreas Peter Burg, Qiuting Huang
2014	J	`jnl`	Energy/Reliability Trade-Offs in Low-Voltage ReRAM-Based Non-Volatile Flip-Flop Design. IEEE Trans. Circuits Syst. I Regul. Pap. Ibrahim Kazi, Pascal Andreas Meinerzhagen, Pierre-Emmanuel Gaillardon, Davide Sacchetto, Yusuf Leblebici, Andreas Peter Burg, Giovanni De Micheli
2014	J	`jnl`	On Metric Sorting for Successive Cancellation List Decoding of Polar Codes. CoRR Alexios Balatsoukas-Stimming, Mani Bastani Parizi, Andreas Peter Burg
2012	—	`conf`	A 500 fW/bit 14 fJ/bit-access 4kb standard-cell based sub-VT memory in 65nm CMOS. ESSCIRC Pascal Andreas Meinerzhagen, Oskar Andersson, Babak Mohammadi, S. M. Yasser Sherazi, Andreas Peter Burg, Joachim Neves Rodrigues
2012	C	`conf`	Two-port low-power gain-cell storage array: Voltage scaling and retention time. ISCAS Rashid Iqbal, Pascal Andreas Meinerzhagen, Andreas Peter Burg
2011	—	`conf`	A 772Mbit/s 8.81bit/nJ 90nm CMOS soft-input soft-output sphere decoder. A-SSCC Filippo Borlenghi, Ernst Martin Witte, Gerd Ascheid, Heinrich Meyr, Andreas Peter Burg
2011	J	`jnl`	Benchmarking of Standard-Cell Based Memories in the Sub- V IEEE J. Emerg. Sel. Topics Circuits Syst. Pascal Andreas Meinerzhagen, S. M. Yasser Sherazi, Andreas Peter Burg, Joachim Neves Rodrigues
2011	—	`conf`	Design and failure analysis of logic-compatible multilevel gain-cell-based dram for fault-tolerant VLSI systems. ACM Great Lakes Symposium on VLSI Pascal Andreas Meinerzhagen, Onur Andiç, Jürg Treichler, Andreas Peter Burg
2011	—	`conf`	Random sampling ADC for sparse spectrum sensing. EUSIPCO Patrick Maechler, Norbert Felber, Andreas Peter Burg
2011	—	`conf`	Synthesis strategies for sub-VT systems. ECCTD Pascal Andreas Meinerzhagen, Oskar Andersson, S. M. Yasser Sherazi, Andreas Peter Burg, Joachim Neves Rodrigues
2006	—	`conf`	VLSI implementation of pipelined sphere decoding with early termination. EUSIPCO Andreas Peter Burg, Markus Wenk, Wolfgang Fichtner
2005	—	`conf`	ASIC implementation of a MIMO-OFDM transceiver for 192 Mbps WLANs. ESSCIRC David Perels, Simon Haene, Peter Luethi, Andreas Peter Burg, Norbert Felber, Wolfgang Fichtner, Helmut Bölcskei
2003	J	`jnl`	Prototype experience for MIMO BLAST over third-generation wireless system. IEEE J. Sel. Areas Commun. Ali Adjoudani, Eric C. Beck, Andreas Peter Burg, Goran M. Djuknic, Thomas G. Gvoth, David A. Haessig, Salim Manji, Michelle A. Milbrodt, Markus Rupp, Dragan Samardzija, Arnold B. Siegel, Tod Sizer, Cuong Tran, Susan Walker, Stephen A. Wilkus, Peter W. Wolniansky