Andreas Moshovos

147 papers A* 42A 16B 11C 6Misc 2Journal 41Unranked 29

Year	Rank	Type	Title / Venue / Authors
2024	—	`conf`	Atalanta: A Bit is Worth a "Thousand" Tensor Values. ASPLOS (2) Alberto Delmas Lascorz, Mostafa Mahmoud, Ali Hadi Zadeh, Milos Nikolic, Kareem Ibrahim, Christina Giannoula, Ameer Abdelhadi, Andreas Moshovos
2024	C	`conf`	BitPruning: Learning Bitlengths for Aggressive and Accurate Quantization. ISCAS Milos Nikolic, Ghouthi Boukli Hacene, Ciaran Bannon, Alberto Delmas Lascorz, Matthieu Courbariaux, Omar Mohamed Awad, Isak Edo Vivancos, Yoshua Bengio, Vincent Gripon, Andreas Moshovos
2024	—	`conf`	Every Bit Matters: A Hardware/Software Approach for Enabling More Powerful Machine Learning Models. IEEECONF Enrique Torres-Sánchez, Milos Nikolic, Kareem Ibrahim, Alberto Delmas Lascorz, Ali Hadi Zadeh, Jiahui Wang, Ameer Abdelhadi, Mostafa Mahmoud, Christina Giannoula, Andreas Moshovos
2024	—	`conf`	Low-Bitwidth Floating Point Quantization for Efficient High-Quality Diffusion Models. IISWC Cheng Chen, Christina Giannoula, Andreas Moshovos
2024	J	`jnl`	Low-Bitwidth Floating Point Quantization for Efficient High-Quality Diffusion Models. CoRR Cheng Chen, Christina Giannoula, Andreas Moshovos
2024	—	`conf`	Marple: Scalable Spike Sorting for Untethered Brain-Machine Interfacing. ASPLOS (2) Eugene Sha, Andy Wei Liu, Kareem Ibrahim, Mostafa Mahmoud, Christina Giannoula, Ameer Abdelhadi, Andreas Moshovos
2024	—	`conf`	Schrodinger's FP Training Neural Networks with Dynamic Floating-Point Containers. MLSys Milos Nikolic, Enrique Torres-Sánchez, Jiahui Wang, Ali Hadi Zadeh, Mostafa Mahmoud, Ameer Abdelhadi, Kareem Ibrahim, Andreas Moshovos
2023	J	`jnl`	39 000-Subexposures/s Dual-ADC CMOS Image Sensor With Dual-Tap Coded-Exposure Pixels for Single-Shot HDR and 3-D Computational Imaging. IEEE J. Solid State Circuits Rahul Gulve, Navid Sarhangnejad, Gairik Dutta, Motasem Sakr, Don Nguyen, Roberto Rangel, Wenzheng Chen, Zhengfan Xia, Mian Wei, Nikita Gusev, Esther Y. H. Lin, Xiaonong Sun, Leo Hanxu, Nikola Katic, Ameer M. S. Abdelhadi, Andreas Moshovos, Kiriakos N. Kutulakos, Roman Genov
2023	—	`conf`	cuSCNN : an Efficient CUDA Implementation of Sparse CNNs. HEART Mohamed A. Elgammal, Omar Mohamed Awad, Isak Edo Vivancos, Andreas Moshovos, Vaughn Betz
2022	—	`conf`	A 39, 000 Subexposures/s CMOS Image Sensor with Dual-tap Coded-exposure Data-memory Pixel for Adaptive Single-shot Computational Imaging. VLSI Technology and Circuits Rahul Gulve, Navid Sarhangnejad, Gairik Dutta, Motasem Sakr, Don Nguyen, Roberto Rangel, Wenzheng Chen, Zhengfan Xia, Mian Wei, Nikita Gusev, Esther Y. H. Lin, Xiaonong Sun, Leo Hanxu, Nikola Katic, Ameer Abdelhadi, Andreas Moshovos, Kiriakos N. Kutulakos, Roman Genov
2022	—	`conf`	A Massive-Scale Brain Activity Decoding Chip. HCS Ameer Abdelhadi, Eugene Sha, Andreas Moshovos
2022	J	`jnl`	APack: Off-Chip, Lossless Data Compression for Efficient Deep Learning Inference. CoRR Alberto Delmas Lascorz, Mostafa Mahmoud, Andreas Moshovos
2022	J	`jnl`	Mokey: Enabling Narrow Fixed-Point Inference for Out-of-the-Box Floating-Point Transformer Models. CoRR Ali Hadi Zadeh, Mostafa Mahmoud, Ameer Abdelhadi, Andreas Moshovos
2022	A*	`conf`	Mokey: enabling narrow fixed-point inference for out-of-the-box floating-point transformer models. ISCA Ali Hadi Zadeh, Mostafa Mahmoud, Ameer Abdelhadi, Andreas Moshovos
2022	J	`jnl`	Schrödinger's FP: Dynamic Adaptation of Floating-Point Containers for Deep Learning Training. CoRR Milos Nikolic, Enrique Torres-Sánchez, Jiahui Wang, Ali Hadi Zadeh, Mostafa Mahmoud, Ameer Abdelhadi, Andreas Moshovos
2021	—	`conf`	Boveda: Building an On-Chip Deep Learning Memory Hierarchy Brick by Brick. MLSys Isak Edo Vivancos, Sayeh Sharify, Daniel Ly-Ma, Ameer Abdelhadi, Ciaran Bannon, Milos Nikolic, Mostafa Mahmoud, Alberto Delmas Lascorz, Gennady Pekhimenko, Andreas Moshovos
2021	A*	`conf`	FPRaker: A Processing Element For Accelerating Neural Network Training. MICRO Omar Mohamed Awad, Mostafa Mahmoud, Isak Edo, Ali Hadi Zadeh, Ciaran Bannon, Anand Jayarajan, Gennady Pekhimenko, Andreas Moshovos
2021	A*	`conf`	Noema: Hardware-Efficient Template Matching for Neural Population Pattern Detection. MICRO Ameer M. S. Abdelhadi, Eugene Sha, Ciaran Bannon, Hendrik Steenland, Andreas Moshovos
2020	J	`jnl`	BitPruning: Learning Bitlengths for Aggressive and Accurate Quantization. CoRR Milos Nikolic, Ghouthi Boukli Hacene, Ciaran Bannon, Alberto Delmas Lascorz, Matthieu Courbariaux, Yoshua Bengio, Vincent Gripon, Andreas Moshovos
2020	J	`jnl`	FPRaker: A Processing Element For Accelerating Neural Network Training. CoRR Omar Mohamed Awad, Mostafa Mahmoud, Isak Edo Vivancos, Ali Hadi Zadeh, Ciaran Bannon, Anand Jayarajan, Gennady Pekhimenko, Andreas Moshovos
2020	A*	`conf`	GOBO: Quantizing Attention-Based NLP Models for Low Latency and Energy Efficient Inference. MICRO Ali Hadi Zadeh, Isak Edo, Omar Mohamed Awad, Andreas Moshovos
2020	J	`jnl`	GOBO: Quantizing Attention-Based NLP Models for Low Latency and Energy Efficient Inference. CoRR Ali Hadi Zadeh, Andreas Moshovos
2020	A*	`conf`	Late Breaking Results: Building an On-Chip Deep Learning Memory Hierarchy Brick by Brick. DAC Isak Edo Vivancos, Sayeh Sharify, Milos Nikolic, Ciaran Bannon, Mostafa Mahmoud, Alberto Delmas Lascorz, Andreas Moshovos
2020	J	`jnl`	TensorDash: Exploiting Sparsity to Accelerate Deep Neural Network Training and Inference. CoRR Mostafa Mahmoud, Isak Edo Vivancos, Ali Hadi Zadeh, Omar Mohamed Awad, Gennady Pekhimenko, Jorge Albericio, Andreas Moshovos
2020	A*	`conf`	TensorDash: Exploiting Sparsity to Accelerate Deep Neural Network Training. MICRO Mostafa Mahmoud, Isak Edo, Ali Hadi Zadeh, Omar Mohamed Awad, Gennady Pekhimenko, Jorge Albericio, Andreas Moshovos
2019	J	`jnl`	Accelerating Image-Sensor-Based Deep Learning Applications. IEEE Micro Mostafa Mahmoud, Dylan Malone Stuart, Zissis Poulos, Alberto Delmas Lascorz, Patrick Judd, Sayeh Sharify, Milos Nikolic, Kevin Siu, Isak Edo Vivancos, Jorge Albericio, Andreas Moshovos
2019	—	`conf`	BWA-MEM Performance: Suffix Array Storage Size. BHI Meysam Roodi, Zahra Lak, Andreas Moshovos
2019	A*	`conf`	Bit-Tactical: A Software/Hardware Approach to Exploiting Value and Bit Sparsity in Neural Networks. ASPLOS Alberto Delmas Lascorz, Patrick Judd, Dylan Malone Stuart, Zissis Poulos, Mostafa Mahmoud, Sayeh Sharify, Milos Nikolic, Kevin Siu, Andreas Moshovos
2019	B	`conf`	Characterizing Sources of Ineffectual Computations in Deep Learning Networks. ISPASS Milos Nikolic, Mostafa Mahmoud, Andreas Moshovos, Yiren Zhao, Robert Mullins
2019	—	`conf`	Deep Learning Language Modeling Workloads: Where Time Goes on Graphics Processors. IISWC Ali Hadi Zadeh, Zissis Poulos, Andreas Moshovos
2019	A*	`conf`	Laconic deep learning inference acceleration. ISCA Sayeh Sharify, Alberto Delmas Lascorz, Mostafa Mahmoud, Milos Nikolic, Kevin Siu, Dylan Malone Stuart, Zissis Poulos, Andreas Moshovos
2019	C	`conf`	MemAlign: A Memory Structure to Accelerate Gene Sequencing. BIBE Meysam Roodi, Andreas Moshovos
2019	—	`conf`	SW+: On Accelerating Smith-Waterman Execution of GATK HaplotypeCaller. CIBB Meysam Roodi, Andreas Moshovos
2019	A*	`conf`	ShapeShifter: Enabling Fine-Grain Data Width Adaptation in Deep Learning. MICRO Alberto Delmas Lascorz, Sayeh Sharify, Isak Edo Vivancos, Dylan Malone Stuart, Omar Mohamed Awad, Patrick Judd, Mostafa Mahmoud, Milos Nikolic, Kevin Siu, Zissis Poulos, Andreas Moshovos
2019	J	`jnl`	Training CNNs faster with Dynamic Input and Kernel Downsampling. CoRR Zissis Poulos, Ali Nouri, Andreas Moshovos
2018	J	`jnl`	Bit-Tactical: Exploiting Ineffectual Computations in Convolutional Neural Networks: Which, Why, and How. CoRR Alberto Delmas, Patrick Judd, Dylan Malone Stuart, Zissis Poulos, Mostafa Mahmoud, Sayeh Sharify, Milos Nikolic, Andreas Moshovos
2018	—	`conf`	Characterizing Sources of Ineffectual Computations in Deep Learning Networks. IISWC Milos Nikolic, Mostafa Mahmoud, Andreas Moshovos
2018	J	`jnl`	DPRed: Making Typical Activation Values Matter In Deep Learning Computing. CoRR Alberto Delmas, Sayeh Sharify, Patrick Judd, Milos Nikolic, Andreas Moshovos
2018	A*	`conf`	Diffy: a Déjà vu-Free Differential Deep Neural Network Accelerator. MICRO Mostafa Mahmoud, Kevin Siu, Andreas Moshovos
2018	J	`jnl`	Exploiting Typical Values to Accelerate Deep Learning. Computer Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas Lascorz, Sayeh Sharify, Zissis Poulos, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger
2018	—	`conf`	Gene Sequencing: Where Time Goes. IISWC Meysam Roodi, Andreas Moshovos
2018	—	`conf`	Identifying and Exploiting Ineffectual Computations to Enable Hardware Acceleration of Deep Learning. NEWCAS Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas, Sayeh Sharify, Mostafa Mahmoud, Tayler H. Hetherington, Milos Nikolic, Dylan Malone Stuart, Kevin Siu, Zissis Poulos, Tor M. Aamodt, Natalie D. Enright Jerger
2018	J	`jnl`	Laconic Deep Learning Computing. CoRR Sayeh Sharify, Mostafa Mahmoud, Alberto Delmas Lascorz, Milos Nikolic, Andreas Moshovos
2018	A*	`conf`	Loom: exploiting weight and activation precisions to accelerate convolutional neural networks. DAC Sayeh Sharify, Alberto Delmas Lascorz, Kevin Siu, Patrick Judd, Andreas Moshovos
2018	—	`conf`	Memory Requirements for Convolutional Neural Network Hardware Accelerators. IISWC Kevin Siu, Dylan Malone Stuart, Mostafa Mahmoud, Andreas Moshovos
2018	J	`jnl`	Proteus: Exploiting precision variability in deep neural networks. Parallel Comput. Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Raquel Urtasun, Andreas Moshovos
2018	—	`conf`	Value-Based Deep Learning Hardware Acceleration. NoCArc@MICRO Andreas Moshovos
2018	J	`jnl`	Value-Based Deep-Learning Acceleration. IEEE Micro Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas Lascorz, Sayeh Sharify, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger
2017	—	`conf`	Bit-Pragmatic Deep Neural Network Computing. ICLR (Workshop) Jorge Albericio, Patrick Judd, Alberto Delmas, Sayeh Sharify, Andreas Moshovos
2017	A*	`conf`	Bit-pragmatic deep neural network computing. MICRO Jorge Albericio, Alberto Delmas, Patrick Judd, Sayeh Sharify, Gerard O'Leary, Roman Genov, Andreas Moshovos
2017	J	`jnl`	Cnvlutin2: Ineffectual-Activation-and-Weight-Free Deep Neural Network Computing. CoRR Patrick Judd, Alberto Delmas Lascorz, Sayeh Sharify, Andreas Moshovos
2017	J	`jnl`	Dynamic Stripes: Exploiting the Dynamic Precision Requirements of Activation Values in Neural Networks. CoRR Alberto Delmas, Patrick Judd, Sayeh Sharify, Andreas Moshovos
2017	A*	`conf`	IDEAL: image denoising accelerator. MICRO Mostafa Mahmoud, Bojian Zheng, Alberto Delmas Lascorz, Felix Heide, Jonathan Assouline, Paul Boucher, Emmanuel Onzon, Andreas Moshovos
2017	J	`jnl`	Loom: Exploiting Weight and Activation Precisions to Accelerate Convolutional Neural Networks. CoRR Sayeh Sharify, Alberto Delmas Lascorz, Patrick Judd, Andreas Moshovos
2017	J	`jnl`	Stripes: Bit-Serial Deep Neural Network Computing. IEEE Comput. Archit. Lett. Patrick Judd, Jorge Albericio, Andreas Moshovos
2017	J	`jnl`	Tartan: Accelerating Fully-Connected and Convolutional Layers in Deep Learning Networks by Exploiting Numerical Precision Variability. CoRR Alberto Delmas, Sayeh Sharify, Patrick Judd, Andreas Moshovos
2016	J	`jnl`	Bit-pragmatic Deep Neural Network Computing. CoRR Jorge Albericio, Patrick Judd, Alberto Delmas Lascorz, Sayeh Sharify, Andreas Moshovos
2016	A*	`conf`	Cnvlutin: Ineffectual-Neuron-Free Deep Neural Network Computing. ISCA Jorge Albericio, Patrick Judd, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Andreas Moshovos
2016	J	`jnl`	Memory Controller Design Under Cloud Workloads. CoRR Mostafa Mahmoud, Andreas Moshovos
2016	—	`conf`	Memory controller design under cloud workloads. IISWC Mostafa Mahmoud, Andreas Moshovos
2016	B	`conf`	Message from the program chair. ISPASS Andreas Moshovos
2016	A	`conf`	Proteus: Exploiting Numerical Precision Variability in Deep Neural Networks. ICS Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Andreas Moshovos
2016	A*	`conf`	Stripes: Bit-serial deep neural network computing. MICRO Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Andreas Moshovos
2015	A*	`conf`	Doppelgänger: a cache for approximate computing. MICRO Joshua San Miguel, Jorge Albericio, Andreas Moshovos, Natalie D. Enright Jerger
2015	A*	`conf`	Prediction-based superpage-friendly TLB designs. HPCA Misel-Myrto Papadopoulou, Xin Tong, André Seznec, Andreas Moshovos
2015	B	`conf`	QTrace: a framework for customizable full system instrumentation. ISPASS Xin Tong, Andreas Moshovos
2015	J	`jnl`	Reduced-Precision Strategies for Bounded Memory in Deep Neural Nets. CoRR Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Raquel Urtasun, Andreas Moshovos
2015	A*	`conf`	Self-contained, accurate precomputation prefetching. MICRO Islam Atta, Xin Tong, Vijayalakshmi Srinivasan, Ioana Baldini, Andreas Moshovos
2014	J	`jnl`	ADDICT: Advanced Instruction Chasing for Transactions. Proc. VLDB Endow. Pinar Tözün, Islam Atta, Anastasia Ailamaki, Andreas Moshovos
2014	—	`conf`	Advanced branch predictors for soft processors. ReConFig Di Wu, Andreas Moshovos
2014	Misc	`conf`	An Architectural Approach to Characterizing and Eliminating Sources of Inefficiency in a Soft Processor Design. FCCM Kaveh Aasaraai, Andreas Moshovos
2014	C	`conf`	BarTLB: Barren page resistant TLB for managed runtime languages. ICCD Xin Tong, Andreas Moshovos
2014	—	`conf`	Evaluating the memory system behavior of smartphone workloads. ICSAMOS Goran Narancic, Patrick Judd, Di Wu, Islam Atta, Michel Elnacouzi, Jason Zebchuk, Jorge Albericio, Natalie D. Enright Jerger, Andreas Moshovos, Kyros Kutulakos, Serag GadelRab
2014	Misc	`conf`	Image Signal Processors on FPGAs. FCCM Di Wu, Andreas Moshovos
2014	J	`jnl`	Optimizing Memory Translation Emulation in Full System Emulators. ACM Trans. Archit. Code Optim. Xin Tong, Toshihiko Koju, Motohiro Kawahito, Andreas Moshovos
2014	—	`conf`	What limits the operating frequency of a soft processor design. ReConFig Kaveh Aasaraai, Andreas Moshovos
2014	A*	`conf`	Wormhole: Wisely Predicting Multidimensional Branches. MICRO Jorge Albericio, Joshua San Miguel, Natalie D. Enright Jerger, Andreas Moshovos
2013	A	`conf`	A dual grain hit-miss detector for large die-stacked DRAM caches. DATE Michel El-Nacouzi, Islam Atta, Myrto Papadopoulou, Jason Zebchuk, Natalie D. Enright Jerger, Andreas Moshovos
2013	A	`conf`	Characterizing the performance benefits of fused CPU/GPU systems using FusionSim. DATE Vitaly Zakharenko, Tor M. Aamodt, Andreas Moshovos
2013	B	`conf`	Low-cost, high-performance branch predictors for soft processors. FPL Di Wu, Kaveh Aasaraai, Andreas Moshovos
2013	A*	`conf`	Multi-grain coherence directories. MICRO Jason Zebchuk, Babak Falsafi, Andreas Moshovos
2013	B	`conf`	QTrace: An interface for customizable full system instrumentation. ISPASS Xin Tong, Jack Luo, Andreas Moshovos
2013	A*	`conf`	RECAP: A region-based cure for the common cold (cache). HPCA Jason Zebchuk, Harold W. Cain, Xin Tong, Vijayalakshmi Srinivasan, Andreas Moshovos
2013	A*	`conf`	STREX: boosting instruction cache reuse in OLTP workloads through stratified transaction execution. ISCA Islam Atta, Pinar Tözün, Xin Tong, Anastasia Ailamaki, Andreas Moshovos
2012	J	`jnl`	NCOR: An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution. Int. J. Reconfigurable Comput. Kaveh Aasaraai, Andreas Moshovos
2012	B	`conf`	Pointy: a hybrid pointer prefetcher for managed runtime systems. PACT Ioana Burcea, Livio Soares, Andreas Moshovos
2012	B	`conf`	ReCaP: a region-based cure for the common cold cache. PACT Jason Zebchuk, Harold W. Cain, Vijayalakshmi Srinivasan, Andreas Moshovos
2012	C	`conf`	Reducing OLTP instruction misses with thread migration. DaMoN Islam Atta, Pinar Tözün, Anastasia Ailamaki, Andreas Moshovos
2012	A*	`conf`	SLICC: Self-Assembly of Instruction Cache Collectives for OLTP Workloads. MICRO Islam Atta, Pinar Tözün, Anastasia Ailamaki, Andreas Moshovos
2012	—	`conf`	SPREX: A soft processor with Runahead execution. ReConFig Kaveh Aasaraai, Andreas Moshovos
2012	A	`conf`	Toward virtualizing branch direction prediction. DATE Maryam Sadooghi-Alvandi, Kaveh Aasaraai, Andreas Moshovos
2011	A*	`ed.`	44rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2011, Porto Alegre, Brazil, December 3-7, 2011 MICRO Carlo Galuzzi, Luigi Carro, Andreas Moshovos, Milos Prvulovic
2011	J	`jnl`	Two-Stage, Pipelined Register Renaming. IEEE Trans. Very Large Scale Integr. Syst. Elham Safi, Andreas Moshovos, Andreas G. Veneris
2010	—	`conf`	An Efficient Non-blocking Data Cache for Soft Processors. ReConFig Kaveh Aasaraai, Andreas Moshovos
2010	B	`conf`	Demystifying GPU microarchitecture through microbenchmarking. ISPASS Henry Wong, Misel-Myrto Papadopoulou, Maryam Sadooghi-Alvandi, Andreas Moshovos
2010	—	`conf`	Design space exploration of instruction schedulers for out-of-order soft processors. FPT Kaveh Aasaraai, Andreas Moshovos
2010	J	`jnl`	Making Address-Correlated Prefetching Practical. IEEE Micro Thomas F. Wenisch, Michael Ferdman, Anastasia Ailamaki, Babak Falsafi, Andreas Moshovos
2010	J	`jnl`	On the Latency and Energy of Checkpointed Superscalar Register Alias Tables. IEEE Trans. Very Large Scale Integr. Syst. Elham Safi, Andreas Moshovos, Andreas G. Veneris
2010	A	`ed.`	Proceedings of the CGO 2010, The 8th International Symposium on Code Generation and Optimization, Toronto, Ontario, Canada, April 24-28, 2010 CGO Andreas Moshovos, J. Gregory Steffan, Kim M. Hazelwood, David R. Kaeli
2009	—	`conf`	A physical-level study of the compacted matrix instruction scheduler for dynamically-scheduled superscalar processors. ICSAMOS Elham Safi, Andreas Moshovos, Andreas G. Veneris
2009	A*	`conf`	A tagless coherence directory. MICRO Jason Zebchuk, Vijayalakshmi Srinivasan, Moinuddin K. Qureshi, Andreas Moshovos
2009	A*	`conf`	Phantom-BTB: a virtualized branch target buffer design. ASPLOS Ioana Burcea, Andreas Moshovos
2009	A*	`conf`	Practical off-chip meta-data for temporal memory streaming. HPCA Thomas F. Wenisch, Michael Ferdman, Anastasia Ailamaki, Babak Falsafi, Andreas Moshovos
2009	B	`conf`	Towards a viable out-of-order soft core: Copy-Free, checkpointed register renaming. FPL Kaveh Aasaraai, Andreas Moshovos
2008	B	`ed.`	17th International Conference on Parallel Architectures and Compilation Techniques, PACT 2008, Toronto, Ontario, Canada, October 25-29, 2008 PACT Andreas Moshovos, David Tarditi, Kunle Olukotun
2008	A	`conf`	A physical level study and optimization of CAM-based checkpointed register alias table. ISLPED Elham Safi, Andreas Moshovos, Andreas G. Veneris
2008	J	`jnl`	L-CBF: A Low-Power, Fast Counting Bloom Filter Architecture. IEEE Trans. Very Large Scale Integr. Syst. Elham Safi, Andreas Moshovos, Andreas G. Veneris
2008	A*	`conf`	Predictor virtualization. ASPLOS Ioana Burcea, Stephen Somogyi, Andreas Moshovos, Babak Falsafi
2008	A*	`conf`	Temporal instruction fetch streaming. MICRO Michael Ferdman, Thomas F. Wenisch, Anastasia Ailamaki, Babak Falsafi, Andreas Moshovos
2008	—	`conf`	Temporal streams in commercial server applications. IISWC Thomas F. Wenisch, Michael Ferdman, Anastasia Ailamaki, Babak Falsafi, Andreas Moshovos
2008	—	`conf`	Turbo-ROB: A Low Cost Checkpoint/Restore Accelerator. HiPEAC Patrick Akl, Andreas Moshovos
2007	J	`jnl`	A Building Block for Coarse-Grain Optimizations in the On-Chip Memory Hierarchy. IEEE Comput. Archit. Lett. Jason Zebchuk, Andreas Moshovos
2007	A*	`conf`	A Framework for Coarse-Grain Optimizations in the On-Chip Memory Hierarchy. MICRO Jason Zebchuk, Elham Safi, Andreas Moshovos
2007	A*	`conf`	Mechanisms for store-wait-free multiprocessors. ISCA Thomas F. Wenisch, Anastassia Ailamaki, Babak Falsafi, Andreas Moshovos
2007	A	`conf`	On the latency, energy and area of checkpointed, superscalar register alias tables. ISLPED Elham Safi, Patrick Akl, Andreas Moshovos, Andreas G. Veneris, Aggeliki Arapoyanni
2006	A	`conf`	BranchTap: improving performance with very few checkpoints through adaptive speculation control. ICS Patrick Akl, Andreas Moshovos
2006	J	`jnl`	Coarse-Grain Coherence Tracking: RegionScout and Region Coherence Arrays. IEEE Micro Jason F. Cantin, James E. Smith, Mikko H. Lipasti, Andreas Moshovos, Babak Falsafi
2006	A	`conf`	L-CBF: a low-power, fast counting bloom filter architecture. ISLPED Elham Safi, Andreas Moshovos, Andreas G. Veneris
2006	A*	`conf`	Spatial Memory Streaming. ISCA Stephen Somogyi, Thomas F. Wenisch, Anastassia Ailamaki, Babak Falsafi, Andreas Moshovos
2005	J	`jnl`	A Case for Asymmetric-Cell Cache Memories. IEEE Trans. Very Large Scale Integr. Syst. Andreas Moshovos, Babak Falsafi, Farid N. Najm, Navid Azizi
2005	—	`conf`	Memory State Compressors for Giga-Scale Checkpoint/Restore. IEEE PACT Andreas Moshovos, Alexandros Kostopoulos
2005	C	`conf`	RECAST: Boosting Tag Line Buffer Coverage in Low-Power High-Level Caches "for Free". ICCD Won-Ho Park, Andreas Moshovos, Babak Falsafi
2005	A*	`conf`	RegionScout: Exploiting Coarse Grain Sharing in Snoop-Based Coherence. ISCA Andreas Moshovos
2004	A*	`conf`	Accurate and Complexity-Effective Spatial Pattern Prediction. HPCA Chi F. Chen, Se-Hyun Yang, Babak Falsafi, Andreas Moshovos
2004	A	`conf`	SEPAS: a highly accurate energy-efficient branch predictor. ISLPED Amirali Baniasadi, Andreas Moshovos
2003	J	`jnl`	Behavior and Performance of Interactive Multi-Player Game Servers. Clust. Comput. Ahmed Abdelkhalek, Angelos Bilas, Andreas Moshovos
2003	A	`conf`	Checkpointing alternatives for high performance, power-aware processors. ISLPED Andreas Moshovos
2003	J	`jnl`	Low-leakage asymmetric-cell SRAM. IEEE Trans. Very Large Scale Integr. Syst. Navid Azizi, Farid N. Najm, Andreas Moshovos
2002	A	`conf`	Asymmetric-frequency clustering: a power-aware back-end for high-performance processors. ISLPED Amirali Baniasadi, Andreas Moshovos
2002	C	`conf`	Branch Predictor Prediction: A Power-Aware Branch Predictor for High-Performance Processors. ICCD Amirali Baniasadi, Andreas Moshovos
2002	A	`conf`	Low-leakage asymmetric-cell SRAM. ISLPED Navid Azizi, Andreas Moshovos, Farid N. Najm
2002	J	`jnl`	Reducing Memory Latency via Read-after-Read Memory Dependence Prediction. IEEE Trans. Computers Andreas Moshovos, Gurindar S. Sohi
2001	B	`conf`	Behavior and performance of interactive multi-player game servers. ISPASS Ahmed Abdelkhalek, Angelos Bilas, Andreas Moshovos
2001	A	`conf`	Instruction flow-based front-end throttling for power-aware high-performance processors. ISLPED Amirali Baniasadi, Andreas Moshovos
2001	A*	`conf`	JETTY: Filtering Snoops for Reduced Energy Consumption in SMP Servers. HPCA Andreas Moshovos, Gokhan Memik, Babak Falsafi, Alok N. Choudhary
2001	J	`jnl`	Microarchitectural innovations: boosting microprocessor performance beyond semiconductor technology scaling. Proc. IEEE Andreas Moshovos, Gurindar S. Sohi
2001	A	`conf`	Slice-processors: an implementation of operation-based prediction. ICS Andreas Moshovos, Dionisios N. Pnevmatikatos, Amirali Baniasadi
2000	A*	`conf`	CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit. ISCA Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithviraj Banerjee
2000	A*	`conf`	Instruction distribution heuristics for quad-cluster, dynamically-scheduled, superscalar processors. MICRO Amirali Baniasadi, Andreas Moshovos
2000	J	`jnl`	Memory Dependence Prediction in Multimedia Applications. J. Instr. Level Parallelism Andreas Moshovos, Gurindar S. Sohi
2000	A*	`conf`	Memory Dependence Speculation Tradeoffs in Centralized, Continuous-Window Superscalar Processors. HPCA Andreas Moshovos, Gurindar S. Sohi
1999	A	`conf`	Improving virtual function call target prediction via dependence-based pre-computation. International Conference on Supercomputing Amir Roth, Andreas Moshovos, Gurindar S. Sohi
1999	A*	`conf`	Read-After-Read Memory Dependence Prediction. MICRO Andreas Moshovos, Gurindar S. Sohi
1999	J	`jnl`	Speculative Memory Cloaking and Bypassing. Int. J. Parallel Program. Andreas Moshovos, Gurindar S. Sohi
1998	A*	`conf`	Dependance Based Prefetching for Linked Data Structures. ASPLOS Amir Roth, Andreas Moshovos, Gurindar S. Sohi
1997	A*	`conf`	Dynamic Speculation and Synchronization of Data Dependences. ISCA Andreas Moshovos, Scott E. Breach, T. N. Vijaykumar, Gurindar S. Sohi
1997	A*	`conf`	Streamlining Inter-Operation Memory Communication via Data Dependence Prediction. MICRO Andreas Moshovos, Gurindar S. Sohi