Andreas Koch - RankMe

190 papers A* 4A 5B 23C 12Misc 10Journal 39Unranked 90

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Bringing Data Transformations Near-Memory for Low-Latency Analytics in HTAP Environments. CoRR Arthur Bernhardt, David Volz, Sajjad Tamimi, Andreas Koch, Ilia Petrov
2026	—	`conf`	Co-Exploration of RISC-V Processor Microarchitectures and FreeRTOS Extensions for Lower Context-Switch Latency. ASPLOS (2) Markus Scheck, Tammo Mürmann, Andreas Koch
2026	J	`jnl`	Update NDP: On Offloading Modifications to Smart Storage with Transactional Guarantees in Near-Data Processing DBMS. ACM Trans. Database Syst. Arthur Bernhardt, Sajjad Tamimi, Florian Stock, Andreas Koch, Ilia Petrov
2025	—	`conf`	A Compute Graph Simulation and Implementation Framework Targeting AMD Versal AI Engines. SC Workshops Jonathan Strobl, Leonardo Solis-Vasquez, Yannick Lavan, Andreas Koch
2025	—	`conf`	Architecting Tensor Core-Based Reductions for Irregular Molecular Docking Kernels. SC Workshops Leonardo Solis-Vasquez, Andreas F. Tillack, Diogo Santos-Martins, Andreas Koch, Stefano Forli
2025	J	`jnl`	CINDA: Using Cache-Coherent Interconnects for Accelerating Databases by Enabling Near-Data Processing of Update Transactions. IEEE Trans. Computers Sajjad Tamimi, Arthur Bernhardt, Florian Stock, Ilia Petrov, Andreas Koch
2025	J	`jnl`	DANSEN: Database Acceleration on Native Computational Storage by Exploiting NDP. ACM Trans. Reconfigurable Technol. Syst. Sajjad Tamimi, Arthur Bernhardt, Florian Stock, Ilia Petrov, Andreas Koch
2025	—	`conf`	Improving mapping of convolutional neural networks on FPGAs through tailored macro sizes. IPDPS (Workshops) Brindusa Mihaela Damian-Kosterhon, Andreas Koch, Felix Kosterhon, Lucian Petrica
2025	J	`jnl`	Lightweight Authenticated Integration and In-Field Secure Operation of System-in-Package. ACM Trans. Design Autom. Electr. Syst. Christian Ewert, Andrija Neskovic, Carsten Heinz, Felix Muuss, Alexander Treff, Marc Gourjon, Rainer Buchty, Thomas Eisenbarth, Andreas Koch, Mladen Berekovic, Saleh Mulhem
2025	C	`conf`	PUL: Pre-load in Software for Caches Wouldn't Always Play Along. ADBIS Arthur Bernhardt, Sajjad Tamimi, Florian Stock, Andreas Koch, Ilia Petrov
2025	J	`jnl`	PUL: Pre-load in Software for Caches Wouldn't Always Play Along. CoRR Arthur Bernhardt, Sajjad Tamimi, Florian Stock, Andreas Koch, Ilia Petrov
2025	J	`jnl`	Reflecting on the Past 17 Years of Shingled Magnetic Recording for Insights Into Future Disk Transitions: A Survey. ACM Trans. Storage Babar Khan, Andreas Koch
2025	—	`conf`	SCAL: An Open-Source Scalable Core Adaptation Layer for Interfacing RISC-V ISA Extensions. ASAP Brindusa Mihaela Damian-Kosterhon, Florian Meisel, Andreas Koch
2025	—	`conf`	SNAcc: An Open-Source Framework for Streaming-based Network-to-Storage Accelerators. SC Workshops David Volz, Torben Kalkhof, Andreas Koch
2024	A	`conf`	A Scalable RISC-V Hardware Platform for Intelligent Sensor Processing. DATE Paul Palomero Bernardo, Patrick Schmid, Oliver Bringmann, Mohammed Iftekhar, Babak Sadiye, Wolfgang Müller, Andreas Koch, Eyck Jentzsch, Axel Sauer, Ingo Feldner, Wolfgang Ecker
2024	J	`jnl`	A survey on FPGA-based accelerator for ML models. CoRR Feng Yan, Andreas Koch, Oliver Sinnen
2024	—	`conf`	COSSEA: Context-based SoC Security Enforcement Architecture. SOCC Carsten Heinz, Andreas Koch
2024	—	`conf`	DeLiBA-K: Speeding-up Hardware-Accelerated Distributed Storage Access by Tighter Linux Kernel Integration and Use of a Modern API. SC Workshops Babar Khan, Andreas Koch
2024	—	`conf`	Enabling FPGA and AI Engine Tasks in the HPX Programming Framework for Heterogeneous High-Performance Computing. ARC Torben Kalkhof, Carsten Heinz, Andreas Koch
2024	—	`conf`	Graphtoy: Fast Software Simulation of Applications for AMD's AI Engines. ARC Jonathan Strobl, Leonardo Solis-Vasquez, Yannick Lavan, Andreas Koch
2024	J	`jnl`	Introduction to the Special Issue on FPL 2022. ACM Trans. Reconfigurable Technol. Syst. Andreas Koch, Kentaro Sano
2024	—	`conf`	Longnail: High-Level Synthesis of Portable Custom Instruction Set Extensions for RISC-V Processors from Descriptions in the Open-Source CoreDSL Language. ASPLOS (3) Julian Oppermann, Brindusa Mihaela Damian-Kosterhon, Florian Meisel, Tammo Mürmann, Eyck Jentzsch, Andreas Koch
2024	—	`conf`	Speeding-Up LULESH on HPX: Useful Tricks and Lessons Learned using a Many-Task-Based Approach. SC Workshops Torben Kalkhof, Andreas Koch
2024	J	`jnl`	TaPaFuzz: Hardware-accelerated RISC-V bare-metal firmware fuzzing using rapid job launches. J. Syst. Archit. Florian Meisel, Christoph Spang, David Volz, Andreas Koch
2024	—	`conf`	TaPaS Co-AIE: An Open-Source Framework for Streaming-Based Heterogeneous Acceleration Using AMD AI Engines. IPDPS (Workshops) Carsten Heinz, Torben Kalkhof, Yannick Lavan, Andreas Koch
2024	J	`jnl`	The Open-source DeLiBA2 Hardware/Software Framework for Distributed Storage Accelerators. ACM Trans. Reconfigurable Technol. Syst. Babar Khan, Carsten Heinz, Andreas Koch
2024	J	`jnl`	Zero-sided RDMA: Network-driven Data Shuffling for Disaggregated Heterogeneous Cloud DBMSs. Proc. ACM Manag. Data Matthias Jasny, Lasse Thostrup, Sajjad Tamimi, Andreas Koch, Zsolt István, Carsten Binnig
2023	—	`conf`	$\mathrm {DD\text {-}MPU}$: Dynamic and Distributed Memory Protection Unit for Embedded System-on-Chips. SAMOS Carsten Heinz, Andreas Koch
2023	—	`conf`	Altis-SYCL: Migrating Altis Benchmarking Suite from CUDA to SYCL for GPUs and FPGAs. SC Workshops Christoph Weckert, Leonardo Solis-Vasquez, Julian Oppermann, Andreas Koch, Oliver Sinnen
2023	—	`conf`	Experiences Migrating CUDA to SYCL: A Molecular Docking Case Study. IWOCL Leonardo Solis-Vasquez, Edward Mascarenhas, Andreas Koch
2023	J	`jnl`	Introduction to the Special Issue on FPT 2021. ACM Trans. Reconfigurable Technol. Syst. Andreas Koch, Wei Zhang
2023	—	`conf`	NVMulator: A Configurable Open-Source Non-volatile Memory Emulator for FPGAs. ARC Sajjad Tamimi, Arthur Bernhardt, Florian Stock, Ilia Petrov, Andreas Koch
2023	J	`jnl`	PQC-HA: A Framework for Prototyping and In-Hardware Evaluation of Post-Quantum Cryptography Hardware Accelerators. CoRR Richard Sattel, Christoph Spang, Carsten Heinz, Andreas Koch
2023	A*	`conf`	Software-Defined Wireless Communication Systems for Heterogeneous Architectures. MobiCom David Volz, Andreas Koch, Bastian Bloessl
2023	—	`conf`	TaPaFuzz - An FPGA-Accelerated Framework for RISC-V IoT Graybox Fuzzing. DASIP Florian Meisel, David Volz, Christoph Spang, Dat Tran, Andreas Koch
2023	C	`conf`	pimDB: From Main-Memory DBMS to Processing-In-Memory DBMS-Engines on Intelligent Memories. DaMoN Arthur Bernhardt, Andreas Koch, Ilia Petrov
2022	Misc	`conf`	An Evaluation of Using CCIX for Cache-Coherent Host-FPGA Interfacing. FCCM Sajjad Tamimi, Florian Stock, Andreas Koch, Arthur Bernhardt, Ilia Petrov
2022	J	`jnl`	Benchmarking the performance of irregular computations in AutoDock-GPU molecular docking. Parallel Comput. Leonardo Solis-Vasquez, Andreas F. Tillack, Diogo Santos-Martins, Andreas Koch, Scott LeGrand, Stefano Forli
2022	B	`conf`	Cache-Coherent Shared Locking for Transactionally Consistent Updates in Near-Data Processing DBMS on Smart Storage. EDBT Arthur Bernhardt, Sajjad Tamimi, Florian Stock, Tobias Vinçon, Andreas Koch, Ilia Petrov
2022	J	`jnl`	DExIE - An IoT-Class Hardware Monitor for Real-Time Fine-Grained Control-Flow Integrity. J. Signal Process. Syst. Christoph Spang, Yannick Lavan, Marco Hartmann, Florian Meisel, Andreas Koch
2022	B	`conf`	DeLiBA: An Open-Source Hardware/Software Framework for the Development of Linux Block I/O Accelerators. FPL Babar Khan, Carsten Heinz, Andreas Koch
2022	B	`conf`	Direct Device-to-Device Physical Page Migrations in Multi-FPGA Shared Virtual Memory Systems. FPL Torben Kalkhof, Andreas Koch
2022	—	`conf`	Exploiting High-Bandwidth Memory for FPGA-Acceleration of Inference on Sum-Product Networks. IPDPS Workshops Lukas Weber, Johannes Wirth, Lukas Sommer, Andreas Koch
2022	—	`conf`	IPEC: Open-Source Design Automation for Inter-Processing Element Communication. ARC David Volz, Christoph Spang, Andreas Koch
2022	J	`jnl`	Near-Data Processing in Database Systems on Native Computational Storage under HTAP Workloads. Proc. VLDB Endow. Tobias Vinçon, Christian Knödler, Leonardo Solis-Vasquez, Arthur Bernhardt, Sajjad Tamimi, Lukas Weber, Florian Stock, Andreas Koch, Ilia Petrov
2022	J	`jnl`	On the necessity of explicit cross-layer data formats in near-data processing systems. Distributed Parallel Databases Lukas Weber, Tobias Vinçon, Christian Knödler, Leonardo Solis-Vasquez, Arthur Bernhardt, Ilia Petrov, Andreas Koch
2022	J	`jnl`	On-Chip and Distributed Dynamic Parallelism for Task-based Hardware Accelerators. J. Signal Process. Syst. Carsten Heinz, Andreas Koch
2022	C	`conf`	Result-Set Management for NDP Operations on Smart Storage. DaMoN Tobias Vinçon, Christian Knödler, Arthur Bernhardt, Leonardo Solis-Vasquez, Lukas Weber, Andreas Koch, Ilia Petrov
2022	A*	`conf`	SCAIE-V: an open-source SCAlable interface for ISA extensions for RISC-V processors. DAC Mihaela Damian, Julian Oppermann, Christoph Spang, Andreas Koch
2022	A	`conf`	SPNC: An Open-Source MLIR-Based Compiler for Fast Sum-Product Network Inference on CPUs and GPUs. CGO Lukas Sommer, Cristian Axenie, Andreas Koch
2022	A	`conf`	The Scale4Edge RISC-V Ecosystem. DATE Wolfgang Ecker, Peer Adelt, Wolfgang Müller, Reinhold Heckmann, Milos Krstic, Vladimir Herdt, Rolf Drechsler, Gerhard Angst, Ralf Wimmer, Andreas Mauderer, Rafael Stahl, Karsten Emrich, Daniel Mueller-Gritschneder, Bernd Becker, Philipp Scholl, Eyck Jentzsch, Jan Schlamelcher, Kim Grüttner, Paul Palomero Bernardo, Oliver Bringmann, Mihaela Damian, Julian Oppermann, Andreas Koch, Jörg Bormann, Johannes Partzsch, Christian Mayr, Wolfgang Kunz
2022	A*	`conf`	neoDBMS: In-situ Snapshots for Multi-Version DBMS on Native Computational Storage. ICDE Arthur Bernhardt, Sajjad Tamimi, Tobias Vinçon, Christian Knödler, Florian Stock, Carsten Heinz, Andreas Koch, Ilia Petrov
2021	—	`conf`	A Framework for the Automatic Generation of FPGA-based Near-Data Processing Accelerators in Smart Storage Systems. IPDPS Workshops Lukas Weber, Lukas Sommer, Leonardo Solis-Vasquez, Tobias Vinçon, Christian Knödler, Arthur Bernhardt, Ilia Petrov, Andreas Koch
2021	C	`conf`	A cost model for NDP-aware query optimization for KV-stores. DaMoN Christian Knödler, Tobias Vinçon, Arthur Bernhardt, Ilia Petrov, Leonardo Solis-Vasquez, Lukas Weber, Andreas Koch
2021	—	`conf`	DExIE - An IoT-Class Hardware Monitor for Real-Time Fine-Grained Control-Flow Integrity. DASIP Christoph Spang, Yannick Lavan, Marco Hartmann, Florian Meisel, Andreas Koch
2021	—	`conf`	Efficient Operator Sharing Modulo Scheduling for Sum-Product Network Inference on FPGAs. SAMOS Hanna Kruppe, Lukas Sommer, Lukas Weber, Julian Oppermann, Cristian Axenie, Andreas Koch
2021	—	`conf`	Efficient Physical Page Migrations in Shared Virtual Memory Reconfigurable Computing Systems. FPT Torben Kalkhof, Andreas Koch
2021	—	`conf`	Exploiting 3D Memory for Accelerated In-Network Processing of Hash Joins in Distributed Databases. ARC Johannes Wirth, Jaco A. Hofmann, Lasse Thostrup, Andreas Koch, Carsten Binnig
2021	—	`conf`	Mapping Irregular Computations for Molecular Docking to the SX-Aurora TSUBASA Vector Engine. IA3@SC Leonardo Solis-Vasquez, Erich Focht, Andreas Koch
2021	—	`conf`	Near-Data FPGA-Accelerated Processing of Collective and Inference Operations in Disaggregated Memory Systems. H2RC@SC Carsten Heinz, Andreas Koch
2021	—	`conf`	Optimizing a Hardware Network Stack to Realize an In-Network ML Inference Application. H2RC@SC Marco Hartmann, Lukas Weber, Johannes Wirth, Lukas Sommer, Andreas Koch
2021	J	`jnl`	Porting and Optimizing Molecular Docking onto the SX-Aurora TSUBASA Vector Computer. Supercomput. Front. Innov. Leonardo Solis-Vasquez, Erich Focht, Andreas Koch
2021	—	`conf`	RT-LIFE: Portable RISC-V Interface for Real-Time Lightweight Security Enforcement. SAMOS Christoph Spang, Florian Meisel, Andreas Koch
2021	—	`conf`	SPNC: Accelerating Sum-Product Network Inference on CPUs and GPUs. ASAP Lukas Sommer, Michael Halkenhäuser, Cristian Axenie, Andreas Koch
2021	—	`conf`	SPNC: Fast Sum-Product Network Inference. PKDD/ECML Workshops (1) Lukas Sommer, Cristian Axenie, Andreas Koch
2021	—	`conf`	Scalable and Flexible High-Performance In-Network Processing of Hash Joins in Distributed Databases. FPT Johannes Wirth, Jaco A. Hofmann, Lasse Thostrup, Carsten Binnig, Andreas Koch
2021	—	`conf`	Supporting On-Chip Dynamic Parallelism for Task-Based Hardware Accelerators. ARC Carsten Heinz, Andreas Koch
2021	J	`jnl`	The TaPaSCo Open-Source Toolflow. J. Signal Process. Syst. Carsten Heinz, Jaco A. Hofmann, Jens Korinth, Lukas Sommer, Lukas Weber, Andreas Koch
2021	J	`jnl`	UltraSynth: Insights of a CGRA Integration into a Control Engineering Environment. J. Signal Process. Syst. Dennis Wolf, Andreas Engel, Tajas Ruschke, Andreas Koch, Christian Hochberger
2020	Misc	`conf`	Comparison of Arithmetic Number Formats for Inference in Sum-Product Networks on FPGAs. FCCM Lukas Sommer, Lukas Weber, Martin Kumm, Andreas Koch
2020	C	`conf`	Evaluating the Energy Efficiency of OpenCL-accelerated AutoDock Molecular Docking. PDP Leonardo Solis-Vasquez, Diogo Santos-Martins, Andreas Koch, Stefano Forli
2020	C	`conf`	Extending High-Level Synthesis with High-Performance Computing Performance Visualization. CLUSTER Jens Huthmann, Artur Podobas, Lukas Sommer, Andreas Koch, Kentaro Sano
2020	—	`conf`	GPU-Accelerated Drug Discovery with Docking on the Summit Supercomputer: Porting, Optimization, and Application to COVID-19 Research. BCB Scott LeGrand, Aaron Scheinberg, Andreas F. Tillack, Mathialakan Thavappiragasam, Josh Vincent Vermaas, Rupesh Agarwal, Jeff Larkin, Duncan Poole, Diogo Santos-Martins, Leonardo Solis-Vasquez, Andreas Koch, Stefano Forli, Oscar R. Hernandez, Jeremy C. Smith, Ada Sedova
2020	—	`conf`	Improving Job Launch Rates in the TaPaSCo FPGA Middleware by Hardware/Software-Co-Design. ROSS@SC Carsten Heinz, Jaco A. Hofmann, Lukas Sommer, Andreas Koch
2020	—	`conf`	On the Necessity of Explicit Cross-Layer Data Formats in Near-Data Processing Systems. ICDE Workshops Tobias Vinçon, Arthur Bernhardt, Lukas Weber, Andreas Koch, Ilia Petrov
2020	Misc	`conf`	OpenMP Device Offloading for Embedded Heterogeneous Platforms - Work-in-Progress. EMSOFT Lukas Sommer, Andreas Koch
2020	—	`conf`	OpenMP Device Offloading to FPGAs Using the Nymble Infrastructure. IWOMP Jens Huthmann, Lukas Sommer, Artur Podobas, Andreas Koch, Kentaro Sano
2020	—	`conf`	Parallelizing Irregular Computations for Molecular Docking. IA3@SC Leonardo Solis-Vasquez, Diogo Santos-Martins, Andreas F. Tillack, Andreas Koch, Jérôme Eberhardt, Stefano Forli
2020	C	`conf`	Using Parallel Programming Models for Automotive Workloads on Heterogeneous Systems - a Case Study. PDP Lukas Sommer, Florian Stock, Leonardo Solis-Vasquez, Andreas Koch
2020	J	`jnl`	nKV in Action: Accelerating KV-Stores on NativeComputational Storage with Near-Data Processing. Proc. VLDB Endow. Tobias Vinçon, Lukas Weber, Arthur Bernhardt, Andreas Koch, Ilia Petrov, Christian Knödler, Sergey Hardock, Sajjad Tamimi, Christian Riegger
2020	C	`conf`	nKV: near-data processing with KV-stores on native computational storage. DaMoN Tobias Vinçon, Arthur Bernhardt, Ilia Petrov, Lukas Weber, Andreas Koch
2019	—	`conf`	A Catalog and In-Hardware Evaluation of Open-Source Drop-In Compatible RISC-V Softcore Processors. ReConFig Carsten Heinz, Yannick Lavan, Jaco A. Hofmann, Andreas Koch
2019	—	`ch.`	Active Storage. Encyclopedia of Big Data Technologies Ilia Petrov, Tobias Vinçon, Andreas Koch, Julian Oppermann, Sergey Hardock, Christian Riegger
2019	—	`ed.`	Applied Reconfigurable Computing - 15th International Symposium, ARC 2019, Darmstadt, Germany, April 9-11, 2019, Proceedings ARC Christian Hochberger, Brent Nelson, Andreas Koch, Roger F. Woods, Pedro C. Diniz
2019	J	`jnl`	Comparison of affinity ranking using AutoDock-GPU and MM-GBSA scores for BACE-1 inhibitors in the D3R Grand Challenge 4. J. Comput. Aided Mol. Des. Lea El-Khoury, Diogo Santos-Martins, Sukanya Sasmal, Jérôme Eberhardt, Giulia Bianco, Francesca Alessandra Ambrosio, Leonardo Solis-Vasquez, Andreas Koch, Stefano Forli, David L. Mobley
2019	J	`jnl`	D3R Grand Challenge 4: prospective pose prediction of BACE1 ligands with AutoDock-GPU. J. Comput. Aided Mol. Des. Diogo Santos-Martins, Jérôme Eberhardt, Giulia Bianco, Leonardo Solis-Vasquez, Francesca Alessandra Ambrosio, Andreas Koch, Stefano Forli
2019	—	`conf`	DAPHNE - An automotive benchmark suite for parallel programming models on embedded heterogeneous platforms: work-in-progress. EMSOFT Companion Lukas Sommer, Florian Stock, Leonardo Solis-Vasquez, Andreas Koch
2019	—	`conf`	Design-Space Exploration with Multi-Objective Resource-Aware Modulo Scheduling. Euro-Par Julian Oppermann, Patrick Sittel, Martin Kumm, Melanie Reuter-Oppermann, Andreas Koch, Oliver Sinnen
2019	J	`jnl`	Exact and Practical Modulo Scheduling for High-Level Synthesis. ACM Trans. Reconfigurable Technol. Syst. Julian Oppermann, Melanie Reuter-Oppermann, Lukas Sommer, Andreas Koch, Oliver Sinnen
2019	A	`conf`	Extending LLVM for Lightweight SPMD Vectorization: Using SIMD and Vector Instructions Easily from Any Language. CGO Robin Kruppe, Julian Oppermann, Lukas Sommer, Andreas Koch
2019	—	`ch.`	Hardware-Assisted Transaction Processing: NVM. Encyclopedia of Big Data Technologies Ilia Petrov, Andreas Koch, Tobias Vinçon, Sergey Hardock, Christian Riegger
2019	—	`conf`	High-Performance In-Network Data Processing. ADMS@VLDB Jaco A. Hofmann, Lasse Thostrup, Tobias Ziegler, Carsten Binnig, Andreas Koch
2019	—	`conf`	High-Throughput Multi-Threaded Sum-Product Network Inference in the Reconfigurable Cloud. H2RC@SC Micha Ober, Jaco A. Hofmann, Lukas Sommer, Lukas Weber, Andreas Koch
2019	C	`conf`	IPA-IDX: In-Place Appends for B-Tree Indices. DaMoN Sergey Hardock, Andreas Koch, Tobias Vinçon, Ilia Petrov
2019	J	`jnl`	Moving Processing to Data: On the Influence of Processing in Memory on Data Management. CoRR Tobias Vinçon, Andreas Koch, Ilia Petrov
2019	A*	`conf`	Native Storage Techniques for Data Management. ICDE Ilia Petrov, Andreas Koch, Sergey Hardock, Tobias Vinçon, Christian Riegger
2019	—	`conf`	Online Reprogrammable Multi Tenant Switches. ENCP@CoNEXT Johannes Krude, Jaco A. Hofmann, Matthias Eichholz, Klaus Wehrle, Andreas Koch, Mira Mezini
2019	—	`conf`	Resource-Efficient Logarithmic Number Scale Arithmetic for SPN Inference on FPGAs. FPT Lukas Weber, Lukas Sommer, Julian Oppermann, Alejandro Molina, Kristian Kersting, Andreas Koch
2019	—	`conf`	SkyCastle: A Resource-Aware Multi-Loop Scheduler for High-Level Synthesis. FPT Julian Oppermann, Lukas Sommer, Lukas Weber, Melanie Reuter-Oppermann, Andreas Koch, Oliver Sinnen
2019	J	`jnl`	SpExSim: assessing kernel suitability for C-based high-level hardware synthesis. J. Supercomput. Julian Oppermann, Lukas Sommer, Andreas Koch
2019	—	`conf`	The TaPaSCo Open-Source Toolflow for the Automated Composition of Task-Based Parallel Reconfigurable Computing Systems. ARC Jens Korinth, Jaco A. Hofmann, Carsten Heinz, Andreas Koch
2019	—	`conf`	UltraSynth: Integration of a CGRA into a Control Engineering Environment. ARC Dennis Wolf, Tajas Ruschke, Christian Hochberger, Andreas Engel, Andreas Koch
2019	C	`conf`	nativeNDP: Processing Big Data Analytics on Native Storage Nodes. ADBIS Tobias Vinçon, Sergey Hardock, Christian Riegger, Andreas Koch, Ilia Petrov
2018	C	`conf`	Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-Based Accelerators. ICCD Lukas Sommer, Julian Oppermann, Alejandro Molina, Carsten Binnig, Kristian Kersting, Andreas Koch
2018	B	`conf`	Dependence Graph Preprocessing for Faster Exact Modulo Scheduling in High-Level Synthesis. FPL Julian Oppermann, Melanie Reuter-Oppermann, Lukas Sommer, Oliver Sinnen, Andreas Koch
2018	Misc	`conf`	GeMS: a generator for modulo scheduling problems: work in progress. CASES Julian Oppermann, Sebastian Vollbrecht, Melanie Reuter-Oppermann, Oliver Sinnen, Andreas Koch
2018	B	`conf`	ILP-Based Modulo Scheduling and Binding for Register Minimization. FPL Patrick Sittel, Martin Kumm, Julian Oppermann, Konrad Möller, Peter Zipf, Andreas Koch
2018	—	`conf`	Improved High-Level Synthesis for Complex CellML Models. ARC Björn Liebig, Julian Oppermann, Oliver Sinnen, Andreas Koch
2018	B	`conf`	NoFTL-KV: TacklingWrite-Amplification on KV-Stores with Native Storage Management. EDBT Tobias Vinçon, Sergej Hardock, Christian Riegger, Julian Oppermann, Andreas Koch, Ilia Petrov
2017	—	`conf`	A Performance and Energy Evaluation of OpenCL-accelerated Molecular Docking. IWOCL Leonardo Solis-Vasquez, Andreas Koch
2017	—	`conf`	Energy-efficient reconfiguration of flash-based FPGAs in heterogeneous wireless sensor nodes. ReConFig Andreas Engel, Andreas Koch
2017	—	`conf`	OpenMP device offloading to FPGA accelerators. ASAP Lukas Sommer, Jens Korinth, Andreas Koch
2017	—	`conf`	Synthesis of interleaved multithreaded accelerators from OpenMP loops. ReConFig Lukas Sommer, Julian Oppermann, Jaco A. Hofmann, Andreas Koch
2016	—	`conf`	A Scalable High-Performance Hardware Architecture for Real-Time Stereo Vision by Semi-Global Matching. CVPR Workshops Jaco A. Hofmann, Jens Korinth, Andreas Koch
2016	—	`conf`	A scalable latency-insensitive architecture for FPGA-accelerated semi-global matching in stereo vision applications. ReConFig Jaco A. Hofmann, Jens Korinth, Andreas Koch
2016	—	`conf`	Detecting Kernels Suitable for C-Based High-Level Hardware Synthesis. UIC/ATC/ScalCom/CBDCom/IoP/SmartWorld Julian Oppermann, Andreas Koch
2016	J	`jnl`	Heterogeneous Wireless Sensor Nodes that Target the Internet of Things. IEEE Micro Andreas Engel, Andreas Koch
2016	—	`conf`	High-level synthesis of resource-shared microarchitectures from irregular complex C-code. FPT Björn Liebig, Andreas Koch
2016	Misc	`conf`	ILP-based modulo scheduling for high-level synthesis. CASES Julian Oppermann, Andreas Koch, Melanie Reuter-Oppermann, Oliver Sinnen
2015	—	`conf`	A heterogeneous system architecture for low-power wireless sensor nodes in compute-intensive distributed applications. LCN Workshops Andreas Engel, Andreas Koch, Thomas Siebel
2015	—	`conf`	Accelerated clock drift estimation for high-precision wireless time-synchronization. LCN Workshops Andreas Engel, Andreas Koch
2015	Misc	`conf`	An Open-Source Tool Flow for the Composition of Reconfigurable Hardware Thread Pool Architectures. FCCM Jens Korinth, David de la Chevallerie, Andreas Koch
2015	B	`conf`	Domain-specific optimisation for the high-level synthesis of CellML-based simulation accelerators. FPL Julian Oppermann, Andreas Koch, Ting Yu, Oliver Sinnen
2015	—	`conf`	Optimized high-level synthesis of SMT multi-threaded hardware accelerators. FPT Jens Huthmann, Andreas Koch
2015	J	`jnl`	ThreadPoolComposer - An Open-Source FPGA Toolchain for Software Developers. CoRR Jens Korinth, David de la Chevallerie, Andreas Koch
2015	J	`jnl`	ffLink: A Lightweight High-Performance Open-Source PCI Express Gen3 Interface for Reconfigurable Accelerators. SIGARCH Comput. Archit. News David de la Chevallerie, Jens Korinth, Andreas Koch
2014	J	`jnl`	A Reconfigurable Platform and Programming Tools for High-Level Network Applications Demonstrated as a Hardware Honeypot. IEEE J. Sel. Areas Commun. Sascha Mühlbach, Andreas Koch
2014	—	`conf`	An energy-efficient wireless routing protocol for distributed structural health monitoring. WMNC Andreas Engel, Andreas Koch
2014	B	`conf`	Automatic high-level synthesis of multi-threaded hardware accelerators. FPL Jens Huthmann, Julian Oppermann, Andreas Koch
2014	—	`conf`	Hardware-Accelerated Data Compression in Low-Power Wireless Sensor Networks. ARC Andreas Engel, Andreas Koch
2014	—	`conf`	Integrating FPGA-based processing elements into a runtime for parallel heterogeneous computing. FPT David de la Chevallerie, Jens Korinth, Andreas Koch
2014	—	`conf`	Low-latency double-precision floating-point division for FPGAs. FPT Björn Liebig, Andreas Koch
2014	—	`conf`	PHAT: A technology for prototyping parallel heterogeneous architectures. DASIP Thorsten Wink, Andreas Koch
2014	—	`conf`	Synthilation: JIT-compilation of microinstruction sequences in AMIDAR processors. DASIP Christian Hochberger, Lukas Johannes Jung, Andreas Engel, Andreas Koch
2013	—	`conf`	Architecture Exploration of High-Performance Floating-Point Fused Multiply-Add Units and their Automatic Use in High-Level Synthesis. IPDPS Workshops Björn Liebig, Jens Huthmann, Andreas Koch
2013	—	`conf`	FPGA-accelerated color edge detection using a Geometric-Algebra-to-Verilog compiler. ISSoC Florian Stock, Andreas Koch, Dietmar Hildenbrand
2013	—	`conf`	Hardware/software co-compilation with the Nymble system. ReCoSoC Jens Huthmann, Björn Liebig, Julian Oppermann, Andreas Koch
2012	J	`jnl`	A Dynamically Reconfigured Multi-FPGA Network Platform for High-Speed Malware Collection. Int. J. Reconfigurable Comput. Sascha Mühlbach, Andreas Koch
2012	—	`conf`	Energy-efficient heterogeneous reconfigurable sensor node for distributed structural health monitoring. DASIP Andreas Engel, Björn Liebig, Andreas Koch
2012	—	`conf`	HaLOEWEn: A heterogeneous reconfigurable sensor node for distributed structural health monitoring. DASIP Andreas Engel, Björn Liebig, Andreas Koch
2012	—	`conf`	Malacoda: towards high-level compilation of network security applications on reconfigurable hardware. ANCS Sascha Mühlbach, Andreas Koch
2012	J	`jnl`	Memory Latency Hiding by Load Value Speculation for Reconfigurable Computers. ACM Trans. Reconfigurable Technol. Syst. Benjamin Thielmann, Jens Huthmann, Andreas Koch
2012	J	`jnl`	NetStage/DPR: A self-reconfiguring platform for active and passive network security operations. Microprocess. Microsystems Sascha Mühlbach, Andreas Koch
2012	J	`jnl`	Preface - ARC. Microprocess. Microsystems Andreas Koch, Roger F. Woods
2011	Misc	`conf`	A Scalable Multi-FPGA Platform for Complex Networking Applications. FCCM Sascha Mühlbach, Andreas Koch
2011	—	`conf`	A novel network platform for secure and efficient malware collection based on reconfigurable hardware logic. WorldCIS Sascha Mühlbach, Andreas Koch
2011	—	`conf`	Evaluation of speculative execution techniques for high-level language to hardware compilation. ReCoSoC Benjamin Thielmann, Jens Huthmann, Andreas Koch
2011	—	`conf`	Feasibility Analysis of Reconfigurable Computing in Low-Power Wireless Sensor Applications. ARC Andreas Engel, Björn Liebig, Andreas Koch
2011	A	`conf`	MARC II: A parametrized speculative multi-ported memory subsystem for reconfigurable computers. DATE Holger Lange, Thorsten Wink, Andreas Koch
2011	—	`conf`	NetStage/DPR: A Self-adaptable FPGA Platform for Application-Level Network Security. ARC Sascha Mühlbach, Andreas Koch
2011	B	`conf`	Precore - A Token-Based Speculation Architecture for High-Level Language to Hardware Compilation. FPL Benjamin Thielmann, Jens Huthmann, Andreas Koch
2011	—	`conf`	RAP: More Efficient Memory Access in Highly Speculative Execution on Reconfigurable Adaptive Computers. ReConFig Benjamin Thielmann, Thorsten Wink, Jens Huthmann, Andreas Koch
2011	—	`ed.`	Reconfigurable Computing: Architectures, Tools and Applications - 7th International Symposium, ARC 2011, Belfast, UK, March 23-25, 2011. Proceedings ARC Andreas Koch, Ram Krishnamurthy, John McAllister, Roger F. Woods, Tarek A. El-Ghazawi
2010	B	`conf`	A Comparison of Hardware Acceleration Interfaces in a Customizable Soft Core Processor. FPL Gerald Hempel, Christian Hochberger, Andreas Koch
2010	—	`conf`	A Dynamically Reconfigured Network Platform for High-Speed Malware Collection. ReConFig Sascha Mühlbach, Andreas Koch
2010	B	`conf`	A Flexible Compute and Memory Infrastructure for High-Level Language to Hardware Compilation. FPL Hagen Gädke-Lütjens, Benjamin Thielmann, Andreas Koch
2010	—	`conf`	Accelerating high-level engineering computations by automatic compilation of Geometric Algebra to hardware accelerators. ICSAMOS Jens Huthmann, Peter Müller, Florian Stock, Dietmar Hildenbrand, Andreas Koch
2010	—	`ch.`	Adaptive Computing Systems and Their Design Tools. Dynamically Reconfigurable Systems Andreas Koch
2010	—	`conf`	An FPGA-based scalable platform for high-speed malware collection in large IP networks. FPT Sascha Mühlbach, Andreas Koch
2010	J	`jnl`	Architectures and Execution Models for Hardware/Software Compilation and Their System-Level Realization. IEEE Trans. Computers Holger Lange, Andreas Koch
2010	—	`conf`	Compiling Geometric Algebra Computations into Reconfigurable Hardware Accelerators. Dynamically Reconfigurable Architectures Jens Huthmann, Peter Müller, Florian Stock, Dietmar Hildenbrand, Andreas Koch
2010	—	`ch.`	Gaalop - High Performance Parallel Computing Based on Conformal Geometric Algebra. Geometric Algebra Computing Dietmar Hildenbrand, Joachim Pitt, Andreas Koch
2010	B	`conf`	MalCoBox: Designing a 10 Gb/s Malware Collection Honeypot Using Reconfigurable Technology. FPL Sascha Mühlbach, Martin Brunner, Christopher Roblee, Andreas Koch
2010	C	`conf`	Side-Channel Resistance Evaluation of a Neural Network Based Lightweight Cryptography Scheme. EUC Marc Stöttinger, Sorin A. Huss, Sascha Mühlbach, Andreas Koch
2009	—	`conf`	A Fast GPU Implementation for Solving Sparse Ill-Posed Linear Equation Systems. PPAM (1) Florian Stock, Andreas Koch
2009	Misc	`conf`	Acceleration and Energy Efficiency of a Geometric Algebra Computation using Reconfigurable Computers and GPUs. FCCM Holger Lange, Florian Stock, Andreas Koch, Dietmar Hildenbrand
2009	—	`conf`	Challenges of Electronic CAD in the Nano Scale Era. GI Jahrestagung Christian Hochberger, Andreas Koch
2008	—	`conf`	Accelerating Speculative Execution in High-Level Synthesis with Cancel Tokens. ARC Hagen Gädke, Andreas Koch
2008	—	`conf`	Efficient Inverse Kinematics Algorithm Based on Conformal Geometric Algebra - Using Reconfigurable Hardware. GRAPP Dietmar Hildenbrand, Holger Lange, Florian Stock, Andreas Koch
2008	—	`conf`	Inverse kinematics of a humanoid robot based on conformal geometric algebra using optimized code generation. Humanoids Joachim Pitt, Dietmar Hildenbrand, Maximilian Stelzer, Andreas Koch
2008	B	`conf`	Low-latency high-bandwidth HW/SW communication in a virtual memory environment. FPL Holger Lange, Andreas Koch
2008	B	`conf`	Memory access parallelisation in high-level language compilation for reconfigurable adaptive computers. FPL Hagen Gädke, Florian Stock, Andreas Koch
2008	J	`jnl`	Rekonfigurierbare Architekturen. Inform. Spektrum Mladen Berekovic, Christian Hochberger, Andreas Koch
2007	B	`conf`	An Execution Model for Hardware/Software Compilation and its System-Level Realization. FPL Holger Lange, Andreas Koch
2007	B	`conf`	Comrade - A Compiler for Adaptive Computing Systems Using a Novel Fast Speculation Technique. FPL Hagen Gädke, Andreas Koch
2007	J	`jnl`	Editorial - Field-programmable logic and applications. IET Comput. Digit. Tech. Philip Heng Wai Leong, Andreas Koch, Eduardo I. Boemo
2006	B	`conf`	Architecture Exploration and Tools for Pipelined Coarse-Grained Reconfigurable Arrays. FPL Florian Stock, Andreas Koch
2005	B	`conf`	Configuration Merging for Adaptive Computer Applications. FPL Nico Kasprzyk, Jan van der Veen, Andreas Koch
2005	—	`conf`	High-Level-Language Compilation for Reconfigurable Computers. ReCoSoC Andreas Koch, Nico Kasprzyk
2004	—	`conf`	Architecture-Independent Meta-optimization by Aggressive Tail Splitting. Euro-Par Michael Rock, Andreas Koch
2004	B	`conf`	HW/SW Co-design by Automatic Embedding of Complex IP Cores. FPL Holger Lange, Andreas Koch
2004	—	`conf`	Verbesserte Hardware-Software-Partitionierung für Adaptive Computer. ARCS Workshops Nico Kasprzyk, Andreas Koch
2004	B	`conf`	Wavelet-Based Image Compression on the Reconfigurable Computer ACE-V. FPL Hagen Gädke, Andreas Koch
2003	—	`conf`	An Improved Intermediate Representation for Datapath Generation. Engineering of Reconfigurable Systems and Algorithms Nico Kasprzyk, Andreas Koch, Ulrich Golze, Michael Rock
2003	B	`conf`	Fast Region Labeling on the Reconfigurable Platform ACE-V. FPL Christian Schmidt, Andreas Koch
2002	Misc	`conf`	Module Generators Driving the Compilation for Adaptive Computing Systems. FCCM Andreas Koch, Nico Kasprzyk
2000	B	`conf`	Memory Access Schemes for Configurable Processors. FPL Holger Lange, Andreas Koch
1999	B	`conf`	A Processor for Artificial Life Simulation. FPL Matthias Böge, Andreas Koch
1999	Misc	`conf`	Enabling Automatic Module Generation for FCCM Compilers. FCCM Andreas Koch
1997	—	`—`	Regular datapaths on field programmable gate arrays. Andreas Koch