Andreas Herkersdorf

241 papers A* 6A 23B 9C 32Misc 6Journal 58Unranked 98

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	An Approach for Automotive ECU Diagnosis via Ethernet Snooping & Microcontroller Tracing. WiPiEC Journal Zafer Attal, Matthias Ernst, Gasper Skvarc Bozic, Ibai Irigoyen Ceberio, Albrecht Mayer, Thomas Wild, Andreas Herkersdorf
2025	A	`conf`	HiPerNoC: A High-Performance Network-an-Chip for Flexible and Scalable FPGA-Based SmartNICs. DATE Klajd Zyla, Marco Liess, Thomas Wild, Andreas Herkersdorf
2025	J	`jnl`	Rule-Based Reinforcement Learning on FPGA for QoS-Aware Dynamic Frequency Scaling. IEEE Trans. Very Large Scale Integr. Syst. Florian Maurer, Michael Meidinger, Yiming Lu, Matthias Schlemmer, Thomas Hallermeier, Anmol Surhonne, Thomas Wild, Andreas Herkersdorf
2024	A	`conf`	EMDRIVE Architecture: Embedded Distributed Computing and Diagnostics from Sensor to Edge. DATE Patrick Schmidt, Iuliia Topko, Matthias Stammler, Tanja Harbaum, Jürgen Becker, Rico Berner, Omar Ahmed, Jakub Jagielski, Thomas Seidler, Markus Abel, Marius Kreutzer, Maximilian Kirschner, Victor Pazmino Betancourt, Robin Sehm, Lukas Groth, Andrija Neskovic, Rolf Meyer, Saleh Mulhem, Mladen Berekovic, Matthias Probst, Manuel Brosch, Georg Sigl, Thomas Wild, Matthias Ernst, Andreas Herkersdorf, Florian Aigner, Stefan Hommes, Sebastian Lauer, Maximilian Seidler, Thomas Raste, Gasper Skvarc Bozic, Ibai Irigoyen Ceberio, Muhammad Hassan, Albrecht Mayer
2024	—	`conf`	EPIC-Q: Equivalent-Policy Invariant Comparison Enhanced Transfer Q-learning for Run-Time SoC Performance-Power Optimization. SAMOS Anmol Surhonne, Haitham S. Fawzi, Florian Maurer, Oliver Lenke, Michael Meidinger, Thomas Wild, Andreas Herkersdorf
2024	C	`conf`	FlexCross: High-Speed and Flexible Packet Processing via a Crosspoint-Queued Crossbar. DSD Klajd Zyla, Marco Liess, Thomas Wild, Andreas Herkersdorf
2024	J	`jnl`	FlexCross: High-Speed and Flexible Packet Processing via a Crosspoint-Queued Crossbar. CoRR Klajd Zyla, Marco Liess, Thomas Wild, Andreas Herkersdorf
2024	C	`conf`	FlexRoute: A Fast, Flexible and Priority-Aware Packet-Processing Design. PDP Klajd Zyla, Marco Liess, Thomas Wild, Andreas Herkersdorf
2024	—	`conf`	HASIIL: Hardware-Assisted Scheduling to Improve IPC Latency in Linux. CF Tim Twardzik, Lars Nolte, Camille Jalier, Jiyuan Shi, Thomas Wild, Andreas Herkersdorf
2024	—	`conf`	HW-EPOLL: Hardware-Assisted User Space Event Notification for Epoll Syscall. SAMOS Lars Nolte, Tim Twardzik, Camille Jalier, Jiyuan Shi, Thomas Wild, Andreas Herkersdorf
2024	J	`jnl`	HW-FUTEX: Hardware-Assisted Futex Syscall. IEEE Trans. Very Large Scale Integr. Syst. Lars Nolte, Tim Twardzik, Camille Jalier, Zhigang Huang, Jiyuan Shi, Thomas Wild, Andreas Herkersdorf
2024	—	`conf`	Hardware Assist for Linux IPC on an FPGA Platform. CF Lars Nolte, Tim Twardzik, Camille Jalier, Jiyuan Shi, Thomas Wild, Andreas Herkersdorf
2024	—	`conf`	QoS-Aware Dynamic Frequency Scaling for Mixed-Critical Systems based on Shielded Reinforcement Learning. NorCAS Florian Maurer, Michael Meidinger, Yiming Lu, Thomas Hallermeier, Anmol Surhonne, Thomas Wild, Andreas Herkersdorf
2024	—	`conf`	XCS with dynamic sized experience replay for memory constrained applications. GECCO Companion Anmol Surhonne, Manuel Wensauer, Florian Maurer, Thomas Wild, Andreas Herkersdorf
2024	C	`conf`	ecoNIC: Saving Energy Through SmartNIC-Based Load Balancing of Mixed-Critical Ethernet Traffic. DSD Franz Biersack, Marco Liess, Markus Absmann, Fabiana Lotter, Thomas Wild, Andreas Herkersdorf
2023	—	`conf`	CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs. ARCS Klajd Zyla, Florian Maurer, Thomas Wild, Andreas Herkersdorf
2023	C	`conf`	FlexPipe: Fast, Flexible and Scalable Packet Processing for High-Performance SmartNICs. VLSI-SoC Klajd Zyla, Marco Liess, Thomas Wild, Andreas Herkersdorf
2023	A*	`conf`	HAWEN: Hardware Accelerator for Thread Wake-Ups in Linux Event Notification. DAC Lars Nolte, Tim Twardzik, Camille Jalier, Zhigang Huang, Jiyuan Shi, Clara Kowalsky, Thomas Wild, Andreas Herkersdorf
2023	A	`conf`	Information Processing Factory 2.0 - Self-awareness for Autonomous Collaborative Systems. DATE Nora Sperling, Alex Bendrick, Dominik Stöhrmann, Rolf Ernst, Bryan Donyanavard, Florian Maurer, Oliver Lenke, Anmol Surhonne, Andreas Herkersdorf, Walaa Amer, Caio Batista de Melo, Ping-Xiang Chen, Quang Anh Hoang, Rachid Karami, Biswadip Maity, Paul Nikolian, Mariam Rakka, Dongjoo Seo, Saehanseul Yi, Minjun Seo, Nikil D. Dutt, Fadi J. Kurdahi
2023	—	`conf`	LCT-DER: Learning Classifier Table with Dynamic-Sized Experience Replay for Run-time SoC Performance-Power Optimization. GECCO Companion Anmol Surhonne, Florian Maurer, Thomas Wild, Andreas Herkersdorf
2023	—	`conf`	LCT-TL : Learning Classifier Table (LCT) with Transfer Learning for runtime SoC performance-power optimization. MCSoC Anmol Surhonne, Florian Maurer, Thomas Wild, Andreas Herkersdorf
2023	J	`jnl`	Machine learning in run-time control of multicore processor systems. it Inf. Technol. Florian Maurer, Moritz Thoma, Anmol Prakash Surhonne, Bryan Donyanavard, Andreas Herkersdorf
2023	C	`conf`	Priority-aware Inter-Server Receive Side Scaling. PDP Franz Biersack, Kilian Holzinger, Henning Stubbe, Thomas Wild, Georg Carle, Andreas Herkersdorf
2023	—	`conf`	X-MAPE: Extending 6G-Connected Self-Adaptive Systems with Reflexive Actions. NFV-SDN Marco Liess, Julian Demicoli, Tobias Tiedje, Matthias Lohrmann, Matthias Nickel, M. Luniak, Dimitrios A. Prousalis, Thomas Wild, Ronald Tetzlaff, Diana Göhringer, Christian Mayr, Karlheinz Bock, Sebastian Steinhorst, Andreas Herkersdorf
2022	J	`jnl`	Autonomous Systems, Trust, and Guarantees. IEEE Des. Test Nima Taherinejad, Andreas Herkersdorf, Axel Jantsch
2022	J	`jnl`	Fine-Grained Power Modeling of Multicore Processors Using FFNNs. Int. J. Parallel Program. Mark Sagi, Nguyen Anh Vu Doan, Nael Fasfous, Thomas Wild, Andreas Herkersdorf
2022	—	`conf`	GAE-LCT: A Run-Time GA-Based Classifier Evolution Method for Hardware LCT Controlled SoC Performance-Power Optimization. ARCS Anmol Surhonne, Nguyen Anh Vu Doan, Florian Maurer, Thomas Wild, Andreas Herkersdorf
2022	—	`conf`	GLS Tracing: Gem5-based Low-intrusive Software Tracing. NorCAS Lars Nolte, Tim Twardzik, Camille Jalier, Zhigang Huang, Jiyuan Shi, Thomas Wild, Andreas Herkersdorf
2022	B	`conf`	SmartNIC-based Load Management and Network Health Monitoring for Time Sensitive Applications. NOMS Kilian Holzinger, Franz Biersack, Henning Stubbe, Angela Gonzalez Mariño, Abdoul Kane, Francesc Fons, Haigang Zhang, Thomas Wild, Andreas Herkersdorf, Georg Carle
2022	J	`jnl`	The Self-Aware Information Processing Factory Paradigm for Mixed-Critical Multiprocessing. IEEE Trans. Emerg. Top. Comput. Eberle A. Rambo, Bryan Donyanavard, Minjun Seo, Florian Maurer, Thawra Kadeed, Caio Batista de Melo, Biswadip Maity, Anmol Surhonne, Andreas Herkersdorf, Fadi J. Kurdahi, Nikil D. Dutt, Rolf Ernst
2021	J	`jnl`	DySHARQ: Dynamic Software-Defined Hardware-Managed Queues for Tile-Based Architectures. Int. J. Parallel Program. Sven Rheindt, Sebastian Maier, Nora Pohle, Lars Nolte, Oliver Lenke, Florian Schmaus, Thomas Wild, Wolfgang Schröder-Preikschat, Andreas Herkersdorf
2021	J	`jnl`	DynaCo: Dynamic Coherence Management for Tiled Manycore Architectures. Int. J. Parallel Program. Akshay Srivatsa, Mostafa Mansour, Sven Rheindt, Dirk Gabriel, Thomas Wild, Andreas Herkersdorf
2021	J	`jnl`	Exploring a Hybrid Voting-based Eviction Policy for Caches and Sparse Directories on Manycore Architectures. Microprocess. Microsystems Akshay Srivatsa, Nael Fasfous, Nguyen Anh Vu Doan, Sebastian Nagel, Thomas Wild, Andreas Herkersdorf
2021	A	`conf`	Long Short-Term Memory Neural Network-based Power Forecasting of Multi-Core Processors. DATE Mark Sagi, Martin Rapp, Heba Khdr, Yizhe Zhang, Nael Fasfous, Nguyen Anh Vu Doan, Thomas Wild, Jörg Henkel, Andreas Herkersdorf
2021	—	`conf`	PEPERONI: Pre-Estimating the Performance of Near-Memory Integration. MEMSYS Oliver Lenke, Richard Petri, Thomas Wild, Andreas Herkersdorf
2021	A	`conf`	Precise real-time monitoring of time-critical flows. CoNEXT Kilian Holzinger, Henning Stubbe, Franz Biersack, Angela Gonzalez Mariño, Abdoul Kane, Francisco Fons Lluis, Haigang Zhang, Thomas Wild, Andreas Herkersdorf, Georg Carle
2021	J	`jnl`	Protection switching schemes and mapping strategies for fail-operational hard real-time NoCs. Microprocess. Microsystems Max Koenen, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf
2021	J	`jnl`	SEAMS: Self-Optimizing Runtime Manager for Approximate Memory Hierarchies. ACM Trans. Embed. Comput. Syst. Biswadip Maity, Bryan Donyanavard, Anmol Surhonne, Amir M. Rahmani, Andreas Herkersdorf, Nikil D. Dutt
2020	J	`jnl`	A Lightweight Nonlinear Methodology to Accurately Model Multicore Processor Power. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mark Sagi, Nguyen Anh Vu Doan, Martin Rapp, Thomas Wild, Jörg Henkel, Andreas Herkersdorf
2020	J	`jnl`	AXES: Approximation Manager for Emerging Memory Architectures. CoRR Biswadip Maity, Bryan Donyanavard, Anmol Surhonne, Amir M. Rahmani, Andreas Herkersdorf, Nikil D. Dutt
2020	J	`jnl`	Combinatorial Auctions for Temperature-Constrained Resource Management in Manycores. IEEE Trans. Parallel Distributed Syst. Heba Khdr, Muhammad Shafique, Santiago Pagani, Andreas Herkersdorf, Jörg Henkel
2020	A	`conf`	Emergent Control of MPSoC Operation by a Hierarchical Supervisor / Reinforcement Learning Approach. DATE Florian Maurer, Bryan Donyanavard, Amir M. Rahmani, Nikil D. Dutt, Andreas Herkersdorf
2020	—	`conf`	Exploring Task and Channel Mapping Strategies in Fail-Operational and Hard Real-Time NoCs. NorCAS Max Koenen, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf
2020	—	`conf`	Fine-Grained Power Modeling of Multicore Processors Using FFNNs. SAMOS Mark Sagi, Nguyen Anh Vu Doan, Nael Fasfous, Thomas Wild, Andreas Herkersdorf
2020	—	`conf`	HyVE: A Hybrid Voting-based Eviction Policy for Caches. NorCAS Akshay Srivatsa, Sebastian Nagel, Nael Fasfous, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf
2020	C	`conf`	Inter-Server RSS: Extending Receive Side Scaling for Inter-Server Workload Distribution. PDP Andreas Oeldemann, Franz Biersack, Thomas Wild, Andreas Herkersdorf
2020	J	`jnl`	Machine Learning Approaches for Efficient Design Space Exploration of Application-Specific NoCs. ACM Trans. Design Autom. Electr. Syst. Yong Hu, Marcel Mettler, Daniel Mueller-Gritschneder, Thomas Wild, Andreas Herkersdorf, Ulf Schlichtmann
2020	—	`conf`	On-Chip Democracy: A Study on the Use of Voting Systems for Computer Cache Memory Management. IEEM Nguyen Anh Vu Doan, Akshay Srivatsa, Nael Fasfous, Sebastian Nagel, Thomas Wild, Andreas Herkersdorf
2020	J	`jnl`	Power- and Cache-Aware Task Mapping with Dynamic Power Budgeting for Many-Cores. IEEE Trans. Computers Martin Rapp, Mark Sagi, Anuj Pathania, Andreas Herkersdorf, Jörg Henkel
2020	J	`jnl`	Self-aware Cyber-Physical Systems. ACM Trans. Cyber Phys. Syst. Kirstie L. Bellman, Christopher Landauer, Nikil D. Dutt, Lukas Esterle, Andreas Herkersdorf, Axel Jantsch, Nima Taherinejad, Peter R. Lewis, Marco Platzner, Kalle Tammemäe
2020	—	`conf`	X-CEL: A Method to Estimate Near-Memory Acceleration Potential in Tile-Based MPSoCs. ARCS Sven Rheindt, Andreas Fried, Oliver Lenke, Lars Nolte, Temur Sabirov, Tim Twardzik, Thomas Wild, Andreas Herkersdorf
2020	—	`conf`	X-Centric: A Survey on Compute-, Memory- and Application-Centric Computer Architectures. MEMSYS Sven Rheindt, Temur Sabirov, Oliver Lenke, Thomas Wild, Andreas Herkersdorf
2019	—	`conf`	A Hybrid NoC Enabling Fail-Operational and Hard Real-Time Communication in MPSoC. ARCS Max Koenen, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf
2019	—	`conf`	APEC: improved acknowledgement prioritization through erasure coding in bufferless NoCs. NOCS Michael Vonbun, Adrian Schiechel, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf
2019	—	`conf`	Channel mapping strategies for effective protection switching in fail-operational hard real-time NoCs. NOCS Max Koenen, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf
2019	—	`conf`	CoD: Coherence-on-Demand - Runtime Adaptable Working Set Coherence for DSM-Based Manycore Architectures. SAMOS Akshay Srivatsa, Sven Rheindt, Dirk Gabriel, Thomas Wild, Andreas Herkersdorf
2019	—	`conf`	Cryptographic Hashing in P4 Data Planes. ANCS Dominik Scholz, Andreas Oeldemann, Fabien Geyer, Sebastian Gallenmüller, Henning Stubbe, Thomas Wild, Andreas Herkersdorf, Georg Carle
2019	—	`conf`	Multi-Objective Optimization of Channel Mapping for Fail-Operational Hybrid TDM NoCs. CANDAR Workshops Nguyen Anh Vu Doan, Max Koenen, Thomas Wild, Andreas Herkersdorf
2019	—	`conf`	Multicore Power Estimation using Independent Component Analysis Based Modeling. MCSoC Mark Sagi, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf
2019	—	`conf`	NEMESYS: near-memory graph copy enhanced system-software. MEMSYS Sven Rheindt, Andreas Fried, Oliver Lenke, Lars Nolte, Thomas Wild, Andreas Herkersdorf
2019	—	`conf`	Network Coding in Networks-on-Chip with Lossy Links. ARCS Michael Vonbun, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf
2019	—	`conf`	Register Requirement Minimization of Fixed-Depth Pipelines for Streaming Data Applications. SoCC Thomas Goldbrunner, Nguyen Anh Vu Doan, Diogo Poças, Thomas Wild, Andreas Herkersdorf
2019	—	`conf`	SHARQ: Software-Defined Hardware-Managed Queues for Tile-Based Manycore Architectures. SAMOS Sven Rheindt, Sebastian Maier, Florian Schmaus, Thomas Wild, Wolfgang Schröder-Preikschat, Andreas Herkersdorf
2019	A*	`conf`	SOSA: Self-Optimizing Learning with Self-Adaptive Control for Hierarchical System-on-Chip Management. MICRO Bryan Donyanavard, Tiago Mück, Amir M. Rahmani, Nikil D. Dutt, Armin Sadighi, Florian Maurer, Andreas Herkersdorf
2019	J	`jnl`	The Information Processing Factory: Organization, Terminology, and Definitions. CoRR Eberle A. Rambo, Bryan Donyanavard, Minjun Seo, Florian Maurer, Thawra Kadeed, Caio Batista de Melo, Biswadip Maity, Anmol Surhonne, Andreas Herkersdorf, Fadi J. Kurdahi, Nikil D. Dutt, Rolf Ernst
2019	Misc	`conf`	The information processing factory: a paradigm for life cycle management of dependable systems. CODES+ISSS Eberle A. Rambo, Thawra Kadeed, Rolf Ernst, Minjun Seo, Fadi J. Kurdahi, Bryan Donyanavard, Caio Batista de Melo, Biswadip Maity, Kasra Moazzemi, Kenneth Michael Stewart, Saehanseul Yi, Amir M. Rahmani, Nikil D. Dutt, Florian Maurer, Nguyen Anh Vu Doan, Anmol Surhonne, Thomas Wild, Andreas Herkersdorf
2018	—	`conf`	BiSME: A Hardware Coprocessor to Perform Signature Matching at Multi-Gigabit Rates. ASAP Subramanian Shiva Shankar, Pinxing Lin, Andreas Herkersdorf, Thomas Wild
2018	—	`conf`	CaCAO: Complex and Compositional Atomic Operations for NoC-Based Manycore Platforms. ARCS Sven Rheindt, Andreas Schenk, Akshay Srivatsa, Thomas Wild, Andreas Herkersdorf
2018	A	`conf`	Design methodologies for enabling self-awareness in autonomous systems. DATE Armin Sadighi, Bryan Donyanavard, Thawra Kadeed, Kasra Moazzemi, Tiago Mück, Ahmed Nassar, Amir M. Rahmani, Thomas Wild, Nikil D. Dutt, Rolf Ernst, Andreas Herkersdorf, Fadi J. Kurdahi
2018	B	`conf`	FlueNT10G: A Programmable FPGA-based Network Tester for Multi-10-Gigabit Ethernet. FPL Andreas Oeldemann, Thomas Wild, Andreas Herkersdorf
2018	—	`conf`	In-NoC Circuits for Low-Latency Cache Coherence in Distributed Shared-Memory Architectures. MCSoC Leonard Masing, Akshay Srivatsa, Fabian Kreß, Nidhi Anantharajaiah, Andreas Herkersdorf, Jürgen Becker
2018	—	`conf`	Memory Access Pattern Profiling for Streaming Applications Based on MATLAB Models. PATMOS Thomas Goldbrunner, Thomas Wild, Andreas Herkersdorf
2018	J	`jnl`	Platform-Centric Self-Awareness as a Key Enabler for Controlling Changes in CPS. Proc. IEEE Mischa Möstl, Johannes Schlatow, Rolf Ernst, Nikil D. Dutt, Ahmed Nassar, Amir-Mohammad Rahmani, Fadi J. Kurdahi, Thomas Wild, Armin Sadighi, Andreas Herkersdorf
2017	C	`conf`	A Divide and Conquer State Grouping Method for Bitmap Based Transition Compression. PDCAT Subramanian Shiva Shankar, Pinxing Lin, Andreas Herkersdorf, Thomas Wild
2017	A	`conf`	A non-intrusive, operating system independent spinlock profiler for embedded multicore systems. DATE Lin Li, Philipp Wagner, Albrecht Mayer, Thomas Wild, Andreas Herkersdorf
2017	C	`conf`	Adaptive Reliability for Fault Tolerant Multicore Systems. DSD Ihsen Alouani, Thomas Wild, Andreas Herkersdorf, Smaïl Niar
2017	J	`jnl`	DiaSys: Improving SoC insight through on-chip diagnosis. J. Syst. Archit. Philipp Wagner, Thomas Wild, Andreas Herkersdorf
2017	J	`jnl`	Efficient task spawning for shared memory and message passing in many-core architectures. J. Syst. Archit. Aurang Zaib, Thomas Wild, Andreas Herkersdorf, Jan Heisswolf, Jürgen Becker, Andreas Weichslgartner, Jürgen Teich
2017	—	`conf`	Reducing Data Center Resource Over-Provisioning Through Dynamic Load Management for Virtualized Network Functions. ARCS Andreas Oeldemann, Thomas Wild, Andreas Herkersdorf
2017	—	`conf`	Region based cache coherence for tiled MPSoCs. SoCC Akshay Srivatsa, Sven Rheindt, Thomas Wild, Andreas Herkersdorf
2017	A	`conf`	Self-awareness in autonomous automotive systems. DATE Johannes Schlatow, Mischa Möstl, Rolf Ernst, Marcus Nolte, Inga Jatzkowski, Markus Maurer, Christian Herber, Andreas Herkersdorf
2016	C	`conf`	A Rule-based Methodology for Hardware Configuration Validation in Embedded Systems. SCOPES Lin Li, Philipp Wagner, Ramesh Ramaswamy, Albrecht Mayer, Thomas Wild, Andreas Herkersdorf
2016	J	`jnl`	ANN Predicted Apps-Usage Aware Linux Scheduler for Asymmetrical Multi Cluster SoC. J. Softw. Hou Zhao Qi Rex, Jong Ching Chuen, Andreas Herkersdorf
2016	Misc	`conf`	Conquering MPSoC complexity with principles of a self-aware information processing factory. CODES+ISSS Nikil D. Dutt, Fadi J. Kurdahi, Rolf Ernst, Andreas Herkersdorf
2016	J	`jnl`	Dark silicon management: an integrated and coordinated cross-layer approach. it Inf. Technol. Santiago Pagani, Lars Bauer, Qingqing Chen, Elisabeth Glocker, Frank Hannig, Andreas Herkersdorf, Heba Khdr, Anuj Pathania, Ulf Schlichtmann, Doris Schmitt-Landsiedel, Mark Sagi, Éricles Sousa, Philipp Wagner, Volker Wenzel, Thomas Wild, Jörg Henkel
2016	—	`conf`	DiaSys: On-Chip Trace Analysis for Multi-processor System-on-Chip. ARCS Philipp Wagner, Thomas Wild, Andreas Herkersdorf
2016	C	`conf`	Disaggregated FPGAs: Network Performance Comparison against Bare-Metal Servers, Virtual Machines and Linux Containers. CloudCom Jagath Weerasinghe, François Abel, Christoph Hagleitner, Andreas Herkersdorf
2016	—	`conf`	Estimation of End-to-End Packet Error Rates for NoC Multicasts. ARCS Michael Vonbun, Thomas Wild, Andreas Herkersdorf
2016	Misc	`conf`	Hardware acceleration of signature matching through multi-layer transition bit masking. ITNAC Subramanian Shiva Shankar, Pinxing Lin, Andreas Herkersdorf, Thomas Wild
2016	J	`jnl`	Improving SoC Insight Through On-Chip Diagnosis. CoRR Philipp Wagner, Thomas Wild, Andreas Herkersdorf
2016	C	`conf`	Linux apps-usage-driven power dissipation-aware scheduler. ISCAS Hou Zhao Qi Rex, Jong Ching Chuen, Andreas Herkersdorf
2016	J	`jnl`	MPSoC application resilience by hardware-assisted communication virtualization. Microelectron. Reliab. Stefan Rosch, Holm Rauchfuss, Stefan Wallentowitz, Thomas Wild, Andreas Herkersdorf
2016	C	`conf`	Resolving Performance Interference in SR-IOV Setups with PCIe Quality-of-Service Extensions. DSD Andre Oliver Richter, Christian Herber, Thomas Wild, Andreas Herkersdorf
2016	C	`conf`	TCU: A Multi-Objective Hardware Thread Mapping Unit for HPC Clusters. ISC Ravi Kumar Pujari, Thomas Wild, Andreas Herkersdorf
2016	—	`conf`	What happens on an MPSoC stays on an MPSoC - unfortunately! ISIC Philipp Wagner, Lin Li, Thomas Wild, Albrecht Mayer, Andreas Herkersdorf
2015	B	`conf`	A Hardware/Software Approach for Mitigating Performance Interference Effects in Virtualized Environments Using SR-IOV. CLOUD Andre Oliver Richter, Christian Herber, Stefan Wallentowitz, Thomas Wild, Andreas Herkersdorf
2015	C	`conf`	A hardware-based multi-objective thread mapper for tiled manycore architectures. ICCD Ravi Kumar Pujari, Thomas Wild, Andreas Herkersdorf
2015	J	`jnl`	Adaptive multi-layer techniques for increased system dependability. it Inf. Technol. Lars Bauer, Jörg Henkel, Andreas Herkersdorf, Michael A. Kochte, Johannes Maximilian Kühn, Wolfgang Rosenstiel, Thomas Schweizer, Stefan Wallentowitz, Volker Wenzel, Thomas Wild, Hans-Joachim Wunderlich, Hongyan Zhang
2015	C	`conf`	An Analytic Approach on End-to-End Packet Error Rate Estimation for Network-on-Chip. DSD Michael Vonbun, Stefan Wallentowitz, Andreas Oeldemann, Andreas Herkersdorf
2015	J	`jnl`	Denial-of-Service attacks on PCI passthrough devices: Demonstrating the impact on network- and storage-I/O performance. J. Syst. Archit. Andre Oliver Richter, Christian Herber, Thomas Wild, Andreas Herkersdorf
2015	—	`conf`	Design and Evaluation of a Low-Latency AVB Ethernet Endpoint Based on ARM SoC. HPCC/CSS/ICESS Christian Herber, Ammar Saeed, Andreas Herkersdorf
2015	—	`conf`	Enabling FPGAs in Hyperscale Data Centers. UIC/ATC/ScalCom Jagath Weerasinghe, François Abel, Christoph Hagleitner, Andreas Herkersdorf
2015	—	`conf`	Fail-operational in safety-related automotive multi-core systems. SIES André Kohn, Michael Kasmeyer, Rolf Schneider, Andre Roger, Claus Stellwag, Andreas Herkersdorf
2015	—	`conf`	Fault-tolerant communication in invasive networks on chip. AHS Jan Heisswolf, Andreas Weichslgartner, Aurang Zaib, Stephanie Friederich, Leonard Masing, Carsten Stein, Marco Duden, Roman Klopfer, Jürgen Teich, Thomas Wild, Andreas Herkersdorf, Jürgen Becker
2015	—	`conf`	IOMPU: Spatial Separation for Hardware-Based I/O Virtualization for Mixed-Criticality Embedded Real-Time Systems Using Non-transparent Bridges. HPCC/CSS/ICESS Daniel Münch, Michael Paulitsch, Andreas Herkersdorf
2015	J	`jnl`	Introduction to the Special Issue on Testing, prototyping, and debugging of multi-core architectures. J. Syst. Archit. Frank Hannig, Andreas Herkersdorf
2015	A	`conf`	MPIOV: scaling hardware-based I/O virtualization for mixed-criticality embedded real-time systems using non transparent bridges to (multi-core) multi-processor systems. DATE Daniel Münch, Michael Paulitsch, Oliver Hanka, Andreas Herkersdorf
2015	—	`conf`	Monitoring of I/O for safety-critical systems using PCI express advanced error reporting. SIES Daniel Münch, Michael Paulitsch, Andreas Herkersdorf
2015	—	`conf`	Network Interface with Task Spawning Support for NoC-Based DSM Architectures. ARCS Aurang Zaib, Jan Heißwolf, Andreas Weichslgartner, Thomas Wild, Jürgen Teich, Jürgen Becker, Andreas Herkersdorf
2015	A	`conf`	Real-time capable CAN to AVB ethernet gateway using frame aggregation and scheduling. DATE Christian Herber, Andre Oliver Richter, Thomas Wild, Andreas Herkersdorf
2015	—	`conf`	SgInt: Safeguarding Interrupts for Hardware-Based I/O Virtualization for Mixed-Criticality Embedded Real-Time Systems Using Non Transparent Bridges. ARCS Daniel Münch, Michael Paulitsch, Oliver Hanka, Andreas Herkersdorf
2015	—	`conf`	Sharer status-based caching in tiled multiprocessor systems-on-chip. SpringSim (HPS) P. Parayil Mana Damodaran, Aurang Zaib, Stefan Wallentowitz, Thomas Wild, Andreas Herkersdorf
2014	J	`jnl`	A Layered Modeling and Simulation Approach to investigate Resource-aware Computing in MPSoCs. CoRR Aurang Zaib, Prashanth Raju, Thomas Wild, Andreas Herkersdorf
2014	A	`conf`	A network virtualization approach for performance isolation in controller area network (CAN). RTAS Christian Herber, Andre Oliver Richter, Thomas Wild, Andreas Herkersdorf
2014	—	`conf`	An automotive specific MILP model targeting power-aware function partitioning. ICSAMOS Gregor Walla, Andreas Herkersdorf, Andre S. Enger, Andreas Barthels, Hans-Ulrich Michel
2014	—	`conf`	Apps-usage driven energy management for multicore mobile computing systems. ISIC Hou Zhao Qi Rex, Jong Ching Chuen, Andreas Herkersdorf
2014	A*	`conf`	CAP: Communication Aware Programming. DAC Jan Heisswolf, Aurang Zaib, Andreas Zwinkau, Sebastian Kobbe, Andreas Weichslgartner, Jürgen Teich, Jörg Henkel, Gregor Snelting, Andreas Herkersdorf, Jürgen Becker
2014	A	`conf`	Connecting different worlds - Technology abstraction for reliability-aware design and Test. DATE Ulf Schlichtmann, Veit Kleeberger, Jacob A. Abraham, Adrian Evans, Christina Gimmler-Dumont, Michael Glaß, Andreas Herkersdorf, Sani R. Nassif, Norbert Wehn
2014	—	`conf`	Deadline-Aware Interrupt Coalescing in Controller Area Network (CAN). HPCC/CSS/ICESS Christian Herber, Andre Oliver Richter, Thomas Wild, Andreas Herkersdorf
2014	—	`conf`	Deep packet inspection in residential gateways and routers: Issues and challenges. ISIC Subramanian Shiva Shankar, Pinxing Lin, Andreas Herkersdorf
2014	C	`conf`	Dependable task and communication migration in tiled manycore system-on-chip. FDL Stefan Wallentowitz, Stefan Rosch, Thomas Wild, Andreas Herkersdorf, Volker Wenzel, Jörg Henkel
2014	A	`conf`	Distributed cooperative shared last-level caching in tiled multiprocessor system on chip. DATE Preethi P. Damodaran, Stefan Wallentowitz, Andreas Herkersdorf
2014	A	`conf`	Hardware virtualization support for shared resources in mixed-criticality multicore systems. DATE Oliver Sander, Timo Sandmann, Viet Vu Duy, Steffen Bähr, Falco Bapp, Jürgen Becker, Hans-Ulrich Michel, Dirk Kaule, Daniel Adam, Enno Lübbers, Jürgen Hairbucher, Andre Oliver Richter, Christian Herber, Andreas Herkersdorf
2014	C	`conf`	Iterative FPGA Implementation Easing Safety Certification for Mixed-Criticality Embedded Real-Time Systems. DSD Daniel Münch, Michael Paulitsch, Michael Honold, Wolfgang Schlecker, Andreas Herkersdorf
2014	—	`conf`	Performance Isolation Exposure in Virtualized Platforms with PCI Passthrough I/O Sharing. ARCS Andre Oliver Richter, Christian Herber, Holm Rauchfuss, Thomas Wild, Andreas Herkersdorf
2014	J	`jnl`	Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience. Microelectron. Reliab. Andreas Herkersdorf, Hananeh Aliee, Michael Engel, Michael Glaß, Christina Gimmler-Dumont, Jörg Henkel, Veit Kleeberger, Michael A. Kochte, Johannes Maximilian Kühn, Daniel Mueller-Gritschneder, Sani R. Nassif, Holm Rauchfuss, Wolfgang Rosenstiel, Ulf Schlichtmann, Muhammad Shafique, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Christian Weis, Hans-Joachim Wunderlich
2014	J	`jnl`	Spatial and temporal isolation of virtual CAN controllers. SIGBED Rev. Christian Herber, Andre Oliver Richter, Holm Rauchfuss, Andreas Herkersdorf
2014	A	`conf`	System integration - The bridge between More than Moore and More Moore. DATE Andy Heinig, Manfred Dietrich, Andreas Herkersdorf, Felix Miller, Thomas Wild, Kai Hahn, Armin Grünewald, Rainer Brück, Steffen Krohnert, Jochen Reisinger
2014	—	`conf`	Temporal Separation for Hardware-Based I/O Virtualization for Mixed-Criticality Embedded Real-Time Systems Using PCIe SR-IOV. ARCS Workshops Daniel Münch, Michael Paulitsch, Andreas Herkersdorf
2014	—	`conf`	The Invasive Network on Chip - A Multi-Objective Many-Core Communication Infrastructure. ARCS Workshops Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Martin Karle, Maximilian Singh, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker
2013	J	`jnl`	A Cross-Layer Technology-Based Study of How Memory Errors Impact System Resilience. IEEE Micro Veit Kleeberger, Christina Gimmler-Dumont, Christian Weis, Andreas Herkersdorf, Daniel Mueller-Gritschneder, Sani R. Nassif, Ulf Schlichtmann, Norbert Wehn
2013	C	`conf`	A Design Space Exploration Framework For Automotive Embedded Systems And Their Power Management. ECMS Gregor Walla, Zaur Molotnikov, Hans-Ulrich Michel, Walter Stechele, Andreas Barthels, Andreas Herkersdorf
2013	C	`conf`	AUTO-GS: Self-Optimization of NoC Traffic through Hardware Managed Virtual Connections. DSD Aurang Zaib, Jan Heisswolf, Andreas Weichslgartner, Thomas Wild, Jürgen Teich, Jürgen Becker, Andreas Herkersdorf
2013	—	`conf`	Evaluation of hop count advantages of network-coded 2D-mesh NoCs. PATMOS Michael Vonbun, Stefan Wallentowitz, Michael Feilen, Walter Stechele, Andreas Herkersdorf
2013	—	`conf`	HW-OSQM: Reducing the Impact of Event Signaling by Hardware-Based Operating System Queue Manipulation. ARCS Stefan Wallentowitz, Thomas Wild, Andreas Herkersdorf
2013	—	`conf`	Hardware Supported Adaptive Data Collection for Networks on Chip. IPDPS Workshops Jan Heisswolf, Andreas Weichslgartner, Aurang Zaib, Ralf König, Thomas Wild, Andreas Herkersdorf, Jürgen Teich, Jürgen Becker
2013	—	`conf`	Hardware-Based I/O Virtualization for Mixed Criticality Real-Time Systems Using PCIe SR-IOV. CSE Daniel Münch, Ole Isfort, Kevin Mueller, Michael Paulitsch, Andreas Herkersdorf
2013	J	`jnl`	Introduction to the special section on multiprocessor system-on-chip for cyber-physical systems. ACM Trans. Embed. Comput. Syst. Michael Hübner, Andreas Herkersdorf
2013	J	`jnl`	Invasive Computing - Common Terms and Granularity of Invasion CoRR Jürgen Teich, Wolfgang Schröder-Preikschat, Andreas Herkersdorf
2013	J	`jnl`	Multicore Enablement for Embedded and Cyber Physical Systems (Dagstuhl Seminar 13052). Dagstuhl Reports Andreas Herkersdorf, Michael Paulitsch
2013	J	`jnl`	Open Tiled Manycore System-on-Chip CoRR Stefan Wallentowitz, Philipp Wagner, Michael Tempelmeier, Thomas Wild, Andreas Herkersdorf
2013	—	`conf`	Potentials and Challenges for Multi-Core Processors in Robotic Applications. GI-Jahrestagung Andreas Herkersdorf, Johny Paul, Ravi Kumar Pujari, Walter Stechele, Stefan Wallentowitz, Thomas Wild, Aurang Zaib
2013	—	`conf`	Self-virtualized CAN Controller for Multi-core Processors in Real-Time Applications. ARCS Christian Herber, Andre Oliver Richter, Holm Rauchfuss, Andreas Herkersdorf
2013	J	`jnl`	Virtual networks - distributed communication resource management. ACM Trans. Reconfigurable Technol. Syst. Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Ralf König, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker
2013	J	`jnl`	Virtualized and fault-tolerant inter-layer-links for 3D-ICs. Microprocess. Microsystems Felix Miller, Thomas Wild, Andreas Herkersdorf
2012	—	`conf`	A Real-Time Capable Virtualized Information and Communication Technology Infrastructure for Automotive Systems. Advances in Real-Time Systems Sebastian Drössler, Michael Eichhorn, S. Holzknecht, Bernd Müller-Rathgeber, Holm Rauchfuss, Michael Zwick, Erwin M. Biebl, Klaus Diepold, Jörg Eberspächer, Andreas Herkersdorf, Walter Stechele, Eckehard G. Steinbach, R. Freymann, Karl-Ernst Steinberg, Hans-Ulrich Michel
2012	B	`conf`	A framework for Open Tiled Manycore System-On-Chip. FPL Stefan Wallentowitz, Andreas Lankes, Aurang Zaib, Thomas Wild, Andreas Herkersdorf
2012	C	`conf`	A low-overhead monitoring ring interconnect for MPSoC parameter optimization. DDECS Abdelmajid Bouajila, Abdallah Lakhtel, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf
2012	—	`ed.`	ARCS 2012 Workshops, 28. Februar - 2. März 2012, München, Germany ARCS Workshops Gero Mühl, Jan Richling, Andreas Herkersdorf
2012	C	`conf`	An integrated simulation framework for invasive computing. FDL Michael Gerndt, Frank Hannig, Andreas Herkersdorf, Andreas Hollmann, Marcel Meyer, Sascha Roloff, Josef Weidendorfer, Thomas Wild, Aurang Zaib
2012	C	`conf`	Analytical Design Space Exploration Based on Statistically Refined Runtime and Logic Estimation for Software Defined Radios. DSD Matthias Ihmig, Michael Feilen, Andreas Herkersdorf
2012	—	`ed.`	Architecture of Computing Systems - ARCS 2012 - 25th International Conference, Munich, Germany, February 28 - March 2, 2012. Proceedings ARCS Andreas Herkersdorf, Kay Römer, Uwe Brinkschulte
2012	J	`jnl`	Benefits of selective packet discard in networks-on-chip. ACM Trans. Archit. Code Optim. Andreas Lankes, Thomas Wild, Stefan Wallentowitz, Andreas Herkersdorf
2012	B	`conf`	Dependable embedded systems: The German research foundation DFG priority program SPP 1500. ETS Jörg Henkel, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel, Norbert Wehn
2012	—	`conf`	Enhanced Reliability in Tiled Manycore Architectures through Transparent Task Relocation. ARCS Workshops Holm Rauchfuss, Thomas Wild, Andreas Herkersdorf
2012	—	`conf`	Hardware-assisted Decentralized Resource Management for Networks on Chip with QoS. IPDPS Workshops Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Ralf König, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker
2012	—	`conf`	Invasive manycore architectures. ASP-DAC Jörg Henkel, Andreas Herkersdorf, Lars Bauer, Thomas Wild, Michael Hübner, Ravi Kumar Pujari, Artjom Grudnitsky, Jan Heisswolf, Aurang Zaib, Benjamin Vogel, Vahid Lari, Sebastian Kobbe
2012	J	`jnl`	Multicore Enablement for Automotive Cyber Physical Systems. it Inf. Technol. Andreas Herkersdorf, Hans-Ulrich Michel, Holm Rauchfuss, Thomas Wild
2012	—	`conf`	Multicore enablement for Cyber Physical Systems. ICSAMOS Andreas Herkersdorf
2012	—	`conf`	System-level software performance simulation considering out-of-order processor execution. ISSoC Roman Plyaskin, Thomas Wild, Andreas Herkersdorf
2012	C	`conf`	TSV-virtualization for Multi-protocol-Interconnect in 3D-ICs. DSD Felix Miller, Thomas Wild, Andreas Herkersdorf
2012	A	`conf`	Virtual platforms: Breaking new grounds. DATE Rainer Leupers, Grant Martin, Roman Plyaskin, Andreas Herkersdorf, Frank Schirrmeister, Tim Kogel, Martin Vaupel
2011	—	`conf`	Accelerating collective communication in message passing on manycore System-on-Chip. ICSAMOS Stefan Wallentowitz, Marcel Meyer, Thomas Wild, Andreas Herkersdorf
2011	J	`jnl`	Advanced Packet Segmentation and Buffering Algorithms in Network Processors. Trans. High Perform. Embed. Archit. Compil. Daniel Llorente, Kimon Karras, Thomas Wild, Andreas Herkersdorf
2011	—	`conf`	Agent-Based Thermal Management Using Real-Time I/O Communication Relocation for 3D Many-Cores. PATMOS Thomas Ebi, Holm Rauchfuss, Andreas Herkersdorf, Jörg Henkel
2011	A	`conf`	An approach to improve accuracy of source-level TLMs of embedded software. DATE Zhonglei Wang, Kun Lu, Andreas Herkersdorf
2011	C	`conf`	An architecture and an FPGA prototype of a reliable processor pipeline towards multiple soft- and timing errors. DDECS Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf
2011	—	`ch.`	Applying ASoC to Multi-core Applications for Workload Management. Organic Computing Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Andreas Herkersdorf
2011	—	`conf`	Applying autonomic principles for workload management in multi-core systems on chip. ICAC Johannes Zeppenfeld, Andreas Herkersdorf
2011	—	`ch.`	Autonomic System on Chip Platform. Organic Computing Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Andreas Herkersdorf
2011	—	`ch.`	Combining Software and Hardware LCS for Lightweight On-chip Learning. Organic Computing Andreas Bernauer, Johannes Zeppenfeld, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel
2011	C	`conf`	Context-aware compiled simulation of out-of-order processor behavior based on atomic traces. VLSI-SoC Roman Plyaskin, Andreas Herkersdorf
2011	Misc	`conf`	Design and architectures for dependable embedded systems. CODES+ISSS Jörg Henkel, Lars Bauer, Joachim Becker, Oliver Bringmann, Uwe Brinkschulte, Samarjit Chakraborty, Michael Engel, Rolf Ernst, Hermann Härtig, Lars Hedrich, Andreas Herkersdorf, Rüdiger Kapitza, Daniel Lohmann, Peter Marwedel, Marco Platzner, Wolfgang Rosenstiel, Ulf Schlichtmann, Olaf Spinczyk, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Hans-Joachim Wunderlich
2011	—	`ch.`	Hardware Support for Efficient Resource Utilization in Manycore Processor Systems. Multiprocessor System-on-Chip Andreas Herkersdorf, Andreas Lankes, Michael Meitinger, Rainer Ohlendorf, Stefan Wallentowitz, Thomas Wild, Johannes Zeppenfeld
2011	—	`ch.`	Invasive Computing: An Overview. Multiprocessor System-on-Chip Jürgen Teich, Jörg Henkel, Andreas Herkersdorf, Doris Schmitt-Landsiedel, Wolfgang Schröder-Preikschat, Gregor Snelting
2011	J	`jnl`	Organic Computing - Design of Self-Organizing Systems (Dagstuhl Seminar 11181). Dagstuhl Reports Kirstie L. Bellman, Andreas Herkersdorf, Michael G. Hinchey
2010	—	`conf`	A Method for Accurate High-Level Performance Evaluation of MPSoC Architectures Using Fine-Grained Generated Traces. ARCS Roman Plyaskin, Andreas Herkersdorf
2010	—	`conf`	A folded pipeline network processor architecture for 100 Gbit/s networks. ANCS Kimon Karras, Thomas Wild, Andreas Herkersdorf
2010	A	`conf`	A rapid prototyping system for error-resilient multi-processor systems-on-chip. DATE Matthias May, Norbert Wehn, Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Daniel Ziener, Jürgen Teich
2010	—	`conf`	An Application-Aware Load Balancing Strategy for Network Processors. HiPEAC Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf
2010	C	`conf`	Architectural Vulnerability Factor Estimation with Backwards Analysis. DSD Robert Hartl, Andreas J. Rohatschek, Walter Stechele, Andreas Herkersdorf
2010	—	`conf`	Autonomic Workload Management for Multi-core Processor Systems. ARCS Johannes Zeppenfeld, Andreas Herkersdorf
2010	—	`conf`	Combining Software and Hardware LCS for Lightweight On-Chip Learning. DIPES/BICC Andreas Bernauer, Johannes Zeppenfeld, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel
2010	—	`conf`	Comparison of Deadlock Recovery and Avoidance Mechanisms to Approach Message Dependent Deadlocks in On-chip Networks. NOCS Andreas Lankes, Thomas Wild, Andreas Herkersdorf, Sören Sonntag, Helmut Reinig
2010	—	`ch.`	FlexPath NP - Flexible, Dynamically Reconfigurable Processing Paths in Network Processors. Dynamically Reconfigurable Systems Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf
2010	C	`conf`	High-level timing analysis of concurrent applications on MPSoC platforms using memory-aware trace-driven simulations. VLSI-SoC Roman Plyaskin, Alejandro Masrur, Martin Geier, Samarjit Chakraborty, Andreas Herkersdorf
2010	J	`jnl`	Software performance simulation strategies for high-level embedded system design. Perform. Evaluation Zhonglei Wang, Andreas Herkersdorf
2010	—	`conf`	Towards Scalability and Reliability of Autonomic Systems on Chip. ISORC Workshops Johannes Zeppenfeld, Abdelmajid Bouajila, Andreas Herkersdorf, Walter Stechele
2009	C	`conf`	An Efficient Hardware Architecture for Packet Re-sequencing in Network Processors MPSoCs. DSD Shadi Traboulsi, Michael Meitinger, Rainer Ohlendorf, Andreas Herkersdorf
2009	A*	`conf`	An efficient approach for system-level timing simulation of compiler-optimized embedded software. DAC Zhonglei Wang, Andreas Herkersdorf
2009	B	`conf`	Flow Analysis on Intermediate Source Code for WCET Estimation of Compiler-Optimized Programs. RTCSA Zhonglei Wang, Andreas Herkersdorf
2009	C	`conf`	Hierarchical NoCs for Optimized Access to Shared Memory and IO Resources. DSD Andreas Lankes, Thomas Wild, Andreas Herkersdorf
2009	—	`conf`	NoC topology exploration for mobile multimedia applications. ICECS Andreas Lankes, Andreas Herkersdorf, Sören Sonntag, Helmut Reinig
2009	A*	`conf`	SysCOLA: a framework for co-development of automotive software and system platform. DAC Zhonglei Wang, Andreas Herkersdorf, Wolfgang Haberl, Martin Wechs
2008	—	`conf`	A Hardware Packet Re-Sequencer Unit for Network Processors. ARCS Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf
2008	C	`conf`	A Model Driven Development Approach for Implementing Reactive Systems in Hardware. FDL Zhonglei Wang, Andreas Herkersdorf, Stefano Merenda, Michael Tautschnig
2008	J	`jnl`	A Processing Path Dispatcher in Network Processor MPSoCs. IEEE Trans. Very Large Scale Integr. Syst. Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf
2008	C	`conf`	A Simulation Approach for Performance Validation during Embedded Systems Design. ISoLA Zhonglei Wang, Wolfgang Haberl, Andreas Herkersdorf, Martin Wechs
2008	—	`conf`	Buffer allocation for advanced packet segmentation in Network Processors. ASAP Daniel Llorente, Kimon Karras, Thomas Wild, Andreas Herkersdorf
2008	A	`conf`	Design Flows, Communication Based Design and Architectures in Automotive Electronic Systems. DATE Jürgen Becker, Michael Hübner, Robert Esser, Andreas Herkersdorf, Walter Stechele, Vera Lauer
2008	—	`conf`	Determining the Fidelity of Hardware-In-the-Loop Simulation Coupling Systems. BMAS Christian Köhler, Albrecht Mayer, Andreas Herkersdorf
2008	B	`conf`	Fine grain reconfigurable architectures. FPL Josef Angermeier, Mateusz Majer, Jürgen Teich, Lars Braun, Tobias Schwalb, Philipp Graf, Michael Hübner, Jürgen Becker, Enno Lübbers, Marco Platzner, Christopher Claus, Walter Stechele, Andreas Herkersdorf, Markus Rullmann, Renate Merker
2008	—	`conf`	FlexPath NP - A network processor architecture with flexible processing paths. SoC Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf
2008	—	`conf`	Improving memory subsystem performance in network processors with smart packet segmentation. ICSAMOS Kimon Karras, Daniel Llorente, Thomas Wild, Andreas Herkersdorf
2008	—	`conf`	Learning Classifier Tables for Autonomic Systems on Chip. GI Jahrestagung (2) Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf
2008	B	`conf`	Network processors. FPL Thilo Pionteck, Roman Koch, Carsten Albrecht, Erik Maehle, Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf
2008	—	`conf`	SciSim: a software performance estimation framework using source code instrumentation. WOSP Zhonglei Wang, Antonio Sánchez, Andreas Herkersdorf
2008	—	`conf`	Workshop "Adaptive and Organic Systems". GI Jahrestagung (2) Andreas Herkersdorf, Walter Stechele, Christian Müller-Schloer, Hartmut Schmeck
2007	—	`conf`	A Programmable Stream Processing Engine for Packet Manipulation in Network Processors. ISVLSI Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf
2007	J	`jnl`	Autovision - A Run-time Reconfigurable MPSoC Architecture for Future Driver Assistance Systems (Autovision - Eine zur Laufzeit rekonfigurierbare MPSoC Architektur für zukünftige Fahrerassistenzsysteme). it Inf. Technol. Christopher Claus, Walter Stechele, Andreas Herkersdorf
2007	J	`jnl`	Simulated and measured performance evaluation of RISC-based SoC platforms in network processing applications. J. Syst. Archit. Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf
2006	—	`conf`	An Architecture for Runtime Evaluation of SoC Reliability. GI Jahrestagung (1) Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf
2006	A	`conf`	AutoVision: flexible processor architecture for video-assisted driving. DATE Andreas Herkersdorf, Walter Stechele
2006	—	`conf`	Error Detection Techniques Applicable in an Architecture Framework and Design Methodology for Autonomic SoCs. BICC Abdelmajid Bouajila, Andreas Bernauer, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele
2006	C	`conf`	Organic Computing at the System on Chip Level. VLSI-SoC Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel
2006	—	`conf`	Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications. ICSAMOS Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf
2006	A	`conf`	Performance evaluation for system-on-chip architectures using trace-based transaction level simulation. DATE Thomas Wild, Andreas Herkersdorf, Rainer Ohlendorf
2006	—	`conf`	Reconfigurable Processing Units vs. Reconfigurable Interconnects. Dynamically Reconfigurable Architectures Andreas Herkersdorf, Christopher Claus, Michael Meitinger, Rainer Ohlendorf, Thomas Wild
2005	—	`conf`	Adaptable DSP Functions for Dynamically Reconfigurable Communication Systems. ARCS Workshops Faisal Suleman, Dirk Eilers, Helmut Steckenbiller, Andreas Herkersdorf
2005	Misc	`conf`	FlexPath NP: a network processor concept with application-driven flexible processing paths. CODES+ISSS Rainer Ohlendorf, Andreas Herkersdorf, Thomas Wild
2005	A	`conf`	Reduction of CMOS Power Consumption and Signal Integrity Issues by Routing Optimization. DATE Paul Zuber, Armin Windschiegl, Raúl Medina Beltrán de Otálora, Walter Stechele, Andreas Herkersdorf
2005	J	`jnl`	Robust header compression (ROHC) in next-generation network processors. IEEE/ACM Trans. Netw. David E. Taylor, Andreas Herkersdorf, Andreas C. Döring, Gero Dittmann
2005	J	`jnl`	TAPES - Trace-based architecture performance evaluation with SystemC. Des. Autom. Embed. Syst. Thomas Wild, Andreas Herkersdorf, Gyoo-Yeong Lee
2005	—	`conf`	Towards a Framework and a Design Methodology for Autonomic SoC. ICAC Gabriel Mihai Lipsa, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele
2005	—	`conf`	Towards a Framework and a Design Methodology for Autonomous SoC. ARCS Workshops Gabriel Mihai Lipsa, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele
2004	—	`conf`	A Comparison of Parallel Programming Models of Network Processors. ARCS Workshops Carsten Albrecht, Rainer Hagenau, Erik Maehle, Andreas C. Döring, Andreas Herkersdorf
2004	Misc	`conf`	Buffer Schemes for Runtime Reconfiguration of Function Variants in Communication Systems. FCCM Dirk Eilers, Helmut Steckenbiller, Andreas Herkersdorf
2004	—	`conf`	Towards a Dynamically Reconfigurable System-on-Chip Platform for Video Signal Processing. ARCS Workshops Walter Stechele, Stephan Herrmann, Andreas Herkersdorf
2004	—	`conf`	Towards a Framework and a Design Methodology for Autonomic Integrated Systems. GI Jahrestagung (2) Andreas Herkersdorf, Wolfgang Rosenstiel
2003	J	`jnl`	Design methodology for a modular service-driven network processor architecture. Comput. Networks Maria Gabrani, Gero Dittmann, Andreas C. Döring, Andreas Herkersdorf, Patricia Sagmeister, Jan van Lunteren
2003	J	`jnl`	IBM PowerNP network processor: Hardware, software, and applications. IBM J. Res. Dev. James R. Allen Jr., Brian M. Bass, Claude Basso, Richard H. Boivie, Jean Calvignac, Gordon T. Davis, Laurent Freléchoux, Marco Heddes, Andreas Herkersdorf, Andreas Kind, Joe F. Logan, Mohammad Peyravian, Mark A. Rinaldi, Ravi K. Sabhikhi, Michael S. Siegel, Marcel Waldvogel
2003	J	`jnl`	Performance evaluation of network processor architectures: combining simulation with analytical estimation. Comput. Networks Samarjit Chakraborty, Simon Künzli, Lothar Thiele, Andreas Herkersdorf, Patricia Sagmeister
2002	J	`jnl`	Early analysis tools for system-on-a-chip design. IBM J. Res. Dev. John A. Darringer, Reinaldo A. Bergamaschi, Subhrajit Bhattacharya, Daniel Brand, Andreas Herkersdorf, Joseph K. Morrell, Indira Nair, Patricia Sagmeister, Youngsoo Shin
2001	J	`jnl`	Single-chip 622-Mb/s SDH/SONET framer, digital cross-connect and add/drop multiplexer solution. IEEE J. Solid State Circuits Peter H. Baechtold, Michael P. Beakes, Peter Buchmann, Rolf Clauberg, John F. Ewen, John F. Gilsdorf, Philippe Hauviller, Andreas Herkersdorf, Jean-Claude Le Garrec, Wolfram W. Lemppenau, Ben Parker, Dale J. Pearson, Joseph M. Pereira, Dominique Plassat, Scott K. Reynolds, Hans R. Schindler, André Steimle, David J. Webb, Albert X. Widmer
2001	J	`jnl`	Technologies and building blocks for fast packet forwarding. IEEE Commun. Mag. Werner Bux, Wolfgang E. Denzel, Ton Engbersen, Andreas Herkersdorf, Ronald P. Luijten
2000	J	`jnl`	Design Methodology for a Large Communication Chip. IEEE Des. Test Comput. Rolf Clauberg, Peter Buchmann, Andreas Herkersdorf, David J. Webb
1999	B	`conf`	A scalable modular architecture for SDH/SONET technology. ICCCN Rolf Clauberg, Andreas Herkersdorf, Wolfram W. Lemppenau, Hans R. Schindler
1995	J	`jnl`	Route Discovery for Multistage Fabrics in ATM Switching Nodes. Perform. Evaluation Andreas Herkersdorf, L. Heusler, Erik Maehle
1993	A*	`conf`	Fast Connection Establishment in Large-Scale Networks. INFOCOM Willibald A. Doeringer, Douglas Dykeman, Antonius P. J. Engbersen, Roch Guérin, Andreas Herkersdorf, L. Heusler
1993	—	`conf`	Route Discovery in Multistage Switch Fabrics. Data Communication Networks and their Performance Andreas Herkersdorf, L. Heusler, Erik Maehle
1991	—	`—`	A method and a tool for the real-time evaluation of fast packet switching systems. Andreas Herkersdorf