Andreas Gerstlauer

183 papers A* 6A 20B 8C 11Misc 15Journal 53Unranked 62
YearRankTypeTitle / Venue / Authors
2025 — conf
Exploring Dendrites in Large-Scale Neuromorphic Architectures.
ICONS
James A. Boyle, Jason Ho, Mark Plagge, Suma George Cardwell, Frances S. Chance, Andreas Gerstlauer
2025 Misc conf
HighWave: Large-Scale High-Bandwidth Wave Simulations on FPGAs.
FCCM
Dimitrios Gourounas, Austin G. James, Bagus Hanindhito, Arash Fathi, Lizy K. John, Andreas Gerstlauer
2025 — conf
LAPD: Lifecycle-Aware Power-Based Malware Detection.
HOST
Alexander Cathis, Mulong Luo, Mohit Tiwari, Andreas Gerstlauer
2025 — conf
LASANA: Large-Scale Surrogate Modeling for Analog Neuromorphic Architecture Exploration.
MLCAD
Jason Ho, James A. Boyle, Linshen Liu, Andreas Gerstlauer
2025 J jnl
LASANA: Large-Scale Surrogate Modeling for Analog Neuromorphic Architecture Exploration.
CoRR
Jason Ho, James A. Boyle, Linshen Liu, Andreas Gerstlauer
2025 J jnl
SANA-FE: Simulating Advanced Neuromorphic Architectures for Fast Exploration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
James A. Boyle, Mark Plagge, Suma George Cardwell, Frances S. Chance, Andreas Gerstlauer
2025 B conf
ViReC: The Virtual Register Context Architecture for Efficient Near-Memory Multithreading.
ICPP
Matthew Barondeau, Sophia Jiang, Jonathan Beard, Andreas Gerstlauer
2024 J jnl
A Hierarchical Classification Method for High-accuracy Instruction Disassembly with Near-field EM Measurements.
ACM Trans. Embed. Comput. Syst.
Vishnuvardhan V. Iyer, Aditya Thimmaiah, Michael Orshansky, Andreas Gerstlauer, Ali E. Yilmaz
2024 J jnl
A Survey of Distributed Learning in Cloud, Mobile, and Edge Settings.
CoRR
Madison Threadgill, Andreas Gerstlauer
2024 J jnl
Characterizing Machine Learning-Based Runtime Prefetcher Selection.
IEEE Comput. Archit. Lett.
Erika S. Alcorta, Mahesh Madhav, Richard Afoakwa, Scott Tetrick, Neeraja J. Yadwadkar, Andreas Gerstlauer
2024 J jnl
Distributed Convolutional Neural Network Training on Mobile and Edge Clusters.
CoRR
Pranav Rama, Madison Threadgill, Andreas Gerstlauer
2024 Misc conf
Efficient Approaches for GEMM Acceleration on Leading AI-Optimized FPGAs.
FCCM
Endri Taka, Dimitrios Gourounas, Andreas Gerstlauer, Diana Marculescu, Aman Arora
2024 J jnl
Efficient Approaches for GEMM Acceleration on Leading AI-Optimized FPGAs.
CoRR
Endri Taka, Dimitrios Gourounas, Andreas Gerstlauer, Diana Marculescu, Aman Arora
2024 — conf
SoK Paper: Power Side-Channel Malware Detection.
HASP@MICRO
Alexander Cathis, Ge Li, Shijia Wei, Michael Orshansky, Mohit Tiwari, Andreas Gerstlauer
2024 Misc conf
Tutorial: Large-Scale Spiking Neuromorphic Architecture Exploration using SANA-FE.
CODES+ISSS
James A. Boyle, Mark Plagge, Suma George Cardwell, Frances S. Chance, Andreas Gerstlauer
2023 — conf
FAWS: FPGA Acceleration of Large-Scale Wave Simulations.
ASAP
Dimitrios Gourounas, Bagus Hanindhito, Arash Fathi, Dimitar Trenev, Lizy K. John, Andreas Gerstlauer
2023 A conf
LAWS: Large-Scale Accelerated Wave Simulations on FPGAs.
FPGA
Dimitrios Gourounas, Bagus Hanindhito, Arash Fathi, Dimitar Trenev, Lizy Kurian John, Andreas Gerstlauer
2023 J jnl
Learning-based Phase-aware Multi-core CPU Workload Forecasting.
ACM Trans. Design Autom. Electr. Syst.
Erika Susana Alcorta Lozano, Andreas Gerstlauer
2023 J jnl
Lightweight ML-based Runtime Prefetcher Selection on Many-core Platforms.
CoRR
Erika S. Alcorta, Mahesh Madhav, Scott Tetrick, Neeraja J. Yadwadkar, Andreas Gerstlauer
2023 J jnl
Machine Learning-Based Microarchitecture- Level Power Modeling of CPUs.
IEEE Trans. Computers
Ajay Krishna Ananda Kumar, Sami Alsalamin, Hussam Amrouch, Andreas Gerstlauer
2023 B conf
Memory Latency Distribution-Driven Regulation for Temporal Isolation in MPSoCs.
ECRTS
Ahsan Saeed, Denis Hoornaert, Dakshina Dasari, Dirk Ziegenbein, Daniel Mueller-Gritschneder, Ulf Schlichtmann, Andreas Gerstlauer, Renato Mancuso
2023 — conf
Performance and Energy Simulation of Spiking Neuromorphic Architectures for Fast Exploration.
ICONS
James A. Boyle, Mark Plagge, Suma George Cardwell, Frances S. Chance, Andreas Gerstlauer
2023 Misc conf
Special Session: Machine Learning for Embedded System Design.
CODES+ISSS
Erika S. Alcorta, Andreas Gerstlauer, Chenhui Deng, Qi Sun, Zhiru Zhang, Ceyu Xu, Lisa Wu Wills, Daniela Sanchez Lopera, Wolfgang Ecker, Siddharth Garg, Jiang Hu
2022 J jnl
CASPHAr: Cache-Managed Accelerator Staging and Pipelining in Heterogeneous System Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mochamad Asri, Andreas Gerstlauer
2022 J jnl
Characterizing Approximate Adders and Multipliers for Mitigating Aging and Temperature Degradations.
IEEE Trans. Circuits Syst. I Regul. Pap.
Francisco Javier Hernandez Santiago, Honglan Jiang, Hussam Amrouch, Andreas Gerstlauer, Leibo Liu, Jie Han
2022 A conf
GAPS: GPU-acceleration of PDE solvers for wave simulation.
ICS
Bagus Hanindhito, Dimitrios Gourounas, Arash Fathi, Dimitar Trenev, Andreas Gerstlauer, Lizy K. John
2022 — conf
High-Level Simulation of Embedded Software Vulnerabilities to EM Side-Channel Attacks.
SAMOS
Aditya Thimmaiah, Vishnuvardhan V. Iyer, Andreas Gerstlauer, Michael Orshansky
2022 J jnl
Introduction to the Special Issue on Approximate Systems.
ACM Trans. Design Autom. Electr. Syst.
Armin Alaghi, Eva Darulova, Andreas Gerstlauer, Phillip Stanley-Marbell
2022 — conf
MAFAT: Memory-Aware Fusing and Tiling of Neural Networks for Accelerated Edge Inference.
IESS
Jackson Farley, Andreas Gerstlauer
2022 A conf
Memory Utilization-Based Dynamic Bandwidth Regulation for Temporal Isolation in Multi-Cores.
RTAS
Ahsan Saeed, Dakshina Dasari, Dirk Ziegenbein, Varun Rajasekaran, Falk Rehm, Michael Pressler, Arne Hamann, Daniel Mueller-Gritschneder, Andreas Gerstlauer, Ulf Schlichtmann
2022 J jnl
Report on the 2021 Embedded Systems Week (ESWEEK).
IEEE Des. Test
Andreas Gerstlauer, Aviral Shrivastava
2021 — conf
Approximate Computing for ML: State-of-the-art, Challenges and Visions.
ASP-DAC
Georgios Zervakis, Hassaan Saadat, Hussam Amrouch, Andreas Gerstlauer, Sri Parameswaran, Jörg Henkel
2021 J jnl
Approximate Systems (Dagstuhl Seminar 21302).
Dagstuhl Reports
Eva Darulova, Babak Falsafi, Andreas Gerstlauer, Phillip Stanley-Marbell
2021 J jnl
Cross-Layer Approximate Hardware Synthesis for Runtime Configurable Accuracy.
IEEE Trans. Very Large Scale Integr. Syst.
Tanfer Alan, Andreas Gerstlauer, Jörg Henkel
2021 J jnl
DeeperThings: Fully Distributed CNN Inference on Resource-Constrained Edge Devices.
Int. J. Parallel Program.
Rafael Stahl, Alexander Hoffman, Daniel Mueller-Gritschneder, Andreas Gerstlauer, Ulf Schlichtmann
2021 J jnl
Exploiting Errors for Efficiency: A Survey from Circuits to Applications.
ACM Comput. Surv.
Phillip Stanley-Marbell, Armin Alaghi, Michael Carbin, Eva Darulova, Lara Dolecek, Andreas Gerstlauer, Ghayoor Gillani, Djordje Jevdjic, Thierry Moreau, Mattia Cacciotti, Alexandros Daglis, Natalie D. Enright Jerger, Babak Falsafi, Sasa Misailovic, Adrian Sampson, Damien Zufferey
2021 J jnl
Hardware Accelerator Integration Tradeoffs for High-Performance Computing: A Case Study of GEMM Acceleration in N-Body Methods.
IEEE Trans. Parallel Distributed Syst.
Mochamad Asri, Dhairya Malhotra, Jiajun Wang, George Biros, Lizy K. John, Andreas Gerstlauer
2021 J jnl
Horizontal Side-Channel Vulnerabilities of Post-Quantum Key Exchange and Encapsulation Protocols.
ACM Trans. Embed. Comput. Syst.
Furkan Aydin, Aydin Aysu, Mohit Tiwari, Andreas Gerstlauer, Michael Orshansky
2021 — conf
Learning based Memory Interference Prediction for Co-running Applications on Multi-Cores.
MLCAD
Ahsan Saeed, Daniel Mueller-Gritschneder, Falk Rehm, Arne Hamann, Dirk Ziegenbein, Ulf Schlichtmann, Andreas Gerstlauer
2021 — conf
Learning-Based Workload Phase Classification and Prediction Using Performance Monitoring Counters.
MLCAD
Erika S. Alcorta, Andreas Gerstlauer
2021 J jnl
Memory-Aware Fusing and Tiling of Neural Networks for Accelerated Edge Inference.
CoRR
Jackson Farley, Andreas Gerstlauer
2021 — conf
Phase-Aware CPU Workload Forecasting.
SAMOS
Erika S. Alcorta, Pranav Rama, Aswin Ramachandran, Andreas Gerstlauer
2021 J jnl
Report on the 2020 Embedded Systems Week (ESWEEK): A Virtual Event during a Pandemic, September 20-25.
IEEE Des. Test
Tulika Mitra, Andreas Gerstlauer
2021 A conf
Virtual-Link: A Scalable Multi-Producer Multi-Consumer Message Queue Architecture for Cross-Core Communication.
IPDPS
Qinzhe Wu, Jonathan Beard, Ashen Ekanayake, Andreas Gerstlauer, Lizy K. John
2021 B conf
Wave-PIM: Accelerating Wave Simulation Using Processing-in-Memory.
ICPP
Bagus Hanindhito, Ruihao Li, Dimitrios Gourounas, Arash Fathi, Karan Govil, Dimitar Trenev, Andreas Gerstlauer, Lizy Kurian John
2020 Misc ed.
20th International Conference on Embedded Software, EMSOFT 2020, Singapore, September 20-25, 2020
EMSOFT
Tulika Mitra, Andreas Gerstlauer
2020 J jnl
Aging Compensation With Dynamic Computation Approximation.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl.
Heesu Kim, Jongho Kim, Hussam Amrouch, Jörg Henkel, Andreas Gerstlauer, Kiyoung Choi, Hanmin Park
2020 Misc conf
Cacheline Utilization-Aware Link Traffic Compression for Modular GPUs.
VLSID
Kishore Punniyamurthy, Shomit Das, Andreas Gerstlauer
2020 J jnl
Dynamic Power and Energy Management for NCFET-Based Processors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sami Salamin, Martin Rapp, Jörg Henkel, Andreas Gerstlauer, Hussam Amrouch
2020 A conf
Energy Optimization in NCFET-based Processors.
DATE
Sami Salamin, Martin Rapp, Hussam Amrouch, Andreas Gerstlauer, Jörg Henkel
2020 Misc ed.
International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2020, Singapore, September 20-25, 2020
CASES
Tulika Mitra, Andreas Gerstlauer
2020 J jnl
Network-level Design Space Exploration of Resource-constrained Networks-of-Systems.
ACM Trans. Embed. Comput. Syst.
Zhuoran Zhao, Kamyar Mirzazad Barijough, Andreas Gerstlauer
2020 C conf
Off-Chip Congestion Management for GPU-based Non-Uniform Processing-in-Memory Networks.
PDP
Kishore Punniyamurthy, Andreas Gerstlauer
2020 A conf
Runtime Accuracy-Configurable Approximate Hardware Synthesis Using Logic Gating and Relaxation.
DATE
Tanfer Alan, Andreas Gerstlauer, Jörg Henkel
2020 B conf
TAFE: Thread Address Footprint Estimation for Capturing Data/Thread Locality in GPU Systems.
PACT
Kishore Punniyamurthy, Andreas Gerstlauer
2020 C conf
The Non-Uniform Compute Device (NUCD) Architecture for Lightweight Accelerator Offload.
PDP
Mochamad Asri, Curtis Dunham, Roxana Rusitoru, Andreas Gerstlauer, Jonathan Beard
2020 J jnl
Virtual-Link: A Scalable Multi-Producer, Multi-Consumer Message Queue Architecture for Cross-Core Communication.
CoRR
Qinzhe Wu, Jonathan Beard, Ashen Ekanayake, Andreas Gerstlauer, Lizy K. John
2019 B conf
A Study of Core Utilization and Residency in Heterogeneous Smart Phone Architectures.
ICPE
Joseph Whitehouse, Qinzhe Wu, Shuang Song, Eugene John, Andreas Gerstlauer, Lizy K. John
2019 C conf
Aging Gracefully with Approximation.
ISCAS
Jongho Kim, Heesu Kim, Hussam Amrouch, Jörg Henkel, Andreas Gerstlauer, Kiyoung Choi
2019 — ch.
Approximate High-Level Synthesis of Custom Hardware.
Approximate Circuits
Seogoo Lee, Andreas Gerstlauer
2019 — conf
Fully Distributed Deep Learning Inference on Resource-Constrained Edge Devices.
SAMOS
Rafael Stahl, Zhuoran Zhao, Daniel Mueller-Gritschneder, Andreas Gerstlauer, Ulf Schlichtmann
2019 — conf
Horus Testbed: Implementation of Real-Time Video Streaming Protocols.
SysCon
Ahmed Abdelhadi, Andreas Gerstlauer, Sriram Vishwanath
2019 J jnl
On the Efficiency of Voltage Overscaling under Temperature and Aging Effects.
IEEE Trans. Computers
Hussam Amrouch, Seyed Borna Ehsani, Andreas Gerstlauer, Jörg Henkel
2019 J jnl
Quality/Latency-Aware Real-time Scheduling of Distributed Streaming IoT Applications.
ACM Trans. Embed. Comput. Syst.
Kamyar Mirzazad Barijough, Zhuoran Zhao, Andreas Gerstlauer
2019 — conf
Real-Time Rate Distortion Optimized and Adaptive Low Complexity Algorithms for Video Streaming.
SysCon
Ahmed Abdelhadi, Andreas Gerstlauer, Sriram Vishwanath
2019 — conf
Using Power-Anomalies to Counter Evasive Micro-Architectural Attacks in Embedded Systems.
HOST
Shijia Wei, Aydin Aysu, Michael Orshansky, Andreas Gerstlauer, Mohit Tiwari
2018 — conf
BUQS: Battery- and user-aware QoS scaling for interactive mobile devices.
ASP-DAC
Wooseok Lee, Reena Panda, Dam Sunwoo, José A. Joao, Andreas Gerstlauer, Lizy K. John
2018 A conf
CAMP: Accurate modeling of core and memory locality for proxy generation of big-data applications.
DATE
Reena Panda, Xinnian Zheng, Andreas Gerstlauer, Lizy Kurian John
2018 J jnl
Data-Dependent Loop Approximations for Performance-Quality Driven High-Level Synthesis.
IEEE Embed. Syst. Lett.
Seogoo Lee, Andreas Gerstlauer
2018 J jnl
DeepThings: Distributed Adaptive Deep Learning Inference on Resource-Constrained IoT Edge Clusters.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Zhuoran Zhao, Kamyar Mirzazad Barijough, Andreas Gerstlauer
2018 J jnl
Exploiting Errors for Efficiency: A Survey from Circuits to Algorithms.
CoRR
Phillip Stanley-Marbell, Armin Alaghi, Michael Carbin, Eva Darulova, Lara Dolecek, Andreas Gerstlauer, Ghayoor Gillani, Djordje Jevdjic, Thierry Moreau, Mattia Cacciotti, Alexandros Daglis, Natalie D. Enright Jerger, Babak Falsafi, Sasa Misailovic, Adrian Sampson, Damien Zufferey
2018 — conf
Horizontal side-channel vulnerabilities of post-quantum key exchange protocols.
HOST
Aydin Aysu, Youssef Tobah, Mohit Tiwari, Andreas Gerstlauer, Michael Orshansky
2018 J jnl
Learning-Based, Fine-Grain Power Modeling of System-Level Hardware IPs.
ACM Trans. Design Autom. Electr. Syst.
Dongwook Lee, Andreas Gerstlauer
2018 C conf
MASES: Mobility And Slack Enhanced Scheduling For Latency-Optimized Pipelined Dataflow Graphs.
SCOPES
Wenxiao Yu, Jacob Kornerup, Andreas Gerstlauer
2018 J jnl
Start Late or Finish Early: A Distributed Graph Processing System with Redundancy Reduction.
CoRR
Shuang Song, Xu Liu, Qinzhe Wu, Andreas Gerstlauer, Tao Li, Lizy K. John
2018 J jnl
Start Late or Finish Early: A Distributed Graph Processing System with Redundancy Reduction.
Proc. VLDB Endow.
Shuang Song, Xu Liu, Qinzhe Wu, Andreas Gerstlauer, Tao Li, Lizy K. John
2018 C conf
Trading Off Temperature Guardbands via Adaptive Approximations.
ICCD
Behzad Boroujerdian, Hussam Amrouch, Jörg Henkel, Andreas Gerstlauer
2017 J jnl
A Reactive and Adaptive Data Flow Model for Network-of-System Specification.
IEEE Embed. Syst. Lett.
Sabine Francis, Andreas Gerstlauer
2017 — conf
Cloud-Guided QoS and Energy Management for Mobile Interactive Web Applications.
MOBILESoft@ICSE
Wooseok Lee, Dam Sunwoo, Andreas Gerstlauer, Lizy K. John
2017 — conf
Exploring Heterogeneous-ISA Core Architectures for High-Performance and Energy-Efficient Mobile SoCs.
ACM Great Lakes Symposium on VLSI
Wooseok Lee, Dam Sunwoo, Christopher D. Emmons, Andreas Gerstlauer, Lizy K. John
2017 — conf
Fine-Grain Program Snippets Generator for Mobile Core Design.
ACM Great Lakes Symposium on VLSI
Shuang Song, Raj Desikan, Mohamad Barakat, Sridhar Sundaram, Andreas Gerstlauer, Lizy K. John
2017 A conf
GATSim: Abstract timing simulation of GPUs.
DATE
Kishore Punniyamurthy, Behzad Boroujerdian, Andreas Gerstlauer
2017 J jnl
Guest Editorial: Special Issue on the 2015 International Conference on Embedded Computer Systems - Architectures, Modeling and Simulation (SAMOS XV).
Int. J. Parallel Program.
Guillermo Payá-Vayá, Andreas Gerstlauer
2017 A conf
High-level synthesis of approximate hardware under joint precision and voltage scaling.
DATE
Seogoo Lee, Lizy K. John, Andreas Gerstlauer
2017 — ch.
Host-Compiled Simulation.
Handbook of Hardware/Software Codesign
Daniel Mueller-Gritschneder, Andreas Gerstlauer
2017 — ch.
Introduction to Hardware/Software Codesign.
Handbook of Hardware/Software Codesign
Soonhoi Ha, Jürgen Teich, Christian Haubelt, Michael Glaß, Tulika Mitra, Rainer Dömer, Petru Eles, Aviral Shrivastava, Andreas Gerstlauer, Shuvra S. Bhattacharyya
2017 J jnl
LACross: Learning-Based Analytical Cross-Platform Performance and Power Prediction.
Int. J. Parallel Program.
Xinnian Zheng, Lizy K. John, Andreas Gerstlauer
2017 — conf
Network/system co-simulation for design space exploration of IoT applications.
SAMOS
Zhuoran Zhao, Vasileios Tsoutsouras, Dimitrios Soudris, Andreas Gerstlauer
2017 — conf
POWSER: A novel user-experience based power management metric.
IGSC
Maithili P. Gandhe, Lizy K. John, Andreas Gerstlauer
2017 — ch.
SCE: System-on-Chip Environment.
Handbook of Hardware/Software Codesign
Gunar Schirner, Andreas Gerstlauer, Rainer Dömer
2017 A conf
Sampling-based binary-level cross-platform performance estimation.
DATE
Xinnian Zheng, Haris Vikalo, Shuang Song, Lizy K. John, Andreas Gerstlauer
2017 J jnl
Source-Level Performance, Energy, Reliability, Power and Thermal (PERPT) Simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Zhuoran Zhao, Andreas Gerstlauer, Lizy K. John
2017 A* conf
Statistical Pattern Based Modeling of GPU Memory Access Streams.
DAC
Reena Panda, Xinnian Zheng, Jiajun Wang, Andreas Gerstlauer, Lizy K. John
2017 A* conf
Towards Aging-Induced Approximations.
DAC
Hussam Amrouch, Behnam Khaleghi, Andreas Gerstlauer, Jörg Henkel
2016 A* conf
Accurate phase-level cross-platform power and performance estimation.
DAC
Xinnian Zheng, Lizy K. John, Andreas Gerstlauer
2016 Misc conf
Adaptive resolution control in distributed cyber-physical system simulation.
WSC
Dylan Pfeifer, Andreas Gerstlauer, Jonathan Valvano
2016 — conf
Fine-grained power analysis of emerging graph processing workloads for cloud operations management.
IEEE BigData
Shuang Song, Xinnian Zheng, Andreas Gerstlauer, Lizy K. John
2016 — conf
Genesys: Automatically generating representative training sets for predictive benchmarking.
SAMOS
Reena Panda, Xinnian Zheng, Shuang Song, Jee Ho Ryoo, Michael LeBeane, Andreas Gerstlauer, Lizy K. John
2016 — ed.
International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS 2016, Agios Konstantinos, Samos Island, Greece, July 17-21, 2016
SAMOS
Walid A. Najjar, Andreas Gerstlauer
2016 — conf
Optimizing GPGPU Kernel Summation for Performance and Energy Efficiency.
ICPP Workshops
Jiajun Wang, Ahmed Khawaja, George Biros, Andreas Gerstlauer, Lizy K. John
2016 B conf
Proxy-Guided Load Balancing of Graph Processing Workloads on Heterogeneous Clusters.
ICPP
Shuang Song, Meng Li, Xinnian Zheng, Michael LeBeane, Jee Ho Ryoo, Reena Panda, Andreas Gerstlauer, Lizy K. John
2016 A* conf
Reliability-aware design to suppress aging.
DAC
Hussam Amrouch, Behnam Khaleghi, Andreas Gerstlauer, Jörg Henkel
2016 — conf
Simulator calibration for accelerator-rich architecture studies.
SAMOS
Mochamad Asri, Ardavan Pedram, Lizy K. John, Andreas Gerstlauer
2016 — conf
Statistical quality modeling of approximate hardware.
ISQED
Seogoo Lee, Dongwook Lee, Kyungtae Han, Emily Shriver, Lizy K. John, Andreas Gerstlauer
2015 Misc ed.
2015 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2015, Amsterdam, Netherlands, October 4-9, 2015
CODES+ISSS
Gabriela Nicolescu, Andreas Gerstlauer
2015 J jnl
Distributed Real-Time Implementation of Interference Alignment with Analog Feedback.
IEEE Trans. Veh. Technol.
Seogoo Lee, Andreas Gerstlauer, Robert W. Heath Jr.
2015 A conf
Dynamic power and performance back-annotation for fast and accurate functional hardware simulation.
DATE
Dongwook Lee, Lizy K. John, Andreas Gerstlauer
2015 A conf
Learning-Based Power Modeling of System-Level Black-Box IPs.
ICCAD
Dongwook Lee, TaeMin Kim, Kyungtae Han, Yatin Hoskote, Lizy K. John, Andreas Gerstlauer
2015 — conf
Learning-based analytical cross-platform performance prediction.
SAMOS
Xinnian Zheng, Pradeep Ravikumar, Lizy K. John, Andreas Gerstlauer
2015 A conf
PowerTrain: A learning-based calibration of McPAT power models.
ISLPED
Wooseok Lee, Youngchun Kim, Jee Ho Ryoo, Dam Sunwoo, Andreas Gerstlauer, Lizy K. John
2015 A conf
The next generation of virtual prototyping: ultra-fast yet accurate simulation of HW/SW systems.
DATE
Oliver Bringmann, Wolfgang Ecker, Andreas Gerstlauer, Ajay Goyal, Daniel Mueller-Gritschneder, Prasanth Sasidharan, Simranjit Singh
2014 J jnl
A Highly Efficient Multicore Floating-Point FFT Architecture Based on Hybrid Linear Algebra/FFT Cores.
J. Signal Process. Syst.
Ardavan Pedram, John D. McCalpin, Andreas Gerstlauer
2014 J jnl
Algorithm, Architecture, and Floating-Point Unit Codesign of a Matrix Factorization Accelerator.
IEEE Trans. Computers
Ardavan Pedram, Andreas Gerstlauer, Robert A. van de Geijn
2014 — conf
FastSpot: Host-compiled thermal estimation for early design space exploration.
ISQED
Darshan Gandhi, Andreas Gerstlauer, Lizy K. John
2014 J jnl
Host-Compiled Multicore System Simulation for Early Real-Time Performance Evaluation.
ACM Trans. Embed. Comput. Syst.
Parisa Razaghi, Andreas Gerstlauer
2014 A conf
Multi-level approximate logic synthesis under general error constraints.
ICCAD
Jin Miao, Andreas Gerstlauer, Michael Orshansky
2014 B conf
Performance analysis of HPC applications with irregular tree data structures.
ICPADS
Ahmed Khawaja, Jiajun Wang, Andreas Gerstlauer, Lizy K. John, Dhairya Malhotra, George Biros
2014 J jnl
Real-Time Rate-Distortion Optimized Streaming of Wireless Video.
CoRR
Ahmed Abdel-Hadi, Andreas Gerstlauer, Sriram Vishwanath
2013 A conf
Approximate logic synthesis under general error magnitude and frequency constraints.
ICCAD
Jin Miao, Andreas Gerstlauer, Michael Orshansky
2013 Misc conf
Automated, retargetable back-annotation for host compiled performance and power modeling.
CODES+ISSS
Suhas Chakravarty, Zhuoran Zhao, Andreas Gerstlauer
2013 J jnl
Circuit-Level Timing-Error Acceptance for Design of Energy-Efficient DCT/IDCT-Based Systems.
IEEE Trans. Circuits Syst. Video Technol.
Ku He, Andreas Gerstlauer, Michael Orshansky
2013 — conf
Dynamic resolution in distributed cyber-physical system simulation.
SIGSIM-PADS
Dylan Pfeifer, Andreas Gerstlauer, Jonathan Valvano
2013 — conf
Fine Grain Precision Scaling for Datapath Approximations in Digital Signal Processing Systems.
VLSI-SoC (Selected Papers)
Seogoo Lee, Andreas Gerstlauer
2013 C conf
Fine grain word length optimization for dynamic precision scaling in DSP systems.
VLSI-SoC
Seogoo Lee, Andreas Gerstlauer
2013 C conf
Floating Point Architecture Extensions for Optimized Matrix Factorization.
IEEE Symposium on Computer Arithmetic
Ardavan Pedram, Andreas Gerstlauer, Robert A. van de Geijn
2013 — conf
Hardware and Software Implementations of Prim's Algorithm for Efficient Minimum Spanning Tree Computation.
IESS
Artur Mariano, Dongwook Lee, Andreas Gerstlauer, Derek Chiou
2013 — conf
Low-energy digital filter design based on controlled timing error acceptance.
ISQED
Ku He, Andreas Gerstlauer, Michael Orshansky
2013 J jnl
SimConnect and SimTalk for distributed cyber-physical system simulation.
Simul.
Dylan Pfeifer, Jonathan Valvano, Andreas Gerstlauer
2013 — conf
Toward a fast stochastic simulation processor for biochemical reaction networks.
ASAP
Hyungman Park, Andreas Gerstlauer
2013 — conf
Transforming a linear algebra core to an FFT accelerator.
ASAP
Ardavan Pedram, John D. McCalpin, Andreas Gerstlauer
2012 — conf
A Linear Algebra Core Design for Efficient Level-3 BLAS.
ASAP
Ardavan Pedram, Syed Zohaib Gilani, Nam Sung Kim, Robert A. van de Geijn, Michael J. Schulte, Andreas Gerstlauer
2012 — conf
Abstract system-level models for early performance and power exploration.
ASP-DAC
Andreas Gerstlauer, Suhas Chakravarty, Manan Kathuria, Parisa Razaghi
2012 — conf
Automatic timing granularity adjustment for host-compiled software simulation.
ASP-DAC
Parisa Razaghi, Andreas Gerstlauer
2012 J jnl
Codesign Tradeoffs for High-Performance, Low-Power Linear Algebra Architectures.
IEEE Trans. Computers
Ardavan Pedram, Robert A. van de Geijn, Andreas Gerstlauer
2012 J jnl
Communication-aware Heterogeneous Multiprocessor Mapping for Real-time Streaming Systems.
J. Signal Process. Syst.
Jing Lin, Andreas Gerstlauer, Brian L. Evans
2012 — conf
Implementation of a real-time wireless interference alignment network.
ACSCC
Jackson W. Massey, Jonathan Starr, Seogoo Lee, Dongwook Lee, Andreas Gerstlauer, Robert W. Heath Jr.
2012 — conf
Low-energy signal processing using circuit-level timing-error acceptance.
ICICDT
Ku He, Andreas Gerstlauer, Michael Orshansky
2012 A conf
Modeling and synthesis of quality-energy optimal approximate adders.
ICCAD
Jin Miao, Ku He, Andreas Gerstlauer, Michael Orshansky
2012 C conf
On the Efficiency of Register File versus Broadcast Interconnect for Collective Communications in Data-Parallel Hardware Accelerators.
SBAC-PAD
Ardavan Pedram, Andreas Gerstlauer, Robert A. van de Geijn
2012 J jnl
Predictive OS Modeling for Host-Compiled Simulation of Periodic Real-Time Task Sets.
IEEE Embed. Syst. Lett.
Parisa Razaghi, Andreas Gerstlauer
2012 Misc conf
Synthesis of optimized hardware transactors from abstract communication specifications.
CODES+ISSS
Dongwook Lee, Hyungman Park, Andreas Gerstlauer
2011 — conf
A high-performance, low-power linear algebra core.
ASAP
Ardavan Pedram, Andreas Gerstlauer, Robert A. van de Geijn
2011 — conf
A programmable and configurable multi-port System-on-Chip for stimulating electrokinetically-driven microfluidic devices.
EMBC
Martha Salome Lopez, Andreas Gerstlauer, Alfonso Ávila, Sergio Omar Martinez-Chapa
2011 A conf
Controlled timing-error acceptance for low energy IDCT design.
DATE
Ku He, Andreas Gerstlauer, Michael Orshansky
2011 C conf
Expression-Level Parallelism for Distributed Spice Circuit Simulation.
DS-RT
Dylan Pfeifer, Andreas Gerstlauer
2011 Misc conf
Heterogeneous multiprocessor mapping for real-time streaming systems.
ICASSP
Jing Lin, Akshaya Srivatsa, Andreas Gerstlauer, Brian L. Evans
2011 A conf
Host-compiled multicore RTOS simulator for embedded real-time software development.
DATE
Parisa Razaghi, Andreas Gerstlauer
2011 — conf
Multi-core parallel simulation of System-level Description Languages.
ASP-DAC
Rainer Dömer, Weiwei Chen, Xu Han, Andreas Gerstlauer
2011 — conf
Real-Time Optimization of Video Transmission in a Network of AAVs.
VTC Fall
Ahmed Abdel-Hadi, Jonas Michel, Andreas Gerstlauer, Sriram Vishwanath
2010 — conf
A system-level synthesis approach from formal application models to generic bus-based MPSoCs.
ICSAMOS
Jens Gladigau, Andreas Gerstlauer, Christian Haubelt, Martin Streubühr, Jürgen Teich
2010 J jnl
Fast and accurate processor models for efficient MPSoC design.
ACM Trans. Design Autom. Electr. Syst.
Gunar Schirner, Andreas Gerstlauer, Rainer Dömer
2010 C conf
Host-compiled simulation of multi-core platforms.
International Symposium on Rapid System Prototyping
Andreas Gerstlauer
2010 C conf
Host-compiled simulation of multi-core platforms.
International Symposium on Rapid System Prototyping
Andreas Gerstlauer
2010 — conf
Platform modeling for exploration and synthesis.
ASP-DAC
Andreas Gerstlauer, Gunar Schirner
2010 — conf
System-level development of embedded software.
ASP-DAC
Gunar Schirner, Andreas Gerstlauer, Rainer Dömer
2009 J jnl
Electronic System-Level Synthesis Methodologies.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Andreas Gerstlauer, Christian Haubelt, Andy D. Pimentel, Todor P. Stefanov, Daniel D. Gajski, Jürgen Teich
2009 — conf
Introduction to hardware-dependent software design hardware-dependent software for multi- and many-core embedded systems.
ASP-DAC
Rainer Dömer, Andreas Gerstlauer, Wolfgang Müller
2009 — conf
Modeling Cache Effects at the Transaction Level.
IESS
Ardavan Pedram, David Craven, Andreas Gerstlauer
2009 — conf
Transaction Level Modeling of Best-Effort Channels for Networked Embedded Devices.
IESS
Amal Banerjee, Andreas Gerstlauer
2008 J jnl
An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors.
IEEE Trans. Very Large Scale Integr. Syst.
Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel Gajski
2008 — conf
Automatic generation of hardware dependent software for MPSoCs from abstract system specifications.
ASP-DAC
Gunar Schirner, Andreas Gerstlauer, Rainer Dömer
2008 A* conf
Specify-explore-refine (SER): from specification to implementation.
DAC
Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Daniel Gajski, Atsushi Nakamura, Dai Araki, Yuuji Nishihara
2008 J jnl
System-on-Chip Environment: A SpecC-Based Framework for Heterogeneous MPSoC Design.
EURASIP J. Embed. Syst.
Rainer Dömer, Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Lukai Cai, Haobo Yu, Samar Abdi, Daniel D. Gajski
2007 — conf
Abstract, Multifaceted Modeling of Embedded Processors for System Level Design.
ASP-DAC
Gunar Schirner, Andreas Gerstlauer, Rainer Dömer
2007 — conf
An Interactive Design Environment for C-based High-Level Synthesis.
IESS
Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski
2007 J jnl
Automatic Layer-Based Generation of System-On-Chip Bus Communication Models.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Andreas Gerstlauer, Dongwan Shin, Junyu Peng, Rainer Dömer, Daniel Gajski
2007 — conf
Embedded Software Development in a System-Level Design Flow.
IESS
Gunar Schirner, Gautam Sachdeva, Andreas Gerstlauer, Rainer Dömer
2007 — ed.
Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30 - June 1, 2007, Irvine, CA, USA
IESS
Achim Rettberg, Mauro Cesar Zanella, Rainer Dömer, Andreas Gerstlauer, Franz-Josef Rammig
2006 Misc conf
Automatic generation of transaction level models for rapid design space exploration.
CODES+ISSS
Dongwan Shin, Andreas Gerstlauer, Junyu Peng, Rainer Dömer, Daniel D. Gajski
2005 — conf
Automatic Generation of Communication Architectures.
IESS
Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski
2005 Misc conf
Automatic network generation for system-on-chip communication design.
CODES+ISSS
Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski
2005 — conf
Multi-metric and multi-entity characterization of applications for early system design exploration.
ASP-DAC
Lukai Cai, Andreas Gerstlauer, Daniel Gajski
2005 — conf
System-level communication modeling for network-on-chip synthesis.
ASP-DAC
Andreas Gerstlauer, Dongwan Shin, Rainer Dömer, Daniel D. Gajski
2004 A* conf
Retargetable profiling for rapid, early system-level design space exploration.
DAC
Lukai Cai, Andreas Gerstlauer, Daniel Gajski
2003 — ch.
RTOS Modeling for System Level Design.
Embedded Software for SoC
Andreas Gerstlauer, Haobo Yu, Daniel D. Gajski
2003 A conf
RTOS Modeling for System Level Design.
DATE
Andreas Gerstlauer, Haobo Yu, Daniel Gajski
2003 Misc conf
RTOS scheduling in transaction level models.
CODES+ISSS
Haobo Yu, Andreas Gerstlauer, Daniel Gajski
2002 — conf
Co-design of embedded controllers for power electronics and electric systems.
ISIC
Slim Ben Saoud, Daniel D. Gajski, Andreas Gerstlauer
2002 B conf
Seamless approach for the design of control systems for power electronics and electric drives.
SMC
Slim Ben Saoud, Daniel D. Gajski, Andreas Gerstlauer
2002 — conf
System-Level Abstraction Semantics.
ISSS
Daniel Gajski, Andreas Gerstlauer
2002 — conf
The Formal Execution Semantics of SpecC.
ISSS
Rainer Dömer, Andreas Gerstlauer, Wolfgang Müller
2001 — book
System Design - A Practical Guide with SpecC.
Andreas Gerstlauer, Rainer Dömer, Junyu Peng, Daniel D. Gajski
2000 — conf
The Specification Language SpecC within the PARADISE Design Environment.
DIPES
Achim Rettberg, Franz J. Rammig, Andreas Gerstlauer, Daniel Gajski, Wolfram Hardt, Bernd Kleinjohann