Andreas Emeretlis

11 papers C 1Journal 2Unranked 8
YearRankTypeTitle / Venue / Authors
2022 C conf
A Multi-stage Hybrid Approach for Mapping Applications on Heterogeneous Multi-core Platforms.
VLSI-SoC
Andreas Emeretlis, George Theodoridis, Panayiotis Alefragis, Nikos S. Voros
2018 J jnl
Static Mapping of Applications on Heterogeneous Multi-Core Platforms Combining Logic-Based Benders Decomposition with Integer Linear Programming.
ACM Trans. Design Autom. Electr. Syst.
Andreas Emeretlis, George Theodoridis, Panayiotis Alefragis, Nikos S. Voros
2017 — conf
Task graph mapping and scheduling on heterogeneous architectures under communication constraints.
SAMOS
Andreas Emeretlis, T. Tsakoulis, George Theodoridis, Panayiotis Alefragis, Nikos S. Voros
2016 J jnl
A Logic-Based Benders Decomposition Approach for Mapping Applications on Heterogeneous Multicore Platforms.
ACM Trans. Embed. Comput. Syst.
Andreas Emeretlis, George Theodoridis, Panayiotis Alefragis, Nikolaos S. Voros
2016 — conf
A hybrid approach for mapping and scheduling on heterogeneous multicore systems.
SAMOS
Andreas Emeretlis, George Theodoridis, Panayiotis Alefragis, Nikolaos S. Voros
2015 — conf
40 Gb/s FPGA implementation of a reduced complexity volterra DFE for DQPSK optical links.
ICTON
Maki Nanou, Andreas Emeretlis, Christina Tanya Politi, George Theodoridis, Kristina Georgoulakis, George-Othon Glentis
2015 — conf
FPGA implementation of a MIMO DFE IN 40 GB/S DQPSK optical links.
EUSIPCO
Andreas Emeretlis, V. Kefelouras, George Theodoridis, Maki Nanou, Christina Tanya Politi, Kristina Georgoulakis, George-Othon Glentis
2015 — conf
Mapping DAGs on Heterogeneous Platforms Using Logic-Based Benders Decompostion.
ISVLSI
Andreas Emeretlis, George Theodoridis, Panayiotis Alefragis, Nikos S. Voros
2014 — conf
A Hybrid ILP-CP Model for Mapping Directed Acyclic Task Graphs to Multicore Architectures.
IPDPS Workshops
Andreas Emeretlis, George Theodoridis, Panayiotis Alefragis, Nikolaos S. Voros
2014 — conf
FPGA Implementations for Volterra DFEs.
Panhellenic Conference on Informatics
Andreas Emeretlis, George Theodoridis
2014 — conf
High-performance FPGA implementations of volterra DFEs for optical fiber systems.
ReConFig
Andreas Emeretlis, George Theodoridis, George-Othon Glentis