Andreas Ehliar

12 papers B 3C 2Misc 1Journal 1Unranked 4
YearRankTypeTitle / Venue / Authors
2014 — conf
Area efficient floating-point adder and multiplier with IEEE-754 compatible semantics.
FPT
Andreas Ehliar
2014 — conf
Challenging the limits of FFT performance on FPGAs (Invited paper).
ISIC
Mario Garrido, Miguel Acevedo, Andreas Ehliar, Oscar Gustafsson
2013 C conf
Low-complexity general FIR filters based on Winograd's inner product algorithm.
ISCAS
Oscar Gustafsson, Andreas Ehliar
2012 Misc conf
EBRAM - Extending the BlockRAMs in FPGAs to Support Caches and Hash Tables in an Efficient Manner.
FCCM
Andreas Ehliar
2009 B conf
An ASIC perspective on FPGA optimizations.
FPL
Andreas Ehliar, Dake Liu
2009 — —
Performance driven FPGA design with an ASIC perspective.
Andreas Ehliar
2008 B conf
A high performance microprocessor with DSP extensions optimized for the Virtex-4 FPGA.
FPL
Andreas Ehliar, Per Karlström, Dake Liu
2008 J jnl
High-performance, low-latency field-programmable gate array-based floating-point adder and multiplier units in a Virtex 4.
IET Comput. Digit. Tech.
Per Karlström, Andreas Ehliar, Dake Liu
2007 B conf
An fpga based open source network-on-chip architecture.
FPL
Andreas Ehliar, Dake Liu
2005 — conf
Flexible route lookup using range search.
Communications and Computer Networks
Andreas Ehliar, Dake Liu
2004 — conf
Reduced floating point for MPEG1/2 layer III decoding.
ICASSP (5)
Mikael Olausson, Andreas Ehliar, Johan Eilert, Dake Liu
2004 C conf
Using low precision floating point numbers to reduce memory cost for MP3 decoding.
MMSP
Johan Eilert, Andreas Ehliar, Dake Liu