Andrea Neviani

78 papers A 1B 2C 11Journal 25Unranked 39
YearRankTypeTitle / Venue / Authors
2025 — conf
A DLL-Based FSK Demodulator for Asynchronous Communications.
PRIME
Lucrezia Navarin, Andrea Neviani, Andrea Bevilacqua
2025 — conf
A Driving Methodology for Four-Quadrant Power Switches Using CMOS Transistor Stacking.
NewCAS
Luca Bellemo, Andrea Neviani, Andrea Bevilacqua
2025 J jnl
A Fully Integrated Galvanic Isolator for Gate Drivers With Asynchronous 100/167 Mb/s ASK/FSK Full-Duplex Communication.
IEEE Solid State Circuits Lett.
Lucrezia Navarin, Karl Norling, Marco Parenzan, Stefano Ruzzu, Andrea Neviani, Andrea Bevilacqua
2025 — conf
Analysis of Hybrid Dual-Path Step-Down Topology for High-Frequency, Integrated Dc-Dc Converters.
ICICDT
Domenico Frassetto, Stefano Cabizza, Matteo Agostinelli, Cristian Garbossa, Giorgio Spiazzi, Andrea Bevilacqua, Andrea Neviani
2024 J jnl
A Stacking Technique for High-Swing Low-Phase Noise Class-C Oscillators Using Core Devices in Ultrascaled CMOS Technologies.
IEEE Trans. Circuits Syst. II Express Briefs
Lorenzo Tomasin, Agata Iesurum, Andrea Gobbo, Andrea Neviani, Andrea Bevilacqua
2022 — conf
Analysis and Design of a Fully-Integrated Pulsed LiDAR Driver in 100V-GaN IC Technology.
PRIME
Andrea Bettini, Thibault Cosnier, Alessandro Magnani, Olga Syshchyk, Matteo Borga, Stefaan Decoutere, Andrea Neviani
2019 — conf
A 130-nm CMOS Dual Input-Polarity DC-DC Converter for Low-Power Applications.
ESSCIRC
Alberto Gatti, Giorgio Spiazzi, Andrea Gerosa, Andrea Neviani, Andrea Bevilacqua
2018 J jnl
Class-J SiGe X-Band Power Amplifier Using a Ladder Filter-Based AM-PM Distortion Reduction Technique.
IEEE Trans. Circuits Syst. I Regul. Pap.
Paolo Scaramuzza, Carlo Rubino, Michele Caruso, Marc Tiebout, Andrea Bevilacqua, Andrea Neviani
2017 — conf
13.9 A 1.1V 28.6dBm fully integrated digital power amplifier for mobile and wireless applications in 28nm CMOS technology with 35% PAE.
ISSCC
Antonio Passamani, Davide Ponton, Edwin Thaller, Gerhard Knoblinger, Andrea Neviani, Andrea Bevilacqua
2017 — conf
A 21GHz 20.5%-tuning range Colpitts VCO with -119 dBc/Hz phase noise at 1MHz offset.
ESSCIRC
Fabio Boscolo, Fabio Padovan, Fabio Quadrelli, Marc Tiebout, Andrea Neviani, Andrea Bevilacqua
2017 — conf
Class-AB and class-J 22 dBm SiGe HBT PAs for X-band radar systems.
ESSCIRC
Paolo Scaramuzza, Carlo Rubino, Marc Tiebout, Michele Caruso, Markus Ortner, Andrea Neviani, Andrea Bevilacqua
2016 J jnl
A 12 GHz 22 dB-Gain-Control SiGe Bipolar VGA With 2° Phase-Shift Variation.
IEEE J. Solid State Circuits
Fabio Padovan, Marc Tiebout, Andrea Neviani, Andrea Bevilacqua
2016 — conf
A 15.5-39GHz BiCMOS VGA with phase shift compensation for 5G mobile communication transceivers.
ESSCIRC
Fabio Padovan, Marc Tiebout, Andrea Neviani, Andrea Bevilacqua
2016 J jnl
A 64-Channel 965-µW Neural Recording SoC With UWB Wireless Transmission in 130-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs
Stefano Brenna, Fabio Padovan, Andrea Neviani, Andrea Bevilacqua, Andrea Bonfanti, Andrea L. Lacaita
2015 — conf
A 12GHz 22dB-gain-control SiGe bipolar VGA with 2° phase shift variation.
ESSCIRC
Fabio Padovan, Marc Tiebout, Andrea Neviani, Andrea Bevilacqua
2015 J jnl
A 2-16 GHz 65 nm CMOS Stepped-Frequency Radar Transmitter With Harmonic Rejection for High-Resolution Medical Imaging Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Michele Caruso, Matteo Bassi, Andrea Bevilacqua, Andrea Neviani
2015 J jnl
Design of Low-Noise K-Band SiGe Bipolar VCOs: Theory and Implementation.
IEEE Trans. Circuits Syst. I Regul. Pap.
Fabio Padovan, Marc Tiebout, Koen L. R. Mertens, Andrea Bevilacqua, Andrea Neviani
2014 — conf
A 20Mb/s, 2.76 pJ/b UWB impulse radio TX with 11.7% efficiency in 130 nm CMOS.
ESSCIRC
Fabio Padovan, Andrea Bevilacqua, Andrea Neviani
2014 — conf
Energy-efficient ultra-wideband impulse radios for short-range low-data rate communications.
ICECS
Andrea Bevilacqua, Andrea Neviani
2013 — conf
A 2-to-16GHz 204mW 3mm-resolution stepped-frequency radar for breast-cancer diagnostic imaging in 65nm CMOS.
ISSCC
Michele Caruso, Matteo Bassi, Andrea Bevilacqua, Andrea Neviani
2013 J jnl
A 65-nm CMOS 1.75-15 GHz Stepped Frequency Radar Receiver for Early Diagnosis of Breast Cancer.
IEEE J. Solid State Circuits
Matteo Bassi, Michele Caruso, Andrea Bevilacqua, Andrea Neviani
2013 — conf
Wideband 2-16GHz local oscillator generation for short-range radar applications.
ESSCIRC
Michele Caruso, Matteo Bassi, Andrea Bevilacqua, Andrea Neviani
2012 — conf
A 1.75-15 GHz stepped frequency receiver for breast cancer imaging in 65 nm CMOS.
ESSCIRC
Matteo Bassi, Michele Caruso, Andrea Bevilacqua, Andrea Neviani
2012 — conf
A SiGe bipolar VCO for backhaul E-band communication systems.
ESSCIRC
Fabio Padovan, Marc Tiebout, Koen L. R. Mertens, Andrea Bevilacqua, Andrea Neviani
2012 J jnl
Integrated SFCW Transceivers for UWB Breast Cancer Imaging: Architectures and Circuit Constraints.
IEEE Trans. Circuits Syst. I Regul. Pap.
Matteo Bassi, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani
2012 — conf
Low-power ultra-Wide-Band Impulse Radio transceivers for short range communications.
ICICDT
Andrea Neviani, Andrea Bevilacqua, Andrea Gerosa, Daniele Vogrig
2011 J jnl
A 5 Mb/s UWB-IR Transceiver Front-End for Wireless Sensor Networks in 0.13 μm CMOS.
IEEE J. Solid State Circuits
Silvia Soldà, Michele Caruso, Andrea Bevilacqua, Andrea Gerosa, Daniele Vogrig, Andrea Neviani
2011 C conf
Integrated transceivers for UWB breast cancer imaging: Architecture and circuit constraints.
ISCAS
Matteo Bassi, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani
2010 J jnl
A 0.06 mm
IEEE J. Solid State Circuits
Stefano Dal Toso, Andrea Bevilacqua, Marc Tiebout, Nicola Da Dalt, Andrea Gerosa, Andrea Neviani
2010 — conf
A 4.1 to 5.1 GHz 430 μA injection-locked frequency divider by 7 in 65 nm CMOS.
ESSCIRC
Andrea Bevilacqua, Leonardo Lorenzon, Nicola Da Dalt, Andrea Gerosa, Andrea Neviani
2010 — conf
A 5Mb/s UWB-IR CMOS transceiver with a 186 pJ/b and 150 pJ/b TX/RX energy request.
ESSCIRC
Silvia Soldà, Michele Caruso, Andrea Bevilacqua, Andrea Gerosa, Daniele Vogrig, Andrea Neviani
2010 C conf
A digitally programmable ring oscillator in the UWB range.
ISCAS
Andrea Gerosa, Silvia Soldà, Andrea Bevilacqua, Daniele Vogrig, Andrea Neviani
2010 C conf
A thorough analysis of the tank quality factor in LC oscillators with switched capacitor banks.
ISCAS
Stefano Dal Toso, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani
2010 C conf
Accurate time-variant analysis of a current-reuse 2.2 GHz 1.3 mW CMOS front-end.
ISCAS
Matteo Camponeschi, Andrea Bevilacqua, Andrea Neviani, Pietro Andreani
2010 C conf
Low-power UWB transmitter using a combined mixer and power amplifier.
ISCAS
Silvia Soldà, Michele Caruso, Daniele Vogrig, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani
2009 — conf
A 0.059-mm2 10.8-mW local oscillator for GSM systems in 65-nm CMOS.
ESSCIRC
Stefano Dal Toso, Andrea Bevilacqua, Marc Tiebout, Nicola Da Dalt, Andrea Gerosa, Andrea Neviani
2009 J jnl
An Energy-Detector for Noncoherent Impulse-Radio UWB Receivers.
IEEE Trans. Circuits Syst. I Regul. Pap.
Andrea Gerosa, Silvia Soldà, Andrea Bevilacqua, Daniele Vogrig, Andrea Neviani
2009 J jnl
Analysis and Design of an Integrated Notch Filter for the Rejection of Interference in UWB Systems.
IEEE J. Solid State Circuits
Alessio Vallese, Andrea Bevilacqua, Christoph Sandner, Marc Tiebout, Andrea Gerosa, Andrea Neviani
2008 C conf
An energy-detector for non-coherent impulse-radio UWB receivers.
ISCAS
Andrea Gerosa, Maurizio Dalla Costa, Andrea Bevilacqua, Daniele Vogrig, Andrea Neviani
2008 C conf
Analog decoding of trellis coded modulation for multi-level flash memories.
ISCAS
Silvia Soldà, Daniele Vogrig, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani
2008 C conf
Design of broadband inductorless LNAs in ultra-scaled CMOS technologies.
ISCAS
Andrea Bevilacqua, Matteo Camponeschi, Marc Tiebout, Andrea Gerosa, Andrea Neviani
2008 — conf
UWB Fast-Hopping Frequency Generation Based on Sub-Harmonic Injection Locking.
ISSCC
Stefano Dal Toso, Andrea Bevilacqua, Marc Tiebout, Stefano Marsili, Christoph Sandner, Andrea Gerosa, Andrea Neviani
2008 J jnl
UWB Fast-Hopping Frequency Generation Based on Sub-Harmonic Injection Locking.
IEEE J. Solid State Circuits
Stefano Dal Toso, Andrea Bevilacqua, Marc Tiebout, Stefano Marsili, Christoph Sandner, Andrea Gerosa, Andrea Neviani
2007 — conf
A 0.13μm CMOS LNA with Integrated Balun and Notch Filter for 3-to-5GHz UWB Receivers.
ISSCC
Andrea Bevilacqua, Alessio Vallese, Christoph Sandner, Marc Tiebout, Andrea Gerosa, Andrea Neviani
2007 C conf
A 0.18-µm CMOS Squarer Circuit for a Non-Coherent UWB Receiver.
ISCAS
Andrea Gerosa, M. Soldan, Alessandro Bevilacqua, Andrea Neviani
2007 J jnl
An Integrated Solution for Suppressing WLAN Signals in UWB Receivers.
IEEE Trans. Circuits Syst. I Regul. Pap.
Andrea Bevilacqua, Andrea Maniero, Andrea Gerosa, Andrea Neviani
2007 — conf
An analog front-end with integrated notch filter for 3-5 GHz UWB receivers in 0.13 μm CMOS.
ESSCIRC
Alessio Vallese, Andrea Bevilacqua, Christoph Sandner, Marc Tiebout, Andrea Gerosa, Andrea Neviani
2007 C conf
Quadrature VCOs Based on Coupled PLLs.
ISCAS
Andrea Bevilacqua, Christoph Sandner, Andrea Gerosa, Andrea Neviani
2007 J jnl
Transformer-Based Dual-Mode Voltage-Controlled Oscillators.
IEEE Trans. Circuits Syst. II Express Briefs
Andrea Bevilacqua, Federico P. Pavan, Christoph Sandner, Andrea Gerosa, Andrea Neviani
2006 — conf
A 0.35 μm SiGe Low-Noise Amplifier for UWB, Receivers with Integrated Interferer Rejection.
ICECS
Andrea Bevilacqua, Andrea Maniero, Andrea Gerosa, Andrea Neviani
2006 — conf
A low-voltage III-order log-domain filter in standard CMOS technology with tunable frequency.
ICECS
Andrea Maniero, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani
2006 J jnl
An A/D Converter for Multimode Wireless Receivers, Based on the Cascade of a Double-Sampling Sigma Delta Modulator and a Flash Converter.
IEEE Trans. Circuits Syst. I Regul. Pap.
Andrea Gerosa, Andrea Xotta, Andrea Bevilacqua, Andrea Neviani
2006 C conf
An optimal architecture for a multimode ADC, based on the cascade of a Sigma Delta modulator and a flash converter.
ISCAS
Andrea Gerosa, Andrea Bevilacqua, Andrea Neviani, Andrea Xotta
2006 J jnl
Design, Simulation, and Testing of a CMOS Analog Decoder for the Block Length-40 UMTS Turbo Code.
IEEE Trans. Commun.
Alexandre Graell i Amat, Sergio Benedetto, Guido Montorsi, Daniele Vogrig, Andrea Neviani, Andrea Gerosa
2006 J jnl
Design, Simulation, and Testing of a CMOS Analog Decoder for the Block Length-40 UMTS Turbo Code.
IEEE Trans. Commun.
Alexandre Graell i Amat, Sergio Benedetto, Guido Montorsi, Daniele Vogrig, Andrea Neviani, Andrea Gerosa
2006 B conf
Reconfigurable Analog Decoder for a Serially Concatenated Convolutional Code.
GLOBECOM
Alexandre Graell i Amat, Daniele Vogrig, Sergio Benedetto, Guido Montorsi, Andrea Neviani, Andrea Gerosa
2005 J jnl
A 0.35-μm CMOS analog turbo decoder for the 40-bit rate 1/3 UMTS channel code.
IEEE J. Solid State Circuits
Daniele Vogrig, Andrea Gerosa, Andrea Neviani, Alexandre Graell i Amat, Guido Montorsi, Sergio Benedetto
2005 J jnl
A 1.8-μW sigma-delta modulator for 8-bit digitization of cardiac signals in implantable pacemakers operating down to 1.8 V.
IEEE Trans. Circuits Syst. II Express Briefs
Andrea Gerosa, Andrea Neviani
2005 — conf
A multi-mode Sigma-Delta analog-to-digital converter for GSM, UMTS and WLAN.
ISCAS (3)
Andrea Xotta, Andrea Gerosa, Andrea Neviani
2005 — conf
An analog turbo decoder for the rate-1/3, 40 bit, UMTS turbo code.
ICC
Alexandre Graell i Amat, Sergio Benedetto, Guido Montorsi, Daniele Vogrig, Andrea Neviani, Andrea Gerosa
2004 J jnl
A fully integrated dual-channel log-domain programmable preamplifier and filter for an implantable cardiac pacemaker.
IEEE Trans. Circuits Syst. I Regul. Pap.
Andrea Gerosa, Andrea Maniero, Andrea Neviani
2004 J jnl
A fully integrated two-channel A/D interface for the acquisition of cardiac signals in implantable pacemakers.
IEEE J. Solid State Circuits
Andrea Gerosa, Andrea Maniero, Andrea Neviani
2004 — conf
A low-power decimation filter for a sigma-delta converter based on a power-optimized sinc filter.
ISCAS (2)
Andrea Gerosa, Andrea Neviani
2004 B conf
An analog turbo decoder for the UMTS standard.
ISIT
Alexandre Graell i Amat, Guido Montorsi, Sergio Benedetto, Daniele Vogrig, Andrea Neviani, Andrea Gerosa
2003 J jnl
A 1-μA front end for pacemaker atrial sensing channels with early sensing capability.
IEEE Trans. Circuits Syst. II Express Briefs
L. Lentola, A. Mozzi, Andrea Neviani, Andrea Baschirotto
2003 — conf
A fully-integrated two-channel A/D interface for the acquisition of cardiac signals in implantable pacemakers.
ESSCIRC
Andrea Gerosa, Andrea Maniero, Andrea Neviani
2003 — conf
A very low-power 8-bit Sigma-Delta converter in a 0.8µm CMOS technology for the sensing chain of a cardiac pacemaker, operating down to 1.8 V.
ISCAS (5)
Andrea Gerosa, Andrea Neviani
2003 — conf
Analog CMOS implementation of Gallager's iterative decoding algorithm applied to a block turbo code.
ISCAS (5)
Matteo Perenzoni, Andrea Gerosa, Andrea Neviani
2003 — conf
Performance optimization in micro-power, low-voltage log-domain filters in pure CMOS technology.
ISCAS (1)
Andrea Maniero, Andrea Gerosa, Andrea Neviani
2002 — conf
An all-analog CMOS implementation of a turbo decoder for hard-disk drive read channels.
ISCAS (5)
Andrea Xotta, Daniele Vogrig, Andrea Gerosa, Andrea Neviani, Alexandre Graell i Amat, Guido Montorsi, Melchiorre Bruccoleri, Giorgio Betti
2002 — conf
An analog decoder for concatenated magnetic recording schemes.
ICC
Alexandre Graell i Amat, Guido Montorsi, Andrea Neviani, Andrea Xotta
2001 — conf
A micro-power low noise log-domain amplifier for the sensing chain of a cardiac pacemaker.
ISCAS (1)
Andrea Gerosa, Arianna Novo, Andrea Mengalli, Andrea Neviani
2001 — conf
A novel architecture to reduce complexity in hard disk read channel based on fractionally spaced equalization.
ICECS
Andrea Gerosa, Andrea Neviani, Andrea Xotta, Gian Antonio Mian
2001 — conf
Modeling of Substrate Noise Injected by Digital Libraries.
ISQED
Stefano Zanella, Andrea Neviani, Enrico Zanoni, Paolo Miliozzi, Edoardo Charbon, Carlo Guardiani, Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
2000 A conf
Low-power sensing and digitization of cardiac signals based on sigma-delta conversion (poster session).
ISLPED
Andrea Gerosa, Arianna Novo, Andrea Neviani
2000 — conf
Realistic Worst-Case Modeling by Performance Level Principal Component Analysis.
ISQED
Alessandra Nardi, Andrea Neviani, Carlo Guardiani
1996 — conf
A new structure for video-rate 2D SC FIR filters.
EUSIPCO
G. M. Cortdazzo, E. Malavasi, Andrea Gerosa, Andrea Neviani, A. Basckirotto
1990 J jnl
Physical models for heterostructure FET simulation.
Eur. Trans. Telecommun.
Paolo Lugli, Andrea Neviani, Marco Saraniti