Andrea Mondelli

14 papers A* 1C 2Journal 8Unranked 2
YearRankTypeTitle / Venue / Authors
2025 J jnl
An Architecture-Level CPU Modeling Framework for Power and Other Design Qualities.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Qijun Zhang, Mengming Li, Andrea Mondelli, Zhiyao Xie
2024 C conf
DeVAS: Decoupled Virtual Address Spaces.
SBAC-PAD
Mirco Mannino, Biagio Peccerillo, Andrea Mondelli, Sandro Bartolini
2023 J jnl
Analysis and Optimization of Direct Convolution Execution on Multi-Core Processors.
IEEE Access
Mirco Mannino, Biagio Peccerillo, Andrea Mondelli, Sandro Bartolini
2023 — conf
Energy and Performance Improvements for Convolutional Accelerators Using Lightweight Address Translation Support.
CF
Mirco Mannino, Biagio Peccerillo, Andrea Mondelli, Sandro Bartolini
2023 J jnl
IXIAM: ISA EXtension for Integrated Accelerator Management.
IEEE Access
Biagio Peccerillo, Elham Cheshmikhani, Mirco Mannino, Andrea Mondelli, Sandro Bartolini
2022 J jnl
A General Framework for Accelerator Management Based on ISA Extension.
IEEE Access
Elham Cheshmikhani, Biagio Peccerillo, Andrea Mondelli, Sandro Bartolini
2022 J jnl
A survey on hardware accelerators: Taxonomy, trends, challenges, and perspectives.
J. Syst. Archit.
Biagio Peccerillo, Mirco Mannino, Andrea Mondelli, Sandro Bartolini
2021 A* conf
SeMPE: Secure Multi Path Execution Architecture for Removing Conditional Branch Side Channels.
DAC
Andrea Mondelli, Paul Gazzillo, Yan Solihin
2020 J jnl
SeMPE: Secure Multi Path Execution Architecture for Removing Conditional Branch Side Channels.
CoRR
Andrea Mondelli, Paul Gazzillo, Yan Solihin
2020 J jnl
The gem5 Simulator: Version 20.0+.
CoRR
Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian, Rico Amslinger, Matteo Andreozzi, Adrià Armejach, Nils Asmussen, Srikant Bharadwaj, Gabe Black, Gedare Bloom, Bobby R. Bruce, Daniel Rodrigues Carvalho, Jerónimo Castrillón, Lizhong Chen, Nicolas Derumigny, Stephan Diestelhorst, Wendy Elsasser, Marjan Fariborz, Amin Farmahini Farahani, Pouya Fotouhi, Ryan Gambord, Jayneel Gandhi, Dibakar Gope, Thomas Grass, Bagus Hanindhito, Andreas Hansson, Swapnil Haria, Austin Harris, Timothy Hayes, Adrian Herrera, Matthew Horsnell, Syed Ali Raza Jafri, Radhika Jagtap, Hanhwi Jang, Reiley Jeyapaul, Timothy M. Jones, Matthias Jung, Subash Kannoth, Hamidreza Khaleghzadeh, Yuetsu Kodama, Tushar Krishna, Tommaso Marinelli, Christian Menard, Andrea Mondelli, Tiago Mück, Omar Naji, Krishnendra Nathella, Hoa Nguyen, Nikos Nikoleris, Lena E. Olson, Marc S. Orr, Binh Pham, Pablo Prieto, Trivikram Reddy, Alec Roelke, Mahyar Samani, Andreas Sandberg, Javier Setoain, Boris Shingarov, Matthew D. Sinclair, Tuan Ta, Rahul Thakur, Giacomo Travaglini, Michael Upton, Nilay Vaish, Ilias Vougioukas, Zhengrong Wang, Norbert Wehn, Christian Weis, David A. Wood, Hongil Yoon, Éder F. Zulian
2017 — —
Revisiting Wide Superscalar Microarchitecture.
Andrea Mondelli
2015 C conf
Dataflow Support in x86_64 Multicore Architectures through Small Hardware Extensions.
DSD
Andrea Mondelli, Nam Ho, Alberto Scionti, Marco Solinas, Antoni Portero, Roberto Giorgi
2015 — conf
Enhancing an x86_64 multi-core architecture with data-flow execution support.
Conf. Computing Frontiers
Nam Ho, Andrea Mondelli, Alberto Scionti, Marco Solinas, Antoni Portero, Roberto Giorgi
2015 J jnl
Revisiting Clustered Microarchitecture for Future Superscalar Cores: A Case for Wide Issue Clusters.
ACM Trans. Archit. Code Optim.
Pierre Michaud, Andrea Mondelli, André Seznec