Andrea Mineo

21 papers A 3C 1Journal 7Unranked 10
YearRankTypeTitle / Venue / Authors
2022 J jnl
DNN Model Compression for IoT Domain-Specific Hardware Accelerators.
IEEE Internet Things J.
Enrico Russo, Maurizio Palesi, Salvatore Monteleone, Davide Patti, Andrea Mineo, Giuseppe Ascia, Vincenzo Catania
2020 — conf
Cloud-Based Energy Efficient Scheme for Sigfox Monarch as Asset Tracking Service.
COINS
Andrea Mineo, Maurizio Palesi, Davide Patti, Vincenzo Catania
2020 — conf
Improving Inference Latency and Energy of DNNs through Wireless Enabled Multi-Chip-Module-based Architectures and Model Parameters Compression.
NOCS
Giuseppe Ascia, Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti
2018 J jnl
Improving Energy Efficiency in Wireless Network-on-Chip Architectures.
ACM J. Emerg. Technol. Comput. Syst.
Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti
2016 J jnl
Cycle-Accurate Network on Chip Simulation with Noxim.
ACM Trans. Model. Comput. Simul.
Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti
2016 A conf
Energy efficient transceiver in wireless Network on Chip architectures.
DATE
Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti
2016 J jnl
Exploiting antenna directivity in wireless NoC architectures.
Microprocess. Microsystems
Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania
2016 — conf
Improving the energy efficiency of wireless Network on Chip architectures through online selective buffers and receivers shutdown.
CCNC
Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti
2016 J jnl
On-Chip Communication Energy Reduction Through Reliability Aware Adaptive Voltage Swing Scaling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Partha Pratim Pande, Vincenzo Catania
2016 J jnl
Runtime Tunable Transmitting Power Technique in mm-Wave WiNoC Architectures.
IEEE Trans. Very Large Scale Integr. Syst.
Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania
2015 A conf
A closed loop transmitting power self-calibration scheme for energy efficient WiNoC architectures.
DATE
Andrea Mineo, Mohd Shahrizal Rusli, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania, Muhammad N. Marsono
2015 — conf
Noxim: An open, extensible and cycle-accurate network on chip simulator.
ASAP
Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti
2014 — conf
A Closed Loop Control based Power Manager for WiNoC Architectures.
MES
Mohd Shahrizal Rusli, Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania, Muhammad N. Marsono
2014 — conf
A Low-resource and Scalable Strategy for Segment Partitioning of Many-core Nano Networks.
MES
Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Davide Patti
2014 A conf
An adaptive transmitting power technique for energy efficient mm-wave wireless NoCs.
DATE
Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania
2014 J jnl
Distributed topology discovery in self-assembled nano network-on-chip.
Comput. Electr. Eng.
Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Davide Patti
2014 — conf
Topology Discovery in Deadlock Free Self-assembled DNA Networks.
CSOC
Davide Patti, Andrea Mineo, Salvatore Monteleone, Vincenzo Catania
2013 — conf
A first effort for a distributed segment-based approach on self-assembled nano networks.
NoCArc@MICRO
Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Davide Patti
2013 — conf
Low Energy Mapping Techniques under Reliability and Bandwidth Constraints.
HPCC/EUC
Andrea Mineo, Marina Masi, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania
2013 — conf
NoC links energy reduction through link voltage scaling.
ICSAMOS
Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania
2013 C conf
Runtime Online Links Voltage Scaling for Low Energy Networks on Chip.
DSD
Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania