Andleeb Zahra - RankMe

15 papers A 2C 3Journal 4Unranked 6

Year	Rank	Type	Title / Venue / Authors
2025	C	`conf`	C-Arch: Chained Architecture towards Foundation Modeling of CMOS/FinFET Circuit Designs. ISCAS Ritwik Basyas Goswami, Mohammad Rehan Akhtar, Andleeb Zahra, Zia Abbas
2024	J	`jnl`	A 275 pW, 0.5 V supply insensitive gate-leakage based current/voltage reference circuit for a wide temperature range of -55 to 100 °C without using amplifiers and resistors. Microelectron. J. Bhartipudi Sahishnavi, Arnab Dey, Anubhab Banerjee, Andleeb Zahra, Zia Abbas
2024	C	`conf`	An inductor-less, cost-effective On-chip CMOS VNA for bio-molecule detection. ISCAS Bhartipudi Sahishnavi, Samriddhi Agarwal, Shameer Basha Yerragudi, Naveen Dasari, Andleeb Zahra, Prabhakar Bhimalapuram, Syed Azeemuddin, Zia Abbas
2023	—	`conf`	A High PSRR CMOS Voltage and Current Reference in One Circuit Without Amplifier for Low Power Applications. ICM Ashutosh Pathy, Andleeb Zahra, Amir Ahmad, Zia Abbas
2023	A	`conf`	A Label-Free Low-Cost Radio Frequency Driven Noninvasive Lab-on-Chip System for Creatinine Detection. ICST Swarnim Sinha, Andleeb Zahra, Imran Siddiqui, Pawan Kumar, Alimpan Modak, Prabhakar Bhimalapuram, Tapan K. Sau, Syed Azeemuddin, Zia Abbas
2023	J	`jnl`	AI/ML algorithms and applications in VLSI design and technology. Integr. Deepthi Amuru, Andleeb Zahra, Harsha V. Vudumula, Pavan K. Cherupally, Sushanth R. Gurram, Amir Ahmad, Zia Abbas
2023	J	`jnl`	Approximate Toom-Cook FFT with sparsity aware error tuning in a shared memory architecture. Integr. Mohammed Salman Ahmed, Md. Kalesha, Andleeb Zahra, Zia Abbas
2023	A	`conf`	Design and Fabrication of Microfluidic Chip for Temperature Control Applications in Biomedical. ICST Andleeb Zahra, Giampiero de Cesare, Domenico Caputo, Nicola Lovecchio, Prabhakar Bhimalapuram, Syed Azeemuddin, Zia Abbas
2023	—	`conf`	Design of Approximate Full Adders for Error Resilient Applications. ICCA Deepthi Amuru, Andleeb Zahra, Varnika Karakuram, Zia Abbas
2022	J	`jnl`	AI/ML Algorithms and Applications in VLSI Design and Technology. CoRR Deepthi Amuru, Harsha V. Vudumula, Pavan K. Cherupally, Sushanth R. Gurram, Amir Ahmad, Andleeb Zahra, Zia Abbas
2021	C	`conf`	Algorithm Driven Power-Timing Optimization Methodology for CMOS Digital Circuits Considering PVTA Variations. ISCAS Hema Sai Kalluru, Prasenjit Saha, Andleeb Zahra, Zia Abbas
2021	—	`conf`	PVT and Aging Degradation Invariant Automated Optimization Approach for CMOS Low-Power High-Performance VLSI Circuits. ISQED Hema Sai Kalluru, Prasenjit Saha, Andleeb Zahra, Zia Abbas
2019	—	`conf`	A Highly Accurate Machine Learning Approach to Modelling PVT Variation Aware Leakage Power in FinFET Digital Circuits. APCCAS Shirisha Gourishetty, Harshini Mandadapu, Andleeb Zahra, Zia Abbas
2019	—	`conf`	Statistical Variation Aware Leakage and Total Power Estimation of 16 nm VLSI Digital Circuits Based on Regression Models. VDAT Deepthi Amuru, Andleeb Zahra, Zia Abbas
2018	—	`conf`	LEADER: Leakage Currents Estimation Technique for Aging Degradation Aware 16 nm CMOS Circuits. VDAT Zia Abbas, Andleeb Zahra, Mauro Olivieri