Andhi Janapsatya

14 papers A* 1A 5Misc 2Journal 2Unranked 3

Year	Rank	Type	Title / Venue / Authors
2015	J	`jnl`	DEW: A Fast Level 1 Cache Simulation Approach for Embedded Processors with FIFO Replacement Policy. CoRR Mohammad Shihabul Haque, Jorgen Peddersen, Andhi Janapsatya, Sri Parameswaran
2010	A	`conf`	DEW: A fast level 1 cache simulation approach for embedded processors with FIFO replacement policy. DATE Mohammad Shihabul Haque, Jorgen Peddersen, Andhi Janapsatya, Sri Parameswaran
2010	A	`conf`	Dueling CLOCK: Adaptive cache replacement policy based on the CLOCK algorithm. DATE Andhi Janapsatya, Aleksandar Ignjatovic, Jorgen Peddersen, Sri Parameswaran
2010	A	`conf`	Rapid runtime estimation methods for pipelined MPSoCs. DATE Haris Javaid, Andhi Janapsatya, Mohammad Shihabul Haque, Sri Parameswaran
2010	A*	`conf`	SCUD: a fast single-pass L1 cache simulation approach for embedded processors with round-robin replacement policy. DAC Mohammad Shihabul Haque, Jorgen Peddersen, Andhi Janapsatya, Sri Parameswaran
2009	—	`conf`	HitME: low power Hit MEmory buffer for embedded systems. ASP-DAC Andhi Janapsatya, Sri Parameswaran, Aleksandar Ignjatovic
2009	Misc	`conf`	SuSeSim: a fast simulation strategy to find optimal L1 cache configuration for embedded systems. CODES+ISSS Mohammad Shihabul Haque, Andhi Janapsatya, Sri Parameswaran
2007	A	`conf`	Instruction trace compression for rapid instruction cache simulation. DATE Andhi Janapsatya, Aleksandar Ignjatovic, Sri Parameswaran, Jörg Henkel
2006	—	`conf`	A novel instruction scratchpad memory optimization method based on concomitance metric. ASP-DAC Andhi Janapsatya, Aleksandar Ignjatovic, Sri Parameswaran
2006	J	`jnl`	Exploiting statistical information for implementation of instruction scratchpad memory in embedded system. IEEE Trans. Very Large Scale Integr. Syst. Andhi Janapsatya, Aleksandar Ignjatovic, Sri Parameswaran
2006	—	`conf`	Finding optimal L1 cache configuration for embedded systems. ASP-DAC Andhi Janapsatya, Aleksandar Ignjatovic, Sri Parameswaran
2005	—	`—`	Optimization of instruction memory for embedded systems. Andhi Janapsatya
2005	Misc	`conf`	Rapid Embedded Hardware/Software System Generation. VLSI Design Jorgen Peddersen, Seng Lin Shee, Andhi Janapsatya, Sri Parameswaran
2004	A	`conf`	Hardware/software managed scratchpad memory for embedded system. ICCAD Andhi Janapsatya, Sri Parameswaran, Aleksandar Ignjatovic