Anantha P. Chandrakasan

454 papers A* 25A 38B 10C 7Misc 22Journal 191Unranked 158

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A 60-GHz Low-Noise mmWave Divider-Less Fractional-N Cascaded PLL Achieving -250.2-dB FoM IEEE J. Solid State Circuits Jaehong Jung, Eunseok Lee, Donghyeon Han, Jinchen Wang, Anantha P. Chandrakasan, Ruonan Han
2026	J	`jnl`	A Fully-Integrated Wireless Ingestible CMOS Drug-Delivery Chip With Electrochemical Energy Harvesting and pH-Adaptive MPPT for Personalized Therapeutics. IEEE J. Solid State Circuits So-Yoon Yang, Deniz Umut Yildirim, Saransh Sharma, Donghyeon Han, Rishabh Mittal, Husna T. Ellis, Jaehong Jung, Eunseok Lee, Yubin Cai, Giovanni Traverso, Anantha P. Chandrakasan
2026	J	`jnl`	Adaptive Block-Scaled Data Types. CoRR Jack Cook, Hyemin S. Lee, Kathryn Le, Junxian Guo, Giovanni Traverso, Anantha P. Chandrakasan, Song Han
2026	J	`jnl`	Securing DNN Acceleration From Off-Chip Memory Vulnerabilities With Low-Overhead Authenticated Encryption. IEEE Trans. Very Large Scale Integr. Syst. Kyungmi Lee, Gaurab Das, Donghyeon Han, Anantha P. Chandrakasan
2026	—	`conf`	Self-Programmable Twin PUFs via Photovoltaic Energy Harvesting During the Pre-Wafer-Dicing Stage. ISSCC Eunseok Lee, Jaehong Jung, Maitreyi Ashok, Anantha P. Chandrakasan, Ruonan Han
2025	J	`jnl`	A 0.7 cm IEEE J. Solid State Circuits Deniz Umut Yildirim, Jaeyoung Jung, Amr Elsakka, Giuseppe Moschetti, Miguel M. Lopez, Jonas Hansryd, Tomás Palacios, Anantha P. Chandrakasan
2025	Misc	`conf`	A 0.75mm VLSID Dimple Vijay Kochar, Maitreyi Ashok, Anantha P. Chandrakasan
2025	Misc	`conf`	A 14-nm Energy-Efficient and Reconfigurable Analog Current-Domain In-Memory Compute SRAM Accelerator. VLSID Aya G. Amer, Maitreyi Ashok, Xin Zhang, John Cohn, Anantha P. Chandrakasan
2025	—	`conf`	A Fully-Integrated Wireless Ingestible Drug Delivery Chip with Electrochemical Energy Harvesting and pH-Based MPPT. CICC So-Yoon Yang, Deniz Umut Yildirim, Saransh Sharma, Donghyeon Han, Rishabh Mittal, Husna Ellis, Jaehong Jung, Eunseok Lee, Yubin Cai, Giovanni Traverso, Anantha P. Chandrakasan
2025	J	`jnl`	Digital In-Memory Compute for Machine Learning Applications With Input and Model Security. IEEE J. Solid State Circuits Maitreyi Ashok, Saurav Maji, Xin Zhang, John Cohn, Anantha P. Chandrakasan
2025	J	`jnl`	Efficient Circuit Performance Prediction Using Machine Learning: From Schematic to Layout and Silicon Measurement With Minimal Data Input. IEEE Trans. Circuits Syst. I Regul. Pap. Dimple Vijay Kochar, Maitreyi Ashok, John Cohn, Xin Zhang, Anantha P. Chandrakasan
2025	C	`conf`	Efficient Circuit Performance Prediction Using Machine Learning: From Schematic to Layout and Silicon Measurement with Minimal Data Input. ISCAS Dimple Vijay Kochar, Maitreyi Ashok, John Cohn, Anantha P. Chandrakasan, Xin Zhang
2025	J	`jnl`	Heterogeneously Integrated Nitrogen-Vacancy Sensing for Real-Time CMOS Security Threat Detection. IEEE Trans. Very Large Scale Integr. Syst. Maitreyi Ashok, Yong Hu, Hanfeng Wang, Ethan G. Arnault, Hamza Raniwala, Aya G. Amer, Matthew Trusheim, Dirk R. Englund, Anantha P. Chandrakasan
2025	—	`conf`	MEGA.mini: A NPU with Novel Heterogeneous AI Processing Architecture Balancing Efficiency, Performance, and Intelligence for the Era of Generative AI. HCS Donghyeon Han, Anantha P. Chandrakasan
2025	—	`conf`	MEGA.mini: A Universal Generative AI Processor with a New Big/Little Core Architecture for NPU. ISSCC Donghyeon Han, Anantha P. Chandrakasan
2025	J	`jnl`	Protecting the Mixed-Signal Domain: Secure ADCs for Internet of Things Devices. Proc. IEEE Maitreyi Ashok, Ruicong Chen, Taehoon Jeong, Anantha P. Chandrakasan, Hae-Seung Lee
2024	—	`conf`	12.5 A Packageless Anti-Tampering Tag Utilizing Unclonable Sub-THz Wave Scattering at the Chip-Item Interface. ISSCC Eunseok Lee, Xibi Chen, Maitreyi Ashok, Jae-Yeon Won, Anantha P. Chandrakasan, Ruonan Han
2024	—	`conf`	A 0.7cm CICC Deniz Umut Yildirim, Jaeyoung Jung, Amr Elsakka, Giuseppe Moschetti, Miguel M. Lopez, Jonas Hansryd, Tomás Palacios, Anantha P. Chandrakasan
2024	J	`jnl`	A 1.54-mm IEEE J. Solid State Circuits Eunseok Lee, Muhammad Ibrahim Wasiq Khan, Xibi Chen, Utsav Banerjee, Nathan M. Monroe, Rabia Tugce Yazicigil, Ruonan Han, Anantha P. Chandrakasan
2024	J	`jnl`	A 6.4-GS/s 1-GHz BW Continuous-Time Pipelined ADC With Time-Interleaved Sub-ADC-DAC Achieving 61.7-dB SNDR in 16-nm FinFET. IEEE J. Solid State Circuits Rishabh Mittal, Hajime Shibata, Sharvil Patil, Erik Krommenhoek, Prawal Shrestha, Gabriele Manganaro, Anantha P. Chandrakasan, Hae-Seung Lee
2024	—	`conf`	A Robust BLE-compatible Wake-up Receiver for Ingestible Device with In-vivo Evaluation. EMBC Saebyeok Shin, Yeseul Jeon, Ian Ballinger, Muhammad Ibrahim Wasiq Khan, Andrew Pettinari, Alison M. Hayward, Giovanni Traverso, Anantha P. Chandrakasan
2024	—	`conf`	A Secure Digital In-Memory Compute (IMC) Macro with Protections for Side-Channel and Bus Probing Attacks. CICC Maitreyi Ashok, Saurav Maji, Xin Zhang, John Cohn, Anantha P. Chandrakasan
2024	J	`jnl`	An Energy-Efficient Neural Network Accelerator With Improved Resilience Against Fault Attacks. IEEE J. Solid State Circuits Saurav Maji, Kyungmi Lee, Cheng Gongye, Yunsi Fei, Anantha P. Chandrakasan
2024	A*	`conf`	HEAP: A Fully Homomorphic Encryption Accelerator with Parallelized Bootstrapping. ISCA Rashmi S. Agrawal, Anantha P. Chandrakasan, Ajay Joshi
2024	—	`conf`	Reconfigurable 3D Edge Sensing System of Carbon Nanotube Sensing and Silicon CMOS from a Commercial Manufacturing Facilities. SiPS Aya G. Amer, Gage Hills, Georgios Kyriazidis, Anantha P. Chandrakasan, Max M. Shulaker
2024	J	`jnl`	SparseLeakyNets: Classification Prediction Attack Over Sparsity-Aware Embedded Neural Networks Using Timing Side-Channel Information. IEEE Comput. Archit. Lett. Saurav Maji, Kyungmi Lee, Anantha P. Chandrakasan
2023	—	`conf`	A 1.54mm CICC Eunseok Lee, Muhammad Ibrahim Wasiq Khan, Xibi Chen, Utsav Banerjee, Nathan M. Monroe, Rabia Tugce Yazicigil, Ruonan Han, Anantha P. Chandrakasan
2023	—	`conf`	A 6.4-GS/s 1-GHz BW Continuous-Time Pipelined ADC with Time-Interleaved Sub-ADC-DAC Achieving 61.7-dB SNDR in 16-nm FinFET. VLSI Technology and Circuits Rishabh Mittal, Hajime Shibata, Sharvil Patil, Erik Krommenhoek, Prawal Shrestha, Gabriele Manganaro, Anantha P. Chandrakasan, Hae-Seung Lee
2023	A	`conf`	A Fully-Integrated Energy-Scalable Transformer Accelerator Supporting Adaptive Model Configuration and Word Elimination for Language Understanding on Edge Devices. ISLPED Zexi Ji, Hanrui Wang, Miaorong Wang, Win-San Khwa, Meng-Fan Chang, Song Han, Anantha P. Chandrakasan
2023	J	`jnl`	A Threshold Implementation-Based Neural Network Accelerator With Power and Electromagnetic Side-Channel Countermeasures. IEEE J. Solid State Circuits Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Anantha P. Chandrakasan
2023	J	`jnl`	A Threshold-Based Bioluminescence Detector With a CMOS-Integrated Photodiode Array in 65 nm for a Multi-Diagnostic Ingestible Capsule. IEEE J. Solid State Circuits Qijun Liu, Miguel Jimenez, Maria Eugenia Inda, Arslan Riaz, Timur Zirtiloglu, Anantha P. Chandrakasan, Timothy K. Lu, Giovanni Traverso, Phillip M. Nadeau, Rabia Tugce Yazicigil
2023	—	`conf`	An Energy-Efficient Neural Network Accelerator with Improved Protections Against Fault-Attacks. ESSCIRC Saurav Maji, Kyungmi Lee, Cheng Gongye, Yunsi Fei, Anantha P. Chandrakasan
2023	—	`conf`	Energy-Efficient Ingestible Drug Delivery System in the Dynamic Gastrointestinal Environment. EMBC So-Yoon Yang, Yeseul Jeon, Rishabh Mittal, Kewang Nan, Yiyuan Yang, Emily Kolaya, Injoo Moon, Kyeong-Ho Kim, Miguel Jimenez, Betar M. Gallant, Anantha P. Chandrakasan, Giovanni Traverso
2023	A*	`conf`	FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption. HPCA Rashmi Agrawal, Leo de Castro, Guowei Yang, Chiraag Juvekar, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Ajay Joshi
2023	A*	`conf`	MAD: Memory-Aware Design Techniques for Accelerating Fully Homomorphic Encryption. MICRO Rashmi Agrawal, Leo de Castro, Chiraag Juvekar, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Ajay Joshi
2023	—	`conf`	Secure and Stable Wireless Communication for an Ingestible Device. EMBC Yeseul Jeon, Saurav Maji, So-Yoon Yang, Muhammed Suleman S. Thaniana, Adam Gierlach, Ian Ballinger, George Selsing, Injoo Moon, Josh Jenkins, Andrew Pettinari, Niora Fabian, Alison M. Hayward, Giovanni Traverso, Anantha P. Chandrakasan
2023	A*	`conf`	SecureLoop: Design Space Exploration of Secure DNN Accelerators. MICRO Kyungmi Lee, Mengjia Yan, Joel S. Emer, Anantha P. Chandrakasan
2023	—	`conf`	Sniff-SAR: A 9.8fJ/c.-s 12b secure ADC with detectiondriven protection against power and EM side-channel attack. CICC Ruicong Chen, Anantha P. Chandrakasan, Hae-Seung Lee
2022	J	`jnl`	A 0.31-THz Orbital-Angular-Momentum (OAM) Wave Transceiver in CMOS With Bits-to-OAM Mode Mapping. IEEE J. Solid State Circuits Muhammad Ibrahim Wasiq Khan, Jongchan Woo, Xiang Yi, Mohamed I. Ibrahim, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Ruonan Han
2022	A	`conf`	A Bit-level Sparsity-aware SAR ADC with Direct Hybrid Encoding for Signed Expressions for AIoT Applications. ISLPED Ruicong Chen, H. T. Kung, Anantha P. Chandrakasan, Hae-Seung Lee
2022	J	`jnl`	A Duty-Cycled Integrated-Fluxgate Magnetometer for Current Sensing. IEEE J. Solid State Circuits Preet Garcha, Viola Schaffer, Baher Haroun, Srinath Ramaswamy, Jim Wieser, Jeffrey H. Lang, Anantha P. Chandrakasan
2022	J	`jnl`	A Low-Power BLS12-381 Pairing Crypto-Processor for Internet-of-Things Security Applications. CoRR Utsav Banerjee, Anantha P. Chandrakasan
2022	—	`conf`	A ThreshoId-ImpIementation-Based Neural-Network Accelerator Securing Model Parameters and Inputs Against Power Side-Channel Attacks. ISSCC Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Anantha P. Chandrakasan
2022	J	`jnl`	FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption. CoRR Rashmi Agrawal, Leo de Castro, Guowei Yang, Chiraag Juvekar, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Ajay Joshi
2022	J	`jnl`	Hardware Trojan Detection Using Unsupervised Deep Learning on Quantum Diamond Microscope Magnetic Field Images. CoRR Maitreyi Ashok, Matthew J. Turner, Ronald L. Walsworth, Edlyn V. Levine, Anantha P. Chandrakasan
2022	J	`jnl`	Hardware Trojan Detection Using Unsupervised Deep Learning on Quantum Diamond Microscope Magnetic Field Images. ACM J. Emerg. Technol. Comput. Syst. Maitreyi Ashok, Matthew J. Turner, Ronald L. Walsworth, Edlyn V. Levine, Anantha P. Chandrakasan
2022	—	`conf`	Physical-Layer Security for THz Communications via Orbital Angular Momentum Waves. SiPS Jongchan Woo, Muhammad Ibrahim Wasiq Khan, Mohamed I. Ibrahim, Ruonan Han, Anantha P. Chandrakasan, Rabia Tugce Yazicigil
2022	—	`conf`	RaM-SAR: A Low Energy and Area Overhead, 11.3fJ/conv.-step 12b 25MS/s Secure Random-Mapping SAR ADC with Power and EM Side-channel Attack Resilience. VLSI Technology and Circuits Ruicong Chen, Hanrui Wang, Anantha P. Chandrakasan, Hae-Seung Lee
2022	—	`conf`	Randomized Switching SAR (RS-SAR) ADC Protections for Power and Electromagnetic Side Channel Security. CICC Maitreyi Ashok, Edlyn V. Levine, Anantha P. Chandrakasan
2022	Misc	`conf`	SparseBFA: Attacking Sparse Deep Neural Networks with the Worst-Case Bit Flips on Coordinates. ICASSP Kyungmi Lee, Anantha P. Chandrakasan
2022	—	`conf`	Wireless, Batteryless, and Secure Implantable System-on-a-Chip for 1.37mmHg Strain Sensing with Bandwidth Reconfigurability for Cross-Tissue Adaptation. CICC Mohamed R. Abdelhamid, Unsoo Ha, Utsav Banerjee, Fadel Adib, Anantha P. Chandrakasan
2021	Misc	`conf`	150nA IQ, Quad Input - Quad Output, Intelligent Integrated Power Management for IoT Applications. VLSID Vipul Singhal, Rajat Chauhan, Vinod Menezes, R. R. Manikandan, Raveesh Magod, Mahesh Mehendale, Anantha P. Chandrakasan
2021	—	`conf`	A 770 kS/s Duty-Cycled Integrated-Fluxgate Magnetometer for Contactless Current Sensing. ISSCC Preet Garcha, Viola Schaffer, Baher Haroun, Srinath Ramaswamy, Jim Wieser, Jeffrey H. Lang, Anantha P. Chandrakasan
2021	—	`conf`	A Low-Power Elliptic Curve Pairing Crypto-Processor for Secure Embedded Blockchain and Functional Encryption. CICC Utsav Banerjee, Anantha P. Chandrakasan
2021	J	`jnl`	CMOS THz-ID: A 1.6-mm² Package-Less Identification Tag Using Asymmetric Cryptography and 260-GHz Far-Field Backscatter Communication. IEEE J. Solid State Circuits Muhammad Ibrahim Wasiq Khan, Mohamed I. Ibrahim, Chiraag Shashikant Juvekar, Wanyeong Jung, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Ruonan Han
2021	J	`jnl`	Does Fully Homomorphic Encryption Need Compute Acceleration? CoRR Leo de Castro, Rashmi Agrawal, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Chiraag Juvekar, Ajay Joshi
2021	J	`jnl`	Does Fully Homomorphic Encryption Need Compute Acceleration? IACR Cryptol. ePrint Arch. Leo de Castro, Rashmi Agrawal, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Chiraag Juvekar, Ajay Joshi
2021	—	`conf`	Efficient Binary Cnn For Medical Image Segmentation. ISBI Kaustav Brahma, Viksit Kumar, Anthony E. Samir, Anantha P. Chandrakasan, Yonina C. Eldar
2021	J	`jnl`	Emerging Terahertz Integrated Systems in Silicon. IEEE Trans. Circuits Syst. I Regul. Pap. Xiang Yi, Cheng Wang, Zhi Hu, Jack W. Holloway, Muhammad Ibrahim Wasiq Khan, Mohamed I. Ibrahim, Mina Kim, Georgios C. Dogiamis, Bradford Perkins, Mehmet Kaynak, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Ruonan Han
2021	J	`jnl`	Leaky Nets: Recovering Embedded Neural Network Models and Inputs Through Simple Power and Timing Side-Channels - Attacks and Defenses. IEEE Internet Things J. Saurav Maji, Utsav Banerjee, Anantha P. Chandrakasan
2021	J	`jnl`	Leaky Nets: Recovering Embedded Neural Network Models and Inputs through Simple Power and Timing Side-Channels - Attacks and Defenses. CoRR Saurav Maji, Utsav Banerjee, Anantha P. Chandrakasan
2021	J	`jnl`	S2ADC: A 12-bit, 1.25-MS/s Secure SAR ADC With Power Side-Channel Attack Resistance. IEEE J. Solid State Circuits Taehoon Jeong, Anantha P. Chandrakasan, Hae-Seung Lee
2021	B	`conf`	Securing Embedded Medical Devices using Dual-Factor Authentication. CBMS Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Rabia Tugce Yazicigil, Anantha P. Chandrakasan
2021	—	`conf`	Understanding the Energy vs. Adversarial Robustness Trade-Off in Deep Neural Networks. SiPS Kyungmi Lee, Anantha P. Chandrakasan
2021	J	`jnl`	Understanding the Energy vs. Adversarial Robustness Trade-Off in Deep Neural Networks. IEEE Open J. Circuits Syst. Kyungmi Lee, Anantha P. Chandrakasan
2021	—	`conf`	Zero-Crossing-Based Bio-Engineered Sensor. CICC Qijun Liu, Arslan Riaz, Timur Zirtiloglu, Maria Eugenia Inda, Miguel Jimenez, Yong Lai, Christoph Steiger, Elizabeth Diamond, Giovanni Traverso, Timothy K. Lu, Anantha P. Chandrakasan, Phillip M. Nadeau, Rabia Tugce Yazicigil
2020	—	`conf`	29.8 THzID: A 1.6mm2 Package-Less Cryptographic Identification Tag with Backscattering and Beam-Steering at 260GHz. ISSCC Mohamed I. Ibrahim, Muhammad Ibrahim Wasiq Khan, Wanyeong Jung, Rabia Tugce Yazicigil, Chiraag Shashikant Juvekar, Anantha P. Chandrakasan, Ruonan Han
2020	—	`conf`	A Low-Power Dual-Factor Authentication Unit for Secure Implantable Devices. CICC Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Mohamed R. Abdelhamid, Phillip M. Nadeau, Rabia Tugce Yazicigil, Anantha P. Chandrakasan
2020	J	`jnl`	A Low-Power Dual-Factor Authentication Unit for Secure Implantable Devices. CoRR Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Mohamed R. Abdelhamid, Phillip M. Nadeau, Rabia Tugce Yazicigil, Anantha P. Chandrakasan
2020	C	`conf`	Accelerating Post-Quantum Cryptography using an Energy-Efficient TLS Crypto-Processor. ISCAS Utsav Banerjee, Siddharth Das, Anantha P. Chandrakasan
2020	—	`conf`	CompAcc: Efficient Hardware Realization for Processing Compressed Neural Networks Using Accumulator Arrays. A-SSCC Zexi Ji, Wanyeong Jung, Jongchan Woo, Khushal Sethi, Shih-Lien Lu, Anantha P. Chandrakasan
2020	—	`conf`	Efficient Post-Quantum TLS Handshakes using Identity-Based Key Exchange from Lattices. ICC Utsav Banerjee, Anantha P. Chandrakasan
2020	—	`conf`	Modular Optoelectronic System for Wireless, Programmable Neuromodulation During Free Behavior. EMBC Sirma Orguc, Joanna Sands, Atharva Sahasrabudhe, Polina Anikeeva, Anantha P. Chandrakasan
2020	J	`jnl`	Rethinking Empirical Evaluation of Adversarial Robustness Using First-Order Attack Methods. CoRR Kyungmi Lee, Anantha P. Chandrakasan
2020	—	`conf`	S2ADC: A 12-bit, 1.25MS/s Secure SAR ADC with Power Side-Channel Attack Resistance. CICC Taehoon Jeong, Anantha P. Chandrakasan, Hae-Seung Lee
2020	A*	`conf`	Self-reconfigurable micro-implants for cross-tissue wireless and batteryless connectivity. MobiCom Mohamed R. Abdelhamid, Ruicong Chen, Joonhyuk Cho, Anantha P. Chandrakasan, Fadel Adib
2020	J	`jnl`	SonicPACT: An Ultrasonic Ranging Method for the Private Automated Contact Tracing (PACT) Protocol. CoRR John Meklenburg, Michael A. Specter, Michael Wentz, Hari Balakrishnan, Anantha P. Chandrakasan, John Cohn, Gary Hatke, Louise Ivers, Ronald L. Rivest, Gerald Jay Sussman, Daniel J. Weitzner
2019	J	`jnl`	A Silicon MEMS EM vibration energy harvester. CoRR Y. Yang, Ujwal Radhakrishna, D. Ward, Anantha P. Chandrakasan, Jeffrey H. Lang
2019	—	`conf`	An Energy-Efficient Configurable Lattice Cryptography Processor for the Quantum-Secure Internet of Things. ISSCC Utsav Banerjee, Abhishek Pathak, Anantha P. Chandrakasan
2019	J	`jnl`	An Energy-Efficient Configurable Lattice Cryptography Processor for the Quantum-Secure Internet of Things. CoRR Utsav Banerjee, Abhishek Pathak, Anantha P. Chandrakasan
2019	J	`jnl`	An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for End-to-End Security in IoT Applications. CoRR Utsav Banerjee, Chiraag Juvekar, Andrew Wright, Arvind, Anantha P. Chandrakasan
2019	J	`jnl`	An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for Securing Internet-of-Things Applications. CoRR Utsav Banerjee, Andrew Wright, Chiraag Juvekar, Madeleine Waller, Arvind, Anantha P. Chandrakasan
2019	J	`jnl`	An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for Securing Internet-of-Things Applications. IEEE J. Solid State Circuits Utsav Banerjee, Andrew Wright, Chiraag Juvekar, Madeleine Waller, Arvind, Anantha P. Chandrakasan
2019	J	`jnl`	CONV-SRAM: An Energy-Efficient SRAM With In-Memory Dot-Product Computation for Low-Power Convolutional Neural Networks. IEEE J. Solid State Circuits Avishek Biswas, Anantha P. Chandrakasan
2019	—	`conf`	Flexible Low Power CNN Accelerator for Edge Computing with Weight Tuning. A-SSCC Miaorong Wang, Anantha P. Chandrakasan
2019	—	`conf`	SHARC: Self-Healing Analog with RRAM and CNFETs. ISSCC Aya G. Amer, Rebecca Ho, Gage Hills, Anantha P. Chandrakasan, Max M. Shulaker
2019	J	`jnl`	Sapphire: A Configurable Crypto-Processor for Post-Quantum Lattice-based Protocols (Extended Version). IACR Cryptol. ePrint Arch. Utsav Banerjee, Tenzin S. Ukyab, Anantha P. Chandrakasan
2019	J	`jnl`	Sapphire: A Configurable Crypto-Processor for Post-Quantum Lattice-based Protocols. CoRR Utsav Banerjee, Tenzin S. Ukyab, Anantha P. Chandrakasan
2019	J	`jnl`	Sapphire: A Configurable Crypto-Processor for Post-Quantum Lattice-based Protocols. IACR Trans. Cryptogr. Hardw. Embed. Syst. Utsav Banerjee, Tenzin S. Ukyab, Anantha P. Chandrakasan
2018	—	`conf`	A -80dBm BLE-compliant, FSK wake-up receiver with system and within-bit dutycycling for scalable power and latency. CICC Mohamed R. Abdelhamid, Arun Paidimarri, Anantha P. Chandrakasan
2018	J	`jnl`	A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices. IEEE J. Solid State Circuits Mehul Tikekar, Vivienne Sze, Anantha P. Chandrakasan
2018	J	`jnl`	A Low-Power Speech Recognizer and Voice Activity Detector Using Deep Neural Networks. IEEE J. Solid State Circuits Michael Price, James R. Glass, Anantha P. Chandrakasan
2018	—	`conf`	A low-power integrated power converter for an electromagnetic vibration energy harvester with 150 mV-AC cold startup, frequency tuning, and 50 Hz AC-to-DC conversion. CICC Ujwal Radhakrishna, Patrick Riehl, Nachiket V. Desai, Phillip M. Nadeau, Yuechen Yang, Abraham Shin, Jeffrey H. Lang, Anantha P. Chandrakasan
2018	—	`conf`	A nonvolatile flip-flop-enabled cryptographic wireless authentication tag with per-query key update and power-glitch attack countermeasures. ASP-DAC Chiraag Juvekar, Anantha P. Chandrakasan, Joyce Kwong, Hyung-Min Lee
2018	J	`jnl`	An Actively Detuned Wireless Power Receiver With Public Key Cryptographic Authentication and Dynamic Power Allocation. IEEE J. Solid State Circuits Nachiket V. Desai, Chiraag Juvekar, Shubham Chandak, Anantha P. Chandrakasan
2018	—	`conf`	An energy-efficient reconfigurable DTLS cryptographic engine for End-to-End security in iot applications. ISSCC Utsav Banerjee, Chiraag Juvekar, Andrew Wright, Arvind, Anantha P. Chandrakasan
2018	—	`conf`	Conv-RAM: An energy-efficient SRAM with embedded convolution computation for low-power CNN-based machine learning applications. ISSCC Avishek Biswas, Anantha P. Chandrakasan
2018	—	`conf`	EMG-based Real Time Facial Gesture Recognition for Stress Monitoring. EMBC Sirma Orguc, Harneet Singh Khurana, Konstantina M. Stankovic, Hae-Seung Lee, Anantha P. Chandrakasan
2018	Misc	`conf`	Energy-Efficient Speaker Identification with Low-Precision Networks. ICASSP Skanda Koppula, James R. Glass, Anantha P. Chandrakasan
2018	A*	`conf`	GAZELLE: A Low Latency Framework for Secure Neural Network Inference. USENIX Security Symposium Chiraag Juvekar, Vinod Vaikuntanathan, Anantha P. Chandrakasan
2018	J	`jnl`	GAZELLE: A Low Latency Framework for Secure Neural Network Inference. IACR Cryptol. ePrint Arch. Chiraag Juvekar, Vinod Vaikuntanathan, Anantha P. Chandrakasan
2018	J	`jnl`	Gazelle: A Low Latency Framework for Secure Neural Network Inference. CoRR Chiraag Juvekar, Vinod Vaikuntanathan, Anantha P. Chandrakasan
2018	C	`conf`	Recode then LSB-first SAR ADC for Reducing Energy and Bit-cycles. ISCAS Harneet Singh Khurana, Anantha P. Chandrakasan, Hae-Seung Lee
2017	—	`conf`	0.3 V ultra-low power sensor interface for EMG. ESSCIRC Sirma Orguc, Harneet Singh Khurana, Hae-Seung Lee, Anantha P. Chandrakasan
2017	—	`conf`	10.8 A Buck converter with 240pW quiescent power, 92% peak efficiency and a 2×10 ISSCC Arun Paidimarri, Anantha P. Chandrakasan
2017	—	`conf`	14.4 A scalable speech recognizer with deep-neural-network acoustic models and voice-activated power gating. ISSCC Michael Price, James R. Glass, Anantha P. Chandrakasan
2017	—	`conf`	21.1 Nanowatt circuit interface to whole-cell bacterial sensors. ISSCC Phillip M. Nadeau, Mark Mimee, Sean Carim, Timothy K. Lu, Anantha P. Chandrakasan
2017	—	`conf`	21.8 An actively detuned wireless power receiver with public key cryptographic authentication and dynamic power allocation. ISSCC Nachiket V. Desai, Chiraag Juvekar, Shubham Chandak, Anantha P. Chandrakasan
2017	—	`conf`	A 25 mV-startup cold start system with on-chip magnetics for thermal energy harvesting. ESSCIRC Preet Garcha, Dina El-Damak, Nachiket V. Desai, Jorge Troncoso, Erika Mazotti, Joyce Mullenix, Shaoping Tang, Django Trombley, Dennis Buss, Jeffrey H. Lang, Anantha P. Chandrakasan
2017	J	`jnl`	A Noise-Efficient 36 nV/ $\surd $ Hz Chopper Amplifier Using an Inverter-Based 0.2-V Supply Input Stage. IEEE J. Solid State Circuits Frank M. Yaul, Anantha P. Chandrakasan
2017	J	`jnl`	A Nonvolatile Flip-Flop-Enabled Cryptographic Wireless Authentication Tag With Per-Query Key Update and Power-Glitch Attack Countermeasures. IEEE J. Solid State Circuits Hyung-Min Lee, Chiraag Juvekar, Joyce Kwong, Anantha P. Chandrakasan
2017	J	`jnl`	A Random Linear Network Coding Accelerator in a 2.4GHz Transmitter for IoT Applications. IEEE Trans. Circuits Syst. I Regul. Pap. Georgios Angelopoulos, Arun Paidimarri, Muriel Médard, Anantha P. Chandrakasan
2017	J	`jnl`	A Wide Dynamic Range Buck Converter With Sub-nW Quiescent Power. IEEE J. Solid State Circuits Arun Paidimarri, Anantha P. Chandrakasan
2017	J	`jnl`	An Energy-Scalable Accelerator for Blind Image Deblurring. IEEE J. Solid State Circuits Priyanka Raina, Mehul Tikekar, Anantha P. Chandrakasan
2017	—	`conf`	An offset-cancelling four-phase voltage sense amplifier for resistive memories in 14nm CMOS. CICC Avishek Biswas, Umut Arslan, Fatih Hamzaoglu, Anantha P. Chandrakasan
2017	J	`jnl`	Energy-Efficient Reconfigurable SRAM: Reducing Read Power Through Data Statistics. IEEE J. Solid State Circuits Chuhong Duan, Andreas J. Gotterba, Mahmut E. Sinangil, Anantha P. Chandrakasan
2017	J	`jnl`	Harnessing Partial Packets in Wireless Networks: Throughput and Energy Benefits. IEEE Trans. Wirel. Commun. Georgios Angelopoulos, Muriel Médard, Anantha P. Chandrakasan
2017	A*	`conf`	Low-Power On-Chip Network Providing Guaranteed Services for Snoopy Coherent and Artificial Neural Network Systems. DAC Bhavya K. Daya, Li-Shiuan Peh, Anantha P. Chandrakasan
2017	—	`conf`	Session 1 overview: Plenary Session. ISSCC Anantha P. Chandrakasan, Boris Murmann
2017	—	`conf`	Single-BAW multi-channel transmitter with low power and fast start-up time. ESSCIRC Phillip M. Nadeau, Rabia Tugce Yazicigil, Anantha P. Chandrakasan
2017	B	`conf`	eeDTLS: Energy-Efficient Datagram Transport Layer Security for the Internet of Things. GLOBECOM Utsav Banerjee, Chiraag Juvekar, Samuel H. Fuller, Anantha P. Chandrakasan
2016	—	`conf`	16.2 A Keccak-based wireless authentication tag with per-query key update and power-glitch attack countermeasures. ISSCC Chiraag Juvekar, Hyung-Min Lee, Joyce Kwong, Anantha P. Chandrakasan
2016	—	`conf`	24.1 A 0.6V 8mW 3D vision processor for a navigation device for the visually impaired. ISSCC Dongsuk Jeon, Nathan Ickes, Priyanka Raina, Hsueh-Cheng Wang, Daniela Rus, Anantha P. Chandrakasan
2016	—	`conf`	5.4 A sub-µW 36nV/√Hz chopper amplifier for sensors using a noise-efficient inverter-based 0.2V-supply input stage. ISSCC Frank M. Yaul, Anantha P. Chandrakasan
2016	J	`jnl`	A +10 dBm BLE Transmitter With Sub-400 pW Leakage for Ultra-Low Duty Cycles. IEEE J. Solid State Circuits Arun Paidimarri, Nathan Ickes, Anantha P. Chandrakasan
2016	—	`conf`	A 0.36V 128Kb 6T SRAM with energy-efficient dynamic body-biasing and output data prediction in 28nm FDSOI. ESSCIRC Avishek Biswas, Anantha P. Chandrakasan
2016	J	`jnl`	A 10 nW-1µW Power Management IC With Integrated Battery Management and Self-Startup for Energy Harvesting Applications. IEEE J. Solid State Circuits Dina El-Damak, Anantha P. Chandrakasan
2016	—	`conf`	A ZVS resonant receiver with maximum efficiency tracking for device-to-device wireless charging. ESSCIRC Nachiket V. Desai, Anantha P. Chandrakasan
2016	—	`conf`	An ASIC for Energy-Scalable, Low-Power Digital Ultrasound Beamforming. SiPS Bonnie Kit Ying Lam, Michael Price, Anantha P. Chandrakasan
2016	J	`jnl`	An RC Oscillator With Comparator Offset Cancellation. IEEE J. Solid State Circuits Arun Paidimarri, Danielle Griffith, Alice Wang, Gangadhar Burra, Anantha P. Chandrakasan
2016	—	`conf`	An energy-scalable accelerator for blind image deblurring. ESSCIRC Priyanka Raina, Mehul Tikekar, Anantha P. Chandrakasan
2016	—	`conf`	Analog-digital partitioning and coupling in 3D-IC for RF applications. 3DIC Gilad Yahalom, Stacy Ho, Alice Wang, Uming Ko, Anantha P. Chandrakasan
2016	A	`conf`	Enabling simultaneously bi-directional TSV signaling for energy and area efficient 3D-ICs. DATE Sunghyun Park, Alice Wang, Uming Ko, Li-Shiuan Peh, Anantha P. Chandrakasan
2016	A	`conf`	Memory-Efficient Modeling and Search Techniques for Hardware ASR Decoders. INTERSPEECH Michael Price, Anantha P. Chandrakasan, James R. Glass
2016	A*	`conf`	Quest for high-performance bufferless NoCs with single-cycle express paths and self-learning throttling. DAC Bhavya K. Daya, Li-Shiuan Peh, Anantha P. Chandrakasan
2016	—	`conf`	Reconfigurable, conditional pre-charge SRAM: Lowering read power by leveraging data statistics. A-SSCC Chuhong Duan, Andreas J. Gotterba, Mahmut E. Sinangil, Anantha P. Chandrakasan
2016	—	`conf`	Session 1 overview: Plenary session. ISSCC Anantha P. Chandrakasan, Kevin Zhang
2016	J	`jnl`	Towards High-Performance Bufferless NoCs with SCEPTER. IEEE Comput. Archit. Lett. Bhavya K. Daya, Li-Shiuan Peh, Anantha P. Chandrakasan
2016	J	`jnl`	Ultra Low-Energy Relaxation Oscillator With 230 fJ/cycle Efficiency. IEEE J. Solid State Circuits Phillip M. Nadeau, Arun Paidimarri, Anantha P. Chandrakasan
2015	—	`conf`	13.7 A +10dBm 2.4GHz transmitter with sub-400pW leakage and 43.7% system efficiency. ISSCC Arun Paidimarri, Nathan Ickes, Anantha P. Chandrakasan
2015	—	`conf`	4.2 pW timer for heavily duty-cycled systems. VLSIC Phillip M. Nadeau, Arun Paidimarri, Anantha P. Chandrakasan
2015	J	`jnl`	A 28 nm FDSOI Integrated Reconfigurable Switched-Capacitor Based Step-Up DC-DC Converter With 88% Peak Efficiency. IEEE J. Solid State Circuits Avishek Biswas, Yildiz Sinangil, Anantha P. Chandrakasan
2015	J	`jnl`	A 6 mW, 5, 000-Word Real-Time Speech Recognizer Using WFST Models. IEEE J. Solid State Circuits Michael Price, James R. Glass, Anantha P. Chandrakasan
2015	J	`jnl`	A Fully-Implantable Cochlear Implant SoC With Piezoelectric Middle-Ear Sensor and Arbitrary Waveform Neural Stimulation. IEEE J. Solid State Circuits Marcus Yip, Rui Jin, Hideko Heidi Nakajima, Konstantina M. Stankovic, Anantha P. Chandrakasan
2015	—	`conf`	AdaptCast: An integrated source to transmission scheme for wireless sensor networks. ICC Georgios Angelopoulos, Muriel Médard, Anantha P. Chandrakasan
2015	A*	`conf`	Caraoke: An E-Toll Transponder Network for Smart Cities. SIGCOMM Omid Abari, Deepak Vasisht, Dina Katabi, Anantha P. Chandrakasan
2015	—	`conf`	Session 1 overview: Plenary session. ISSCC Anantha P. Chandrakasan, Hoi-Jun Yoo
2015	—	`conf`	Solar energy harvesting system with integrated battery management and startup using single inductor and 3.2nW quiescent power. VLSIC Dina El-Damak, Anantha P. Chandrakasan
2014	—	`conf`	11.3 A 10b 0.6nW SAR ADC with data-dependent energy savings using LSB-first successive approximation. ISSCC Frank M. Yaul, Anantha P. Chandrakasan
2014	—	`conf`	18.2 A fully-implantable cochlear implant SoC with piezoelectric middle-ear sensor and energy-efficient stimulation in 0.18μm HVCMOS. ISSCC Marcus Yip, Rui Jin, Hideko Heidi Nakajima, Konstantina M. Stankovic, Anantha P. Chandrakasan
2014	—	`conf`	22.4 A 1GS/s 10b 18.9mW time-interleaved SAR ADC with background timing-skew calibration. ISSCC Sunghyuk Lee, Anantha P. Chandrakasan, Hae-Seung Lee
2014	—	`conf`	23.2 A 1.1nW energy harvesting system with 544pW quiescent power for next-generation implants. ISSCC Saurav Bandyopadhyay, Patrick P. Mercier, Andrew C. Lysaght, Konstantina M. Stankovic, Anantha P. Chandrakasan
2014	—	`conf`	27.2 A 6mW 5K-Word real-time speech recognizer using WFST models. ISSCC Michael Price, James R. Glass, Anantha P. Chandrakasan
2014	—	`conf`	27.4 A 0.75-million-point fourier-transform chip for frequency-sparse signals. ISSCC Omid Abari, Ezzeldin Hamed, Haitham Hassanieh, Abhinav Agarwal, Dina Katabi, Anantha P. Chandrakasan, Vladimir Stojanovic
2014	J	`jnl`	A 1 GS/s 10b 18.9 mW Time-Interleaved SAR ADC With Background Timing Skew Calibration. IEEE J. Solid State Circuits Sunghyuk Lee, Anantha P. Chandrakasan, Hae-Seung Lee
2014	J	`jnl`	A 1.1 nW Energy-Harvesting System with 544 pW Quiescent Power for Next-Generation Implants. IEEE J. Solid State Circuits Saurav Bandyopadhyay, Patrick P. Mercier, Andrew C. Lysaght, Konstantina M. Stankovic, Anantha P. Chandrakasan
2014	J	`jnl`	A 10 bit SAR ADC With Data-Dependent Energy Reduction Using LSB-First Successive Approximation. IEEE J. Solid State Circuits Frank M. Yaul, Anantha P. Chandrakasan
2014	J	`jnl`	A 128 Kbit SRAM With an Embedded Energy Monitoring Circuit and Sense-Amplifier Offset Compensation Using Body Biasing. IEEE J. Solid State Circuits Yildiz Sinangil, Anantha P. Chandrakasan
2014	J	`jnl`	A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications. IEEE J. Solid State Circuits Mehul Tikekar, Chao-Tsung Huang, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan
2014	—	`conf`	A 28nm FDSOI integrated reconfigurable switched-capacitor based step-up DC-DC converter with 88% peak efficiency. ESSCIRC Avishek Biswas, Yildiz Sinangil, Anantha P. Chandrakasan
2014	J	`jnl`	A 3.4-pJ FeRAM-Enabled D Flip-Flop in 0.13-µm CMOS for Nonvolatile Processing in Digital Systems. IEEE J. Solid State Circuits Masood Qazi, Ajith Amerasekera, Anantha P. Chandrakasan
2014	J	`jnl`	A Scalable, 2.9 mW, 1 Mb/s e-Textiles Body Area Network Transceiver With Remotely-Powered Nodes and Bi-Directional Data Communication. IEEE J. Solid State Circuits Nachiket V. Desai, Jerald Yoo, Anantha P. Chandrakasan
2014	J	`jnl`	A Sub-nW 2.4 GHz Transmitter for Low Data-Rate Sensing Applications. IEEE J. Solid State Circuits Patrick P. Mercier, Saurav Bandyopadhyay, Andrew C. Lysaght, Konstantina M. Stankovic, Anantha P. Chandrakasan
2014	A	`conf`	A bipolar ±40 MV self-starting boost converter with transformer reuse for thermoelectric energy harvesting. ISLPED Nachiket V. Desai, Yogesh K. Ramadass, Anantha P. Chandrakasan
2014	—	`conf`	A self-aware processor SoC using energy monitors integrated into power converters for self-adaptation. VLSIC Yildiz Sinangil, Sabrina M. Neuman, Mahmut E. Sinangil, Nathan Ickes, George Bezerra, Eric Lau, Jason E. Miller, Henry Hoffmann, Srinivas Devadas, Anantha P. Chandrakasan
2014	J	`jnl`	Application-Specific SRAM Design Using Output Prediction to Reduce Bit-Line Switching Activity and Statistically Gated Sense Amplifiers for Up to 1.9× Lower Energy/Access. IEEE J. Solid State Circuits Mahmut E. Sinangil, Anantha P. Chandrakasan
2014	J	`jnl`	Correction to "Reconfigurable Processor for Energy-Efficient Computational Photography". IEEE J. Solid State Circuits Rahul Rithe, Priyanka Raina, Nathan Ickes, Srikanth V. Tenneti, Anantha P. Chandrakasan
2014	—	`ch.`	Decoder Hardware Architecture for HEVC. High Efficiency Video Coding Mehul Tikekar, Chao-Tsung Huang, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan
2014	—	`conf`	Energy Savings via Harnessing Partial Packets in Body Area Networks. BODYNETS Georgios Angelopoulos, Anantha P. Chandrakasan, Muriel Médard
2014	B	`conf`	Energy and area-efficient hardware implementation of HEVC inverse transform and dequantization. ICIP Mehul Tikekar, Chao-Tsung Huang, Vivienne Sze, Anantha P. Chandrakasan
2014	J	`jnl`	Memory-Hierarchical and Mode-Adaptive HEVC Intra Prediction Architecture for Quad Full HD Video Decoding. IEEE Trans. Very Large Scale Integr. Syst. Chao-Tsung Huang, Mehul Tikekar, Anantha P. Chandrakasan
2014	—	`conf`	PRAC: Exploiting partial packets without cross-layer or feedback information. ICC Georgios Angelopoulos, Anantha P. Chandrakasan, Muriel Médard
2014	—	`conf`	SCORPIO: 36-core shared memory processor demonstrating snoopy coherence on a mesh interconnect. Hot Chips Symposium Chia-Hsin Owen Chen, Sunghyun Park, Suvinay Subramanian, Tushar Krishna, Bhavya K. Daya, Woo-Cheol Kwon, Brett Wilkerson, John Arends, Anantha P. Chandrakasan, Li-Shiuan Peh
2014	A*	`conf`	SCORPIO: A 36-core research chip demonstrating snoopy coherence on a scalable mesh NoC with in-network ordering. ISCA Bhavya K. Daya, Chia-Hsin Owen Chen, Suvinay Subramanian, Woo-Cheol Kwon, Sunghyun Park, Tushar Krishna, Jim Holt, Anantha P. Chandrakasan, Li-Shiuan Peh
2013	A	`conf`	40.4fJ/bit/mm low-swing on-chip signaling with self-resetting logic repeaters embedded within a mesh NoC in 45nm SOI CMOS. DATE Sunghyun Park, Masood Qazi, Li-Shiuan Peh, Anantha P. Chandrakasan
2013	—	`conf`	90.6% efficient 11MHz 22W LED driver using GaN FETs and burst-mode controller with 0.96 power factor. ISSCC Saurav Bandyopadhyay, Bob Neidorff, Dave Freeman, Anantha P. Chandrakasan
2013	—	`conf`	A 120nW 18.5kHz RC oscillator with comparator offset cancellation for ±0.25% temperature stability. ISSCC Arun Paidimarri, Danielle Griffith, Alice Wang, Anantha P. Chandrakasan, Gangadhar Burra
2013	J	`jnl`	A 2.4 GHz Multi-Channel FBAR-based Transmitter With an Integrated Pulse-Shaping Power Amplifier. IEEE J. Solid State Circuits Arun Paidimarri, Phillip M. Nadeau, Patrick P. Mercier, Anantha P. Chandrakasan
2013	—	`conf`	A 249Mpixel/s HEVC video-decoder chip for Quad Full HD applications. ISSCC Chao-Tsung Huang, Mehul Tikekar, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan
2013	—	`conf`	A 3.4pJ FeRAM-enabled D flip-flop in 0.13µm CMOS for nonvolatile processing in digital systems. ISSCC Masood Qazi, Ajith Amerasekera, Anantha P. Chandrakasan
2013	—	`conf`	A 78 pW 1 b/s 2.4 GHz radio transmitter for near-zero-power sensing applications. ESSCIRC Patrick P. Mercier, Saurav Bandyopadhyay, Andrew C. Lysaght, Konstantina M. Stankovic, Anantha P. Chandrakasan
2013	—	`conf`	A 93% efficiency reconfigurable switched-capacitor DC-DC converter using on-chip ferroelectric capacitors. ISSCC Dina El-Damak, Saurav Bandyopadhyay, Anantha P. Chandrakasan
2013	J	`jnl`	A Resolution-Reconfigurable 5-to-10-Bit 0.4-to-1 V Power Scalable SAR ADC for Sensor Applications. IEEE J. Solid State Circuits Marcus Yip, Anantha P. Chandrakasan
2013	—	`conf`	A scalable 2.9mW 1Mb/s eTextiles body area network transceiver with remotely powered sensors and bi-directional data communication. ISSCC Nachiket V. Desai, Jerald Yoo, Anantha P. Chandrakasan
2013	J	`jnl`	An 8-Channel Scalable EEG Acquisition SoC With Patient-Specific Seizure Classification and Recording Processor. IEEE J. Solid State Circuits Jerald Yoo, Long Yan, Dina El-Damak, Muhammad Bin Altaf, Ali H. Shoeb, Anantha P. Chandrakasan
2013	—	`conf`	An SRAM using output prediction to reduce BL-switching activity and statistically-gated SA for up to 1.9× reduction in energy/access. ISSCC Mahmut E. Sinangil, Anantha P. Chandrakasan
2013	J	`jnl`	Cost and Coding Efficient Motion Estimation Design Considerations for High Efficiency Video Coding (HEVC) Standard. IEEE J. Sel. Top. Signal Process. Mahmut E. Sinangil, Vivienne Sze, Minhua Zhou, Anantha P. Chandrakasan
2013	—	`conf`	EP1: Antiques from the innovations attic. ISSCC Trudy Stetzler, Anantha P. Chandrakasan, Bram Nauta
2013	J	`jnl`	Energy-Aware Design of Compressed Sensing Systems for Wireless Sensors Under Performance and Reliability Constraints. IEEE Trans. Circuits Syst. I Regul. Pap. Fred Chen, Fabian Lim, Omid Salehi-Abari, Anantha P. Chandrakasan, Vladimir Stojanovic
2013	—	`conf`	Experimental study of the interplay of channel and network coding in low power sensor applications. ICC Georgios Angelopoulos, Arun Paidimarri, Anantha P. Chandrakasan, Muriel Médard
2013	C	`conf`	HEVC interpolation filter architecture for quad full HD decoding. VCIP Chao-Tsung Huang, Chiraag Juvekar, Mehul Tikekar, Anantha P. Chandrakasan
2013	J	`jnl`	Rapid Wireless Capacitor Charging Using a Multi-Tapped Inductively-Coupled Secondary Coil. IEEE Trans. Circuits Syst. I Regul. Pap. Patrick P. Mercier, Anantha P. Chandrakasan
2013	J	`jnl`	Reconfigurable Processor for Energy-Efficient Computational Photography. IEEE J. Solid State Circuits Rahul Rithe, Priyanka Raina, Nathan Ickes, Srikanth V. Tenneti, Anantha P. Chandrakasan
2013	—	`conf`	Reconfigurable processor for energy-scalable computational photography. ISSCC Rahul Rithe, Priyanka Raina, Nathan Ickes, Srikanth V. Tenneti, Anantha P. Chandrakasan
2013	A	`conf`	SMART: a single-cycle reconfigurable NoC for SoC applications. DATE Chia-Hsin Owen Chen, Sunghyun Park, Tushar Krishna, Suvinay Subramanian, Anantha P. Chandrakasan, Li-Shiuan Peh
2013	—	`conf`	Session 1 overview: Plenary session. ISSCC Anantha P. Chandrakasan, Bram Nauta
2013	J	`jnl`	Single-Cycle Multihop Asynchronous Repeated Traversal: A SMART Future for Reconfigurable On-Chip Networks. Computer Tushar Krishna, Chia-Hsin Owen Chen, Sunghyun Park, Woo-Cheol Kwon, Suvinay Subramanian, Anantha P. Chandrakasan, Li-Shiuan Peh
2013	J	`jnl`	Technique for Efficient Evaluation of SRAM Timing Failure. IEEE Trans. Very Large Scale Integr. Syst. Masood Qazi, Mehul Tikekar, Lara Dolecek, Devavrat Shah, Anantha P. Chandrakasan
2013	J	`jnl`	Ultrasonic Imaging Transceiver Design for CMUT: A Three-Level 30-Vpp Pulse-Shaping Pulser With Improved Efficiency and a Noise-Optimized Receiver. IEEE J. Solid State Circuits Kailiang Chen, Hae-Seung Lee, Anantha P. Chandrakasan, Charles G. Sodini
2012	—	`conf`	A 0.6V 2.9µW mixed-signal front-end for ECG monitoring. VLSIC Marcus Yip, Jose L. Bohorquez, Anantha P. Chandrakasan
2012	J	`jnl`	A 12 b 5-to-50 MS/s 0.5-to-1 V Voltage Scalable Zero-Crossing Based Pipelined ADC. IEEE J. Solid State Circuits Sunghyuk Lee, Anantha P. Chandrakasan, Hae-Seung Lee
2012	J	`jnl`	A 28 nm 0.6 V Low Power DSP for Mobile Applications. IEEE J. Solid State Circuits Nathan Ickes, Gordon Gammie, Mahmut E. Sinangil, Rahul Rithe, Jie Gu, Alice Wang, Hugh Mair, Satyendra Datla, Bing Rong, Sushma Honnavara Prasad, Lam Ho, Greg Baldwin, Dennis Buss, Anantha P. Chandrakasan, Uming Ko
2012	—	`conf`	A 330nA energy-harvesting charger with battery management for solar and thermoelectric energy harvesting. ISSCC Karthik Kadirvel, Yogesh K. Ramadass, Umar Lyles, John Carpenter, Vadim Ivanov, Vince McNeil, Anantha P. Chandrakasan, Brian Lum-Shue-Chan
2012	—	`conf`	A 440pJ/bit 1Mb/s 2.4GHz multi-channel FBAR-based TX and an integrated pulse-shaping PA. VLSIC Arun Paidimarri, Phillip M. Nadeau, Patrick P. Mercier, Anantha P. Chandrakasan
2012	J	`jnl`	A Highly Parallel and Scalable CABAC Decoder for Next Generation Video Coding. IEEE J. Solid State Circuits Vivienne Sze, Anantha P. Chandrakasan
2012	J	`jnl`	A Low-Voltage 1 Mb FRAM in 0.13 µm CMOS Featuring Time-to-Digital Sensing for Expanded Operating Margin. IEEE J. Solid State Circuits Masood Qazi, Michael Clinton, Steven Bartling, Anantha P. Chandrakasan
2012	—	`conf`	An 8-channel scalable EEG acquisition SoC with fully integrated patient-specific seizure classification and recording processor. ISSCC Jerald Yoo, Long Yan, Dina El-Damak, Muhammad Bin Altaf, Ali H. Shoeb, Hoi-Jun Yoo, Anantha P. Chandrakasan
2012	A*	`conf`	Approaching the theoretical limits of a mesh NoC with a 16-node chip prototype in 45nm SOI. DAC Sunghyun Park, Tushar Krishna, Chia-Hsin Owen Chen, Bhavya K. Daya, Anantha P. Chandrakasan, Li-Shiuan Peh
2012	J	`jnl`	Design and Analysis of a Hardware-Efficient Compressed Sensing Architecture for Data Compression in Wireless Sensors. IEEE J. Solid State Circuits Fred Chen, Anantha P. Chandrakasan, Vladimir Stojanovic
2012	J	`jnl`	Design of Low-Voltage Digital Building Blocks and ADCs for Energy-Efficient Systems. IEEE Trans. Circuits Syst. II Express Briefs Mahmut E. Sinangil, Marcus Yip, Masood Qazi, Rahul Rithe, Joyce Kwong, Anantha P. Chandrakasan
2012	J	`jnl`	Guest Editorial Emerging Circuits and Systems Techniques for Ultra-Low Power Body Sensor Networks. IEEE J. Emerg. Sel. Topics Circuits Syst. Benton H. Calhoun, Anantha P. Chandrakasan, Brian P. Otis, Naveen Verma, Hoi-Jun Yoo
2012	B	`conf`	Hardware-aware motion estimation search algorithm development for high-efficiency video coding (HEVC) standard. ICIP Mahmut E. Sinangil, Anantha P. Chandrakasan, Vivienne Sze, Minhua Zhou
2012	J	`jnl`	Joint Algorithm-Architecture Optimization of CABAC. J. Signal Process. Syst. Vivienne Sze, Anantha P. Chandrakasan
2012	B	`conf`	Memory cost vs. coding efficiency trade-offs for HEVC motion estimation engine. ICIP Mahmut E. Sinangil, Anantha P. Chandrakasan, Vivienne Sze, Minhua Zhou
2012	J	`jnl`	Platform Architecture for Solar, Thermal, and Vibration Energy Combining With MPPT and Single Inductor. IEEE J. Solid State Circuits Saurav Bandyopadhyay, Anantha P. Chandrakasan
2012	J	`jnl`	Quad Full-HD Transform Engine for Dual-Standard Low-Power Video Coding. IEEE J. Solid State Circuits Rahul Rithe, Chih-Chi Cheng, Anantha P. Chandrakasan
2012	A*	`conf`	Self-aware computing in the Angstrom processor. DAC Henry Hoffmann, Jim Holt, George Kurian, Eric Lau, Martina Maggio, Jason E. Miller, Sabrina M. Neuman, Mahmut E. Sinangil, Yildiz Sinangil, Anant Agarwal, Anantha P. Chandrakasan, Srinivas Devadas
2012	—	`conf`	Session 1 overview: Plenary session. ISSCC Anantha P. Chandrakasan, Hideto Hidaka
2012	J	`jnl`	The Effect of Random Dopant Fluctuations on Logic Timing at Low Voltage. IEEE Trans. Very Large Scale Integr. Syst. Rahul Rithe, Sharon Chou, Jie Gu, Alice Wang, Satyendra Datla, Gordon Gammie, Dennis Buss, Anantha P. Chandrakasan
2011	J	`jnl`	20 µ A to 100 mA DC-DC Converter With 2.8-4.2 V Battery Supply for Portable Applications in 45 nm CMOS. IEEE J. Solid State Circuits Saurav Bandyopadhyay, Yogesh K. Ramadass, Anantha P. Chandrakasan
2011	—	`conf`	20μA to 100mA DC-DC converter with 2.8 to 4.2V battery supply for portable applications in 45nm CMOS. ISSCC Saurav Bandyopadhyay, Yogesh K. Ramadass, Anantha P. Chandrakasan
2011	—	`conf`	A 10 pJ/cycle ultra-low-voltage 32-bit microprocessor system-on-chip. ESSCIRC Nathan Ickes, Yildiz Sinangil, Francesco Pappalardo, Elio Guidetti, Anantha P. Chandrakasan
2011	—	`conf`	A 12b 5-to-50MS/s 0.5-to-1V voltage scalable zero-crossing based pipelined ADC. ESSCIRC Sunghyuk Lee, Anantha P. Chandrakasan, Hae-Seung Lee
2011	—	`conf`	A 28nm 0.6V low-power DSP for mobile applications. ISSCC Gordon Gammie, Nathan Ickes, Mahmut E. Sinangil, Rahul Rithe, Jie Gu, Alice Wang, Hugh Mair, Satyendra Datla, Bing Rong, Sushma Honnavara Prasad, Lam Ho, Greg Baldwin, Dennis Buss, Anantha P. Chandrakasan, Uming Ko
2011	—	`conf`	A 28nm high-density 6T SRAM with optimized peripheral-assist circuits for operation down to 0.6V. ISSCC Mahmut E. Sinangil, Hugh Mair, Anantha P. Chandrakasan
2011	J	`jnl`	A 512kb 8T SRAM Macro Operating Down to 0.57 V With an AC-Coupled Sense Amplifier and Embedded Data-Retention-Voltage Sensor in 45 nm SOI CMOS. IEEE J. Solid State Circuits Masood Qazi, Kevin Stawiasz, Leland Chang, Anantha P. Chandrakasan
2011	J	`jnl`	A Battery-Less Thermoelectric Energy Harvesting Interface Circuit With 35 mV Startup Voltage. IEEE J. Solid State Circuits Yogesh K. Ramadass, Anantha P. Chandrakasan
2011	J	`jnl`	A Biomedical Sensor Interface With a sinc Filter and Interference Cancellation. IEEE J. Solid State Circuits Jose L. Bohorquez, Marcus Yip, Anantha P. Chandrakasan, Joel L. Dawson
2011	J	`jnl`	A Supply-Rail-Coupled eTextiles Transceiver for Body-Area Networks. IEEE J. Solid State Circuits Patrick P. Mercier, Anantha P. Chandrakasan
2011	—	`conf`	A highly parallel and scalable CABAC decoder for next generation video coding. ISSCC Vivienne Sze, Anantha P. Chandrakasan
2011	—	`conf`	A low-voltage 1Mb FeRAM in 0.13μm CMOS featuring time-to-digital sensing for expanded operating margin in scaled CMOS. ISSCC Masood Qazi, Michael Clinton, Steven Bartling, Anantha P. Chandrakasan
2011	—	`conf`	A resolution-reconfigurable 5-to-10b 0.4-to-1V power scalable SAR ADC. ISSCC Marcus Yip, Anantha P. Chandrakasan
2011	J	`jnl`	An Energy-Efficient Biomedical Signal Processing Platform. IEEE J. Solid State Circuits Joyce Kwong, Anantha P. Chandrakasan
2011	Misc	`conf`	Cell Library Characterization at Low Voltage Using Non-linear Operating Point Analysis of Local Variations. VLSI Design Rahul Rithe, Sharon Chou, Jie Gu, Alice Wang, Satyendra Datla, Gordon Gammie, Dennis Buss, Anantha P. Chandrakasan
2011	J	`jnl`	Challenges and Directions for Low-Voltage SRAM. IEEE Des. Test Comput. Masood Qazi, Mahmut E. Sinangil, Anantha P. Chandrakasan
2011	—	`conf`	Energy-Aware Hardware Implementation of Network Coding. Networking Workshops Georgios Angelopoulos, Muriel Médard, Anantha P. Chandrakasan
2011	Misc	`conf`	Joint algorithm-architecture optimization of CABAC to increase speed and reduce area cost. ICASSP Vivienne Sze, Anantha P. Chandrakasan
2011	—	`conf`	Quad Full-HD transform engine for dual-standard low-power video coding. A-SSCC Rahul Rithe, Chih-Chi Cheng, Anantha P. Chandrakasan
2011	J	`jnl`	Reduction of Variation-Induced Energy Overhead in Multi-Core Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Nigel Drego, Anantha P. Chandrakasan, Duane S. Boning, Devavrat Shah
2011	J	`jnl`	Zero-Crossing Detector Based Reconfigurable Analog System. IEEE J. Solid State Circuits Payam Lajevardi, Anantha P. Chandrakasan, Hae-Seung Lee
2010	—	`conf`	A 0.077 to 0.168 nJ/bit/iteration scalable 3GPP LTE turbo decoder with an adaptive sub-block parallel scheme and an embedded DVFS engine. CICC Chih-Chi Cheng, Yi-Min Tsai, Liang-Gee Chen, Anantha P. Chandrakasan
2010	—	`conf`	A 0.16mm ISSCC Yogesh K. Ramadass, Ayman A. Fayed, Baher Haroun, Anantha P. Chandrakasan
2010	—	`conf`	A 110µW 10Mb/s etextiles transceiver for body area networks with remote battery power. ISSCC Patrick P. Mercier, Anantha P. Chandrakasan
2010	—	`conf`	A 512kb 8T SRAM macro operating down to 0.57V with an AC-coupled sense amplifier and embedded data-retention-voltage sensor in 45nm SOI CMOS. ISSCC Masood Qazi, Kevin Stawiasz, Leland Chang, Anantha P. Chandrakasan
2010	J	`jnl`	A Fully-Integrated Switched-Capacitor Step-Down DC-DC Converter With Digital Capacitance Modulation in 45 nm CMOS. IEEE J. Solid State Circuits Yogesh K. Ramadass, Ayman A. Fayed, Anantha P. Chandrakasan
2010	J	`jnl`	A Low-Voltage Energy-Sampling IR-UWB Digital Baseband Employing Quadratic Correlation. IEEE J. Solid State Circuits Patrick P. Mercier, Manish Bhardwaj, Denis C. Daly, Anantha P. Chandrakasan
2010	J	`jnl`	A Micro-Power EEG Acquisition SoC With Integrated Feature Extraction Processor for a Chronic Seizure Detection System. IEEE J. Solid State Circuits Naveen Verma, Ali H. Shoeb, Jose L. Bohorquez, Joel L. Dawson, John V. Guttag, Anantha P. Chandrakasan
2010	J	`jnl`	A Pulsed UWB Receiver SoC for Insect Motion Control. IEEE J. Solid State Circuits Denis C. Daly, Patrick P. Mercier, Manish Bhardwaj, Alice L. Stone, Zane N. Aldworth, Thomas L. Daniel, Joel Voldman, John G. Hildebrand, Anantha P. Chandrakasan
2010	—	`conf`	A batteryless thermoelectric energy-harvesting interface circuit with 35mV startup voltage. ISSCC Yogesh K. Ramadass, Anantha P. Chandrakasan
2010	—	`conf`	A low-power area-efficient switching scheme for charge-sharing DACs in SAR ADCs. CICC Fred Chen, Anantha P. Chandrakasan, Vladimir Stojanovic
2010	—	`conf`	A signal-agnostic compressed sensing acquisition system for wireless and implantable sensors. CICC Fred Chen, Anantha P. Chandrakasan, Vladimir Stojanovic
2010	J	`jnl`	All-Digital Circuits for Measurement of Spatial Variation in Digital Circuits. IEEE J. Solid State Circuits Nigel Drego, Anantha P. Chandrakasan, Duane S. Boning
2010	J	`jnl`	An Efficient Piezoelectric Energy Harvesting Interface Circuit Using a Bias-Flip Rectifier and Shared Inductor. IEEE J. Solid State Circuits Yogesh K. Ramadass, Anantha P. Chandrakasan
2010	—	`conf`	An energy-efficient biomedical signal processing platform. ESSCIRC Joyce Kwong, Anantha P. Chandrakasan
2010	A	`conf`	Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis. DATE Masood Qazi, Mehul Tikekar, Lara Dolecek, Devavrat Shah, Anantha P. Chandrakasan
2010	A	`conf`	Non-linear Operating Point Statistical Analysis for Local Variations in logic timing at low voltage. DATE Rahul Rithe, Jie Gu, Alice Wang, Satyendra Datla, Gordon Gammie, Dennis Buss, Anantha P. Chandrakasan
2010	J	`jnl`	Technologies for Ultradynamic Voltage Scaling. Proc. IEEE Anantha P. Chandrakasan, Denis C. Daly, Daniel F. Finchelstein, Joyce Kwong, Yogesh K. Ramadass, Mahmut E. Sinangil, Vivienne Sze, Naveen Verma
2009	—	`conf`	A 0.55V 16Mb/s 1.6mW non-coherent IR-UWB digital baseband with ±1ns synchronization accuracy. ISSCC Patrick P. Mercier, Manish Bhardwaj, Denis C. Daly, Anantha P. Chandrakasan
2009	J	`jnl`	A 0.7-V 1.8-mW H.264/AVC 720p Video Decoder. IEEE J. Solid State Circuits Vivienne Sze, Daniel F. Finchelstein, Mahmut E. Sinangil, Anantha P. Chandrakasan
2009	J	`jnl`	A 32-µW 1.83-kS/s Carbon Nanotube Chemical Sensor System. IEEE J. Solid State Circuits Taeg Sang Cho, Kyeong-Jae Lee, Jing Kong, Anantha P. Chandrakasan
2009	J	`jnl`	A 350 µW CMOS MSK Transmitter and 400 µW OOK Super-Regenerative Receiver for Medical Implant Communications. IEEE J. Solid State Circuits Jose L. Bohorquez, Anantha P. Chandrakasan, Joel L. Dawson
2009	J	`jnl`	A 6-bit, 0.2 V to 0.9 V Highly Digital Flash ADC With Comparator Redundancy. IEEE J. Solid State Circuits Denis C. Daly, Anantha P. Chandrakasan
2009	J	`jnl`	A 65 nm Sub-V IEEE J. Solid State Circuits Joyce Kwong, Yogesh K. Ramadass, Naveen Verma, Anantha P. Chandrakasan
2009	J	`jnl`	A High-Density 45 nm SRAM Using Small-Signal Non-Strobed Regenerative Sensing. IEEE J. Solid State Circuits Naveen Verma, Anantha P. Chandrakasan
2009	J	`jnl`	A Reconfigurable 8T Ultra-Dynamic Voltage Scalable (U-DVS) SRAM in 65 nm CMOS. IEEE J. Solid State Circuits Mahmut E. Sinangil, Naveen Verma, Anantha P. Chandrakasan
2009	B	`conf`	A high throughput CABAC algorithm using syntax element partitioning. ICIP Vivienne Sze, Anantha P. Chandrakasan
2009	—	`conf`	A pulsed UWB receiver SoC for insect motion control. ISSCC Denis C. Daly, Patrick P. Mercier, Manish Bhardwaj, Alice L. Stone, Joel Voldman, Richard B. Levine, John G. Hildebrand, Anantha P. Chandrakasan
2009	J	`jnl`	An Energy-Efficient All-Digital UWB Transmitter Employing Dual Capacitively-Coupled Pulse-Shaping Drivers. IEEE J. Solid State Circuits Patrick P. Mercier, Denis C. Daly, Anantha P. Chandrakasan
2009	—	`conf`	An efficient piezoelectric energy-harvesting interface circuit using a bias-flip rectifier and shared inductor. ISSCC Yogesh K. Ramadass, Anantha P. Chandrakasan
2009	—	`conf`	An oscilloscope array for high-impedance device characterization. ESSCIRC Fred Chen, Anantha P. Chandrakasan, Vladimir Stojanovic
2009	J	`jnl`	Low-Power Impulse UWB Architectures and Circuits. Proc. IEEE Anantha P. Chandrakasan, Fred S. Lee, David D. Wentzloff, Vivienne Sze, Brian P. Ginsburg, Patrick P. Mercier, Denis C. Daly, Raúl Blázquez
2009	J	`jnl`	Multicore Processing and Efficient On-Chip Caching for H.264 and Future Video Decoders. IEEE Trans. Circuits Syst. Video Technol. Daniel F. Finchelstein, Vivienne Sze, Anantha P. Chandrakasan
2009	—	`conf`	Next generation energy scavenging systems. ISSCC Anantha P. Chandrakasan
2008	J	`jnl`	A 256 kb 65 nm 8T Subthreshold SRAM Employing Sense-Amplifier Redundancy. IEEE J. Solid State Circuits Naveen Verma, Anantha P. Chandrakasan
2008	—	`conf`	A 65nm Sub-Vt Microcontroller with Integrated SRAM and Switched-Capacitor DC-DC Converter. ISSCC Joyce Kwong, Yogesh K. Ramadass, Naveen Verma, Markus Koesler, Korbinian Huber, Hans Moormann, Anantha P. Chandrakasan
2008	—	`conf`	A 6b 0.2-to-0.9V Highly Digital Flash ADC with Comparator Redundancy. ISSCC Denis C. Daly, Anantha P. Chandrakasan
2008	—	`conf`	A High-Density 45nm SRAM Using Small-Signal Non-Strobed Regenerative Sensing. ISSCC Naveen Verma, Anantha P. Chandrakasan
2008	—	`conf`	A reconfigurable 65nm SRAM achieving voltage scalability from 0.25-1.2V and performance scalability from 20kHz-200MHz. ESSCIRC Mahmut E. Sinangil, Naveen Verma, Anantha P. Chandrakasan
2008	A	`conf`	Breaking the simulation barrier: SRAM evaluation through norm minimization. ICCAD Lara Dolecek, Masood Qazi, Devavrat Shah, Anantha P. Chandrakasan
2008	J	`jnl`	Highly Interleaved 5-bit, 250-MSample/s, 1.2-mW ADC With Redundant Channels in 65-nm CMOS. IEEE J. Solid State Circuits Brian P. Ginsburg, Anantha P. Chandrakasan
2008	—	`conf`	Highly Interleaved 5b 250MS/s ADC with Redundant Channels in 65nm CMOS. ISSCC Brian P. Ginsburg, Anantha P. Chandrakasan
2008	J	`jnl`	Minimum Energy Tracking Loop With Embedded DC-DC Converter Enabling Ultra-Low-Voltage Operation Down to 250 mV in 65 nm CMOS. IEEE J. Solid State Circuits Yogesh K. Ramadass, Anantha P. Chandrakasan
2008	B	`conf`	Parallel CABAC for low power video coding. ICIP Vivienne Sze, Anantha P. Chandrakasan, Madhukar Budagavi, Minhua Zhou
2008	A*	`conf`	The design of a low power carbon nanotube chemical sensor system. DAC Taeg Sang Cho, Kyeong-Jae Lee, Jing Kong, Anantha P. Chandrakasan
2008	A*	`conf`	The mixed signal optimum energy point: voltage and parallelism. DAC Brian P. Ginsburg, Anantha P. Chandrakasan
2008	J	`jnl`	Traceback-Based Optimizations for Maximum a Posteriori Decoding Algorithms. J. Signal Process. Syst. Curt Schurgers, Anantha P. Chandrakasan
2008	C	`conf`	Ultra-low-power UWB for sensor network applications. ISCAS Patrick P. Mercier, Denis C. Daly, Manish Bhardwaj, David D. Wentzloff, Fred S. Lee, Anantha P. Chandrakasan
2007	J	`jnl`	500-MS/s 5-bit ADC in 65-nm CMOS With Split Capacitor Array DAC. IEEE J. Solid State Circuits Brian P. Ginsburg, Anantha P. Chandrakasan
2007	A	`conf`	A 0.4-V UWB baseband processor. ISLPED Vivienne Sze, Anantha P. Chandrakasan
2007	J	`jnl`	A 2.5 nJ/bit 0.65 V Pulsed UWB Receiver in 90 nm CMOS. IEEE J. Solid State Circuits Fred S. Lee, Anantha P. Chandrakasan
2007	—	`conf`	A 2.5nJ/b 0.65V 3-to-5GHz Subbanded UWB Receiver in 90nm CMOS. ISSCC Fred S. Lee, Anantha P. Chandrakasan
2007	J	`jnl`	A 256-kb 65-nm Sub-threshold SRAM Design for Ultra-Low-Voltage Operation. IEEE J. Solid State Circuits Benton H. Calhoun, Anantha P. Chandrakasan
2007	—	`conf`	A 47pJ/pulse 3.1-to-5GHz All-Digital UWB Transmitter in 90nm CMOS. ISSCC David D. Wentzloff, Anantha P. Chandrakasan
2007	—	`conf`	A 65nm 8T Sub-Vt SRAM Employing Sense-Amplifier Redundancy. ISSCC Naveen Verma, Anantha P. Chandrakasan
2007	—	`conf`	A Low Power Carbon Nanotube Chemical Sensor System. CICC Taeg Sang Cho, Kyeong-Jae Lee, Jing Kong, Anantha P. Chandrakasan
2007	—	`conf`	A Test-Structure to Efficiently Study Threshold-Voltage Variation in Large MOSFET Arrays. ISQED Nigel Drego, Anantha P. Chandrakasan, Duane S. Boning
2007	J	`jnl`	An Energy-Efficient OOK Transceiver for Wireless Sensor Networks. IEEE J. Solid State Circuits Denis C. Daly, Anantha P. Chandrakasan
2007	J	`jnl`	An Ultra Low Energy 12-bit Rate-Resolution Scalable SAR ADC for Wireless Sensor Nodes. IEEE J. Solid State Circuits Naveen Verma, Anantha P. Chandrakasan
2007	—	`conf`	Delay-Based BPSK for Pulsed-UWB Communication. ICASSP (3) David D. Wentzloff, Anantha P. Chandrakasan
2007	J	`jnl`	Direct Conversion Pulsed UWB Transceiver Architecture CoRR Raúl Blázquez, Fred S. Lee, David D. Wentzloff, Brian P. Ginsburg, Johnna Powell, Anantha P. Chandrakasan
2007	J	`jnl`	Dual Time-Interleaved Successive Approximation Register ADCs for an Ultra-Wideband Receiver. IEEE J. Solid State Circuits Brian P. Ginsburg, Anantha P. Chandrakasan
2007	J	`jnl`	Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives CoRR Bruno Bougard, Francky Catthoor, Denis C. Daly, Anantha P. Chandrakasan, Wim Dehaene
2007	—	`conf`	Minimum Energy Tracking Loop with Embedded DC-DC Converter Delivering Voltages down to 250mV in 65nm CMOS. ISSCC Yogesh K. Ramadass, Anantha P. Chandrakasan
2007	—	`conf`	Scaling and evaluation of carbon nanotube interconnects for VLSI applications. Nano-Net Fred Chen, Ajay Joshi, Vladimir Stojanovic, Anantha P. Chandrakasan
2006	—	`conf`	A 256kb Sub-threshold SRAM in 65nm CMOS. ISSCC Benton H. Calhoun, Anantha P. Chandrakasan
2006	—	`conf`	A 25µW 100kS/s 12b ADC for wireless micro-sensor applications. ISSCC Naveen Verma, Anantha P. Chandrakasan
2006	J	`jnl`	A BiCMOS Ultra-Wideband 3.1-10.6-GHz Front-End. IEEE J. Solid State Circuits Fred S. Lee, Anantha P. Chandrakasan
2006	J	`jnl`	A Highly Integrated CMOS Analog Baseband Transceiver With 180 MSPS 13-bit Pipelined CMOS ADC and Dual 12-bit DACs. IEEE J. Solid State Circuits Kush Gulati, Mark Peng, Anurag Pulincherry, Carlos E. Muñoz, Mike Lugin, Alex R. Bugeja, Jipeng Li, Anantha P. Chandrakasan
2006	—	`conf`	An Energy Efficient Sub-Threshold Baseband Processor Architecture for Pulsed Ultra-Wideband Communications. ICASSP (3) Vivienne Sze, Raúl Blázquez, Manish Bhardwaj, Anantha P. Chandrakasan
2006	J	`jnl`	Static noise margin variation for sub-threshold SRAM in 65-nm CMOS. IEEE J. Solid State Circuits Benton H. Calhoun, Anantha P. Chandrakasan
2006	—	`book`	Sub-threshold Design for Ultra Low-Power Systems Alice Wang, Benton H. Calhoun, Anantha P. Chandrakasan
2006	A	`conf`	Sub-threshold design: the challenges of minimizing circuit energy. ISLPED Benton H. Calhoun, Alice Wang, Naveen Verma, Anantha P. Chandrakasan
2006	J	`jnl`	Ultra-dynamic Voltage scaling (UDVS) using sub-threshold operation and local Voltage dithering. IEEE J. Solid State Circuits Benton H. Calhoun, Anantha P. Chandrakasan
2006	A	`conf`	Variation-driven device sizing for minimum energy sub-threshold circuits. ISLPED Joyce Kwong, Anantha P. Chandrakasan
2005	J	`jnl`	A 180-mV subthreshold FFT processor using a minimum energy design methodology. IEEE J. Solid State Circuits Alice Wang, Anantha P. Chandrakasan
2005	—	`conf`	A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool. SLIP Young-Su Kwon, Payam Lajevardi, Anantha P. Chandrakasan, Frank Honoré, Donald E. Troxel
2005	—	`conf`	A BiCMOS ultra-wideband 3.1-10.6GHz front-end. CICC Fred S. Lee, Anantha P. Chandrakasan
2005	J	`jnl`	A baseband processor for impulse ultra-wideband communications. IEEE J. Solid State Circuits Raúl Blázquez, Puneet P. Newaskar, Fred S. Lee, Anantha P. Chandrakasan
2005	—	`conf`	A highly-integrated CMOS analog baseband transceiver with 180MSPS 13b pipelined CMOS ADC and dual 12b DACs. CICC Kush Gulati, Mark Peng, Anurag Pulincherry, Carlos E. Muñoz, Mike Lugin, Alex R. Bugeja, Jipeng Li, Anantha P. Chandrakasan
2005	J	`jnl`	A/D Precision Requirements for Digital Ultra-Wideband Radio Receivers. J. VLSI Signal Process. Puneet P. Newaskar, Raúl Blázquez, Anantha P. Chandrakasan
2005	—	`conf`	An energy-efficient charge recycling approach for a SAR converter with capacitive DAC. ISCAS (1) Brian P. Ginsburg, Anantha P. Chandrakasan
2005	—	`conf`	Analyzing static noise margin for sub-threshold SRAM in 65nm CMOS. ESSCIRC Benton H. Calhoun, Anantha P. Chandrakasan
2005	—	`conf`	Architectures for energy-aware impulse UWB communications. ICASSP (5) Raúl Blázquez, Anantha P. Chandrakasan
2005	J	`jnl`	DSPs for energy harvesting sensors: applications and architectures. IEEE Pervasive Comput. Rajeevan Amirtharajah, Jamie Collier, Jeff Siebert, Bicky Zhou, Anantha P. Chandrakasan
2005	J	`jnl`	Design Considerations for Ultra-Low Energy Wireless Microsensor Nodes. IEEE Trans. Computers Benton H. Calhoun, Denis C. Daly, Naveen Verma, Daniel F. Finchelstein, David D. Wentzloff, Alice Wang, Seong-Hwan Cho, Anantha P. Chandrakasan
2005	A	`conf`	Direct Conversion Pulsed UWB Transceiver Architecture. DATE Raúl Blázquez, Fred S. Lee, David D. Wentzloff, Brian P. Ginsburg, Johnna Powell, Anantha P. Chandrakasan
2005	—	`conf`	Dual scalable 500MS/s, 5b time-interleaved SAR ADCs for UWB applications. CICC Brian P. Ginsburg, Anantha P. Chandrakasan
2005	A	`conf`	Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives. DATE Bruno Bougard, Francky Catthoor, Denis C. Daly, Anantha P. Chandrakasan, Wim Dehaene
2005	J	`jnl`	Introduction to the Special Issue on the ISSCC2004. IEEE J. Solid State Circuits Georgios K. Konstadinidis, Anantha P. Chandrakasan, Sreedhar Natarajan, Thucydides Xanthopoulos
2005	J	`jnl`	Modeling and sizing for minimum energy operation in subthreshold circuits. IEEE J. Solid State Circuits Benton H. Calhoun, Alice Wang, Anantha P. Chandrakasan
2005	—	`conf`	Substrate noise analysis and experimental verification for the efficient noise prediction of a digital PLL. CICC Nisha Checka, Anantha P. Chandrakasan, Rafael Reif
2005	J	`jnl`	System design considerations for ultra-wideband communication. IEEE Commun. Mag. David D. Wentzloff, Raúl Blázquez, Fred S. Lee, Brian P. Ginsburg, Johnna Powell, Anantha P. Chandrakasan
2004	—	`conf`	A baseband processor for pulsed ultra-wideband signals. CICC Raúl Blázquez, Puneet P. Newaskar, Fred S. Lee, Anantha P. Chandrakasan
2004	J	`jnl`	A leakage reduction methodology for distributed MTCMOS. IEEE J. Solid State Circuits Benton H. Calhoun, Frank Honoré, Anantha P. Chandrakasan
2004	J	`jnl`	A micropower programmable DSP using approximate signal processing based on distributed arithmetic. IEEE J. Solid State Circuits Rajeevan Amirtharajah, Anantha P. Chandrakasan
2004	J	`jnl`	Calibration of Rent's rule models for three-dimensional integrated circuits. IEEE Trans. Very Large Scale Integr. Syst. Shamik Das, Anantha P. Chandrakasan, Rafael Reif
2004	A	`conf`	Characterizing and modeling minimum energy operation for subthreshold circuits. ISLPED Benton H. Calhoun, Anantha P. Chandrakasan
2004	J	`jnl`	Design Considerations for Energy-Efficient Radios in Wireless Microsensor Networks. J. VLSI Signal Process. Eugene Shih, Seong-Hwan Cho, Fred S. Lee, Benton H. Calhoun, Anantha P. Chandrakasan
2004	Misc	`conf`	Design Considerations for Next Generation Wireless Power-Aware Microsensor Nodes. VLSI Design David D. Wentzloff, Benton H. Calhoun, Rex Min, Alice Wang, Nathan Ickes, Anantha P. Chandrakasan
2004	—	`conf`	Device sizing for minimum energy operation in subthreshold circuits. CICC Benton H. Calhoun, Alice Wang, Anantha P. Chandrakasan
2004	—	`ch.`	Dynamic Power Management in Sensor Networks. Handbook of Sensor Networks Anantha P. Chandrakasan, Amit Sinha
2004	J	`jnl`	Full-chip subthreshold leakage power prediction and reduction techniques for sub-0.18-μm CMOS. IEEE J. Solid State Circuits Siva G. Narendra, Vivek De, Shekhar Borkar, Dimitri A. Antoniadis, Anantha P. Chandrakasan
2004	J	`jnl`	Standby power reduction using dynamic voltage scaling and canary flip-flop structures. IEEE J. Solid State Circuits Benton H. Calhoun, Anantha P. Chandrakasan
2004	—	`conf`	Timing, energy, and thermal performance of three-dimensional integrated circuits. ACM Great Lakes Symposium on VLSI Shamik Das, Anantha P. Chandrakasan, Rafael Reif
2004	—	`conf`	Traceback-enhanced MAP decoding algorithm. ICASSP (4) Curt Schurgers, Anantha P. Chandrakasan
2003	—	`conf`	Coarse acquisition for ultra wideband digital receivers. ICASSP (4) Raúl Blázquez, Puneet P. Newaskar, Anantha P. Chandrakasan
2003	A	`conf`	Design methodology for fine-grained leakage control in MTCMOS. ISLPED Benton H. Calhoun, Frank Honoré, Anantha P. Chandrakasan
2003	—	`conf`	Design tools for 3-D integrated circuits. ASP-DAC Shamik Das, Anantha P. Chandrakasan, Rafael Reif
2003	J	`jnl`	Energy reduction in VLSI computation modules: an information-theoretic approach. IEEE Trans. Inf. Theory Paul-Peter Sotiriadis, Vahid Tarokh, Anantha P. Chandrakasan
2003	A	`conf`	Energy-aware architectures for a real-valued FFT implementation. ISLPED Alice Wang, Anantha P. Chandrakasan
2003	J	`jnl`	Instruction level and operating system profiling for energy exposed software. IEEE Trans. Very Large Scale Integr. Syst. Amit Sinha, Nathan Ickes, Anantha P. Chandrakasan
2003	J	`jnl`	MobiCom poster: top five myths about the energy consumption of wireless communication. ACM SIGMOBILE Mob. Comput. Commun. Rev. Rex Min, Anantha P. Chandrakasan
2003	A	`conf`	Power-aware architectures and circuits for FPGA-based signal processing. FPGA Frank Honoré, Benton H. Calhoun, Anantha P. Chandrakasan
2003	A	`conf`	Scaling into Ambient Intelligence. DATE Twan Basten, Luca Benini, Anantha P. Chandrakasan, Menno Lindwer, Jie Liu, Rex Min, Feng Zhao
2003	—	`conf`	Standby voltage scaling for reduced power. CICC Benton H. Calhoun, Anantha P. Chandrakasan
2003	—	`conf`	Three-Dimensional Integrated Circuits: Performance, Design Methodology, and CAD Tools. ISVLSI Shamik Das, Anantha P. Chandrakasan, Rafael Reif
2003	J	`jnl`	Wiring requirement and three-dimensional integration technology for field programmable gate arrays. IEEE Trans. Very Large Scale Integr. Syst. Arifur Rahman, Shamik Das, Anantha P. Chandrakasan, Rafael Reif
2002	J	`jnl`	A 175-MV multiply-accumulate unit using an adaptive supply voltage and body bias architecture. IEEE J. Solid State Circuits James T. Kao, Masayuki Miyazaki, Anantha P. Chandrakasan
2002	J	`jnl`	A bus energy model for deep submicron technology. IEEE Trans. Very Large Scale Integr. Syst. Paul-Peter Sotiriadis, Anantha P. Chandrakasan
2002	A	`conf`	A framework for energy-scalable communication in high-density wireless networks. ISLPED Rex Min, Anantha P. Chandrakasan
2002	J	`jnl`	Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage. IEEE J. Solid State Circuits James W. Tschanz, James T. Kao, Siva G. Narendra, Raj Nair, Dimitri A. Antoniadis, Anantha P. Chandrakasan, Vivek De
2002	J	`jnl`	An application-specific protocol architecture for wireless microsensor networks. IEEE Trans. Wirel. Commun. Wendi B. Heinzelman, Anantha P. Chandrakasan, Hari Balakrishnan
2002	A*	`conf`	Bounding the Lifetime of Sensor Networks Via Optimal Role Assignments. INFOCOM Manish Bhardwaj, Anantha P. Chandrakasan
2002	J	`jnl`	Energy scalable system design. IEEE Trans. Very Large Scale Integr. Syst. Amit Sinha, Alice Wang, Anantha P. Chandrakasan
2002	J	`jnl`	Energy-centric enabling tecumologies for wireless sensor networks. IEEE Wirel. Commun. Rex Min, Manish Bhardwaj, Seong-Hwan Cho, Nathan Ickes, Eugene Shih, Amit Sinha, Alice Wang, Anantha P. Chandrakasan
2002	J	`jnl`	Energy-efficient DSPs for wireless sensor networks. IEEE Signal Process. Mag. Alice Wang, Anantha P. Chandrakasan
2002	A	`conf`	Full-chip sub-threshold leakage power prediction model for sub-0.18 µm CMOS. ISLPED Siva G. Narendra, Vivek De, Shekhar Borkar, Dimitri A. Antoniadis, Anantha P. Chandrakasan
2002	—	`conf`	Maximum achievable energy reduction using coding with applications to deep sub-micron buses. ISCAS (1) Paul-Peter Sotiriadis, Anantha P. Chandrakasan, Vahid Tarokh
2002	—	`conf`	Optimal Supply and Threshold Scaling for Subthreshold CMOS Circuits. ISVLSI Alice Wang, Anantha P. Chandrakasan, Stephen V. Kosonocky
2002	J	`jnl`	Power Estimation and Power Optimal Communication in Deep Submicron Buses: Analytical Models and Statistical Measures. J. Circuits Syst. Comput. Paul-Peter Sotiriadis, Anantha P. Chandrakasan
2002	A	`conf`	Subthreshold leakage modeling and reduction techniques. ICCAD James T. Kao, Siva G. Narendra, Anantha P. Chandrakasan
2001	J	`jnl`	An energy-efficient reconfigurable public-key cryptography processor. IEEE J. Solid State Circuits James Goodman, Anantha P. Chandrakasan
2001	A	`conf`	Analysis and implementation of charge recycling for deep sub-micron buses. ISLPED Paul-Peter Sotiriadis, Theodoros Konstantakopoulos, Anantha P. Chandrakasan
2001	—	`conf`	Design of a power-scalable digital least-means-square adaptive filter. ISSPA CheeWe Ng, Anantha P. Chandrakasan
2001	J	`jnl`	Dynamic Power Management in Wireless Sensor Networks. IEEE Des. Test Comput. Amit Sinha, Anantha P. Chandrakasan
2001	Misc	`conf`	Dynamic Voltage Scheduling Using Adaptive Filtering of Workload Traces. VLSI Design Amit Sinha, Anantha P. Chandrakasan
2001	A	`conf`	Energy Efficient Real-Time Scheduling. ICCAD Amit Sinha, Anantha P. Chandrakasan
2001	A	`conf`	Energy efficient Modulation and MAC for Asymmetric RF Microsensor Systems. ISLPED Andrew Y. Wang, Seong-Hwan Cho, Charles G. Sodini, Anantha P. Chandrakasan
2001	Misc	`conf`	Energy efficient protocols for low duty cycle wireless microsensor networks. ICASSP Seong-Hwan Cho, Anantha P. Chandrakasan
2001	Misc	`conf`	Energy efficient system partitioning for distributed wireless sensor networks. ICASSP Alice Wang, Anantha P. Chandrakasan
2001	J	`jnl`	Energy-Scalable Protocols for Battery-Operated MicroSensor Networks. J. VLSI Signal Process. Alice Wang, Wendi B. Heinzelman, Amit Sinha, Anantha P. Chandrakasan
2001	A*	`conf`	JouleTrack - A Web Based Tool for Software Energy Profiling. DAC Amit Sinha, Anantha P. Chandrakasan
2001	Misc	`conf`	Low-Power Wireless Sensor Networks. VLSI Design Rex Min, Manish Bhardwaj, Seong-Hwan Cho, Eugene Shih, Amit Sinha, Alice Wang, Anantha P. Chandrakasan
2001	B	`conf`	Operating System and Algorithmic Techniques for Energy Scalable Wireless Sensor Networks. Mobile Data Management Amit Sinha, Anantha P. Chandrakasan
2001	A*	`conf`	Physical layer driven protocol and algorithm design for energy-efficient wireless sensor networks. MobiCom Eugene Shih, Seong-Hwan Cho, Nathan Ickes, Rex Min, Amit Sinha, Alice Wang, Anantha P. Chandrakasan
2001	J	`jnl`	Quantifying and enhancing power awareness of VLSI systems. IEEE Trans. Very Large Scale Integr. Syst. Manish Bhardwaj, Rex Min, Anantha P. Chandrakasan
2001	—	`conf`	Reducing bus delay in submicron technology using coding. ASP-DAC Paul-Peter Sotiriadis, Anantha P. Chandrakasan
2001	A	`conf`	Scaling of stack effect and its application for leakage reduction. ISLPED Siva G. Narendra, Vivek De, Dimitri A. Antoniadis, Anantha P. Chandrakasan, Shekhar Borkar
2001	—	`conf`	Upper bounds on the lifetime of sensor networks. ICC Manish Bhardwaj, Timothy Garnett, Anantha P. Chandrakasan
2001	J	`jnl`	Vibration-to-electric energy conversion. IEEE Trans. Very Large Scale Integr. Syst. Scott E. Meninger, José Oscar Mur-Miranda, Rajeevan Amirtharajah, Anantha P. Chandrakasan, Jeffrey H. Lang
2001	—	`conf`	Wiring requirement and three-dimensional integration of field-programmable gate arrays. SLIP Arifur Rahman, Shamik Das, Anantha P. Chandrakasan, Rafael Reif
2000	J	`jnl`	A low-power DCT core using adaptive bitwidth and arithmetic activity exploiting signal correlations and quantization. IEEE J. Solid State Circuits Thucydides Xanthopoulos, Anantha P. Chandrakasan
2000	A*	`conf`	A methodology for modeling the effects of systematic within-die interconnect and device variation on circuit performance. DAC Vikas Mehrotra, Shiou Lin Sam, Duane S. Boning, Anantha P. Chandrakasan, Rakesh Vallishayee, Sani R. Nassif
2000	J	`jnl`	Active GHz clock network using distributed PLLs. IEEE J. Solid State Circuits Vadim Gutnik, Anantha P. Chandrakasan
2000	A	`conf`	Algorithmic transforms for efficient energy scalable computation. ISLPED Amit Sinha, Alice Wang, Anantha P. Chandrakasan
2000	A	`conf`	An Energy Efficient Reconfigurable Public-Key Cryptograhpy Processor Architecture. CHES James Goodman, Anantha P. Chandrakasan
2000	J	`jnl`	An ultra low power adaptive wavelet video encoder with integrated memory. IEEE J. Solid State Circuits Thomas Simon, Anantha P. Chandrakasan
2000	A	`conf`	Bus Energy Minimization by Transition Pattern Coding (TPC) in Deep Submicron Technologies. ICCAD Paul-Peter Sotiriadis, Anantha P. Chandrakasan
2000	J	`jnl`	Dual-threshold voltage techniques for low-power digital circuits. IEEE J. Solid State Circuits James T. Kao, Anantha P. Chandrakasan
2000	Misc	`conf`	Energy Aware Software. VLSI Design Amit Sinha, Anantha P. Chandrakasan
2000	—	`conf`	Energy-Efficient Communication Protocol for Wireless Microsensor Networks. HICSS Wendi Rabiner Heinzelman, Anantha P. Chandrakasan, Hari Balakrishnan
2000	Misc	`conf`	Energy-scalable algorithms and protocols for wireless microsensor networks. ICASSP Wendi Rabiner Heinzelman, Amit Sinha, Alice Wang, Anantha P. Chandrakasan
2000	J	`jnl`	High-efficiency multiple-output DC-DC conversion for low-voltage systems. IEEE Trans. Very Large Scale Integr. Syst. Abram P. Dancy, Rajeevan Amirtharajah, Anantha P. Chandrakasan
2000	—	`conf`	Low power bus coding techniques considering inter-wire capacitances. CICC Paul P. Sotiriadis, Anantha P. Chandrakasan
2000	C	`conf`	OpenDesign: An Open User-Configurable Project Environment for Collaborative Design and Execution on the Internet. ICCD Hemang Lavana, Franc Brglez, Robert B. Reese, Gangadhar Konduri, Anantha P. Chandrakasan
2000	J	`jnl`	Special issue on low-power RF systems. Proc. IEEE Anantha P. Chandrakasan
1999	A*	`conf`	A Framework for Collaborative and Distributed Web-Based Design. DAC Gangadhar Konduri, Anantha P. Chandrakasan
1999	Misc	`conf`	A Low-Power Wireless Camera System. VLSI Design Anantha P. Chandrakasan, Abram P. Dancy, James Goodman, Thomas Simon
1999	J	`jnl`	A low power variable length decoder for MPEG-2 based on nonuniform fine-grain table partitioning. IEEE Trans. Very Large Scale Integr. Syst. Seong-Hwan Cho, Thucydides Xanthopoulos, Anantha P. Chandrakasan
1999	J	`jnl`	A low-power IDCT macrocell for MPEG-2 MP@ML exploiting data distribution properties for minimal activity. IEEE J. Solid State Circuits Thucydides Xanthopoulos, Anantha P. Chandrakasan
1999	A*	`conf`	Design and Implementation of a Scalable Encryption Processor with Embedded Variable DC/DC Converter. DAC James Goodman, Anantha P. Chandrakasan, Abram P. Dancy
1999	—	`conf`	Design considerations for distributed microsensor systems. CICC Anantha P. Chandrakasan, Raj Amirtharajah, Seong-Hwan Cho, James Goodman, Gangadhar Konduri, Joanna Kulik, W. Rabiner, Alice Wang
1999	—	`conf`	Energy efficient software through dynamic voltage scheduling. ISCAS (1) Gangadhar Konduri, James Goodman, Anantha P. Chandrakasan
1999	A	`conf`	Power scalable processing using distributed arithmetic. ISLPED Rajeevan Amirtharajah, Thucydides Xanthopoulos, Anantha P. Chandrakasan
1999	A	`conf`	Vibration-to-electric energy conversion. ISLPED Scott E. Meninger, José Oscar Mur-Miranda, Rajeevan Amirtharajah, Anantha P. Chandrakasan, Jeffrey H. Lang
1998	J	`jnl`	A low power, low bandwidth protocol for remote wireless terminals. Wirel. Networks George Hadjiyiannis, Anantha P. Chandrakasan, Srinivas Devadas
1998	A	`conf`	A reconfigurable dual output low power digital PWM power converter. ISLPED Abram P. Dancy, Anantha P. Chandrakasan
1998	J	`jnl`	An energy/security scalable encryption processor using an embedded variable voltage DC/DC converter. IEEE J. Solid State Circuits James Goodman, Abram P. Dancy, Anantha P. Chandrakasan
1998	—	`conf`	An ultra low power variable length decoder for MPEG-2 exploiting codeword distribution. CICC Seong-Hwan Cho, Thucydides Xanthopoulos, Anantha P. Chandrakasan
1998	J	`jnl`	Low power scalable encryption for wireless systems. Wirel. Networks James Goodman, Anantha P. Chandrakasan
1998	A*	`conf`	MTCMOS Hierarchical Sizing Based on Mutual Exclusive Discharge Patterns. DAC James T. Kao, Siva G. Narendra, Anantha P. Chandrakasan
1998	A	`ed.`	Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998, Monterey, California, USA, August 10-12, 1998 ISLPED Anantha P. Chandrakasan, Sayfe Kiaei
1998	J	`jnl`	Self-powered signal processing using vibration-based power generation. IEEE J. Solid State Circuits Rajeevan Amirtharajah, Anantha P. Chandrakasan
1998	J	`jnl`	Special Section on Low-Power Electronics and Design. IEEE Trans. Very Large Scale Integr. Syst. Anantha P. Chandrakasan, Edwin Hsing-Mean Sha
1998	Misc	`conf`	Web-based Distributed VLSI Design. VLSI Design Debashis Saha, Anantha P. Chandrakasan
1997	C	`conf`	A Framework for Distributed Web-based Microsystem Design. WETICE Debashis Saha, Anantha P. Chandrakasan
1997	J	`jnl`	Approximate Signal Processing. J. VLSI Signal Process. S. Hamid Nawab, Alan V. Oppenheim, Anantha P. Chandrakasan, Joseph M. Winograd, Jeffrey T. Ludwig
1997	A*	`conf`	Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT. DAC Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha P. Chandrakasan
1997	J	`jnl`	Embedded power supply for low-power DSP. IEEE Trans. Very Large Scale Integr. Syst. Vadim Gutnik, Anantha P. Chandrakasan
1997	A	`conf`	Low power design without compromise (panel). ISLPED Jim Burr, Anantha P. Chandrakasan, Fari Assaderaghi, Francky Catthoor, Frank Fox, Dave Greenhill, Deo Singh, Jim Sproch
1997	Misc	`conf`	Network driven motion estimation for portable video terminals. ICASSP Wendi Rabiner, Anantha P. Chandrakasan
1997	J	`jnl`	Network-driven motion estimation for wireless video terminals. IEEE Trans. Circuits Syst. Video Technol. Wendi Rabiner Heinzelman, Anantha P. Chandrakasan
1997	A	`ed.`	Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997, Monterey, California, USA, August 18-20, 1997 ISLPED Brock Barton, Massoud Pedram, Anantha P. Chandrakasan, Sayfe Kiaei
1997	A*	`conf`	Transistor Sizing Issues and Tool For Multi-Threshold CMOS Technology. DAC James T. Kao, Anantha P. Chandrakasan, Dimitri A. Antoniadis
1996	Misc	`conf`	A binary block matching architecture with reduced power consumption and silicon area requirement. ICASSP Marcelo M. Mizuki, Ujjaval Y. Desai, Ichiro Masaki, Anantha P. Chandrakasan
1996	A	`conf`	Data driven signal processing: an approach for energy efficient computing. ISLPED Anantha P. Chandrakasan, Vadim Gutnik, Thucydides Xanthopoulos
1996	A*	`conf`	Design Considerations and Tools for Low-voltage Digital System Design. DAC Anantha P. Chandrakasan, Isabel Y. Yang, Carlin Vieri, Dimitri A. Antoniadis
1996	J	`jnl`	Guest editors' introduction. J. VLSI Signal Process. Anantha P. Chandrakasan, Robert W. Brodersen
1996	J	`jnl`	Low-power digital filtering using approximate processing. IEEE J. Solid State Circuits Jeffrey T. Ludwig, S. Hamid Nawab, Anantha P. Chandrakasan
1996	Misc	`conf`	Mobile Communications: Demands on VLSI Technology, Design and CAD. VLSI Design Anantha P. Chandrakasan, Kurt Keutzer, A. Khandekar, S. L. Maskara, B. D. Pradhan, Mani B. Srivastava
1996	J	`jnl`	Multiple constant multiplications: efficient and versatile framework and algorithms for exploring common subexpression elimination. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Miodrag Potkonjak, Mani B. Srivastava, Anantha P. Chandrakasan
1996	J	`jnl`	Predictive system shutdown and other architectural techniques for energy efficient programmable computation. IEEE Trans. Very Large Scale Integr. Syst. Mani B. Srivastava, Anantha P. Chandrakasan, Robert W. Brodersen
1996	Misc	`conf`	Ultra low power digital signal processing. VLSI Design Anantha P. Chandrakasan
1995	J	`jnl`	Minimizing power consumption in digital CMOS circuits. Proc. IEEE Anantha P. Chandrakasan, Robert W. Brodersen
1995	J	`jnl`	Optimizing power using transformations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Anantha P. Chandrakasan, Miodrag Potkonjak, Renu Mehra, Jan M. Rabaey, Robert W. Brodersen
1995	B	`conf`	Synthesis and selection of DCT algorithms using behavioral synthesis-based algorithm space exploration. ICIP Miodrag Potkonjak, Anantha P. Chandrakasan
1994	J	`jnl`	A low-power chipset for a portable multimedia I/O terminal. IEEE J. Solid State Circuits Anantha P. Chandrakasan, Andrew Burstein, Robert W. Brodersen
1994	A*	`conf`	Efficient Substitution of Multiple Constant Multiplications by Shifts and Additions Using Iterative Pairwise Matching. DAC Miodrag Potkonjak, Mani B. Srivastava, Anantha P. Chandrakasan
1994	Misc	`conf`	Energy Efficient Programmable Computation. VLSI Design Anantha P. Chandrakasan, Mani B. Srivastava, Robert W. Brodersen
1994	B	`conf`	Research challenges in wireless multimedia. PIMRC Robert W. Brodersen, Thomas D. Burd, Fred L. Burghardt, Andrew J. Burstein, Anantha P. Chandrakasan, Roger Doering, Shankar Narayanaswamy, Trevor Pering, Brian C. Richards, Thomas E. Truman, Jan M. Rabaey
1992	J	`jnl`	A portable multimedia terminal. IEEE Commun. Mag. Samuel Sheng, Anantha P. Chandrakasan, Robert W. Brodersen
1992	A	`conf`	HYPER-LP: a system for power minimization using architectural transformations. ICCAD Anantha P. Chandrakasan, Miodrag Potkonjak, Jan M. Rabaey, Robert W. Brodersen
1992	Misc	`conf`	Low Power Techniques for Portable Real-time DSP Applications. VLSI Design Anantha P. Chandrakasan, Samuel Sheng, Robert W. Brodersen
1992	J	`jnl`	Low-power CMOS digital design. IEEE J. Solid State Circuits Anantha P. Chandrakasan, Samuel Sheng, Robert W. Brodersen