Amir H. Farrahi

12 papers A* 1A 2B 1Journal 6Unranked 2
YearRankTypeTitle / Venue / Authors
2016 J jnl
On the Problem of Pairing Aircraft for Closely Spaced Parallel Approaches.
IEEE Trans. Intell. Transp. Syst.
Amir H. Farrahi, Savita A. Verma, Thomas E. Kozon
2001 J jnl
Activity-driven clock design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Amir H. Farrahi, Chunhong Chen, Ankur Srivastava, Gustavo E. Téllez, Majid Sarrafzadeh
2000 — conf
Estimation and removal or routing congestion (discussion session).
SLIP
Amir H. Farrahi
2000 J jnl
On the Power of Logic Resynthesis.
SIAM J. Comput.
Wei-Liang Lin, Amir H. Farrahi, Majid Sarrafzadeh
2000 — conf
Quality of EDA CAD Tools: Definitions, Metrics and Directions.
ISQED
Amir H. Farrahi, David J. Hathaway, Maogang Wang, Majid Sarrafzadeh
1999 J jnl
Two-Way and Multiway Partitioning of a Set of Intervals for Clique-Width Maximization.
Algorithmica
Amir H. Farrahi, D. T. Lee, Majid Sarrafzadeh
1998 J jnl
Exploiting Sleep Mode for Memory Partitioning and Other Applications.
VLSI Design
Amir H. Farrahi, Gustavo E. Téllez, Majid Sarrafzadeh
1995 A conf
Activity-driven clock design for low power circuits.
ICCAD
Gustavo E. Téllez, Amir H. Farrahi, Majid Sarrafzadeh
1995 A* conf
Memory Segmentation to Exploit Sleep Mode Operation.
DAC
Amir H. Farrahi, Gustavo E. Téllez, Majid Sarrafzadeh
1995 A conf
System partitioning to maximize sleep time.
ICCAD
Amir H. Farrahi, Majid Sarrafzadeh
1994 J jnl
Complexity of the lookup-table minimization problem for FPGA technology mapping.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Amir H. Farrahi, Majid Sarrafzadeh
1994 B conf
FPGA Technology Mapping for Power Minimization.
FPL
Amir H. Farrahi, Majid Sarrafzadeh