Amir Amirkhany

27 papers A 1B 2Journal 10Unranked 14

Year	Rank	Type	Title / Venue / Authors
2022	J	`jnl`	A 5.2 Gb/s Receiver for Next-Generation 8K Displays in 180 nm CMOS Process. IEEE J. Solid State Circuits Tianyu Wang, Da Wei, Ranick Ng, Gaurav Malhotra, Anup P. Jose, Amir Amirkhany, Pavan Kumar Hanumolu
2022	J	`jnl`	Introduction to the Special Section on the 2021 IEEE International Solid-State Circuits Conference (ISSCC). IEEE J. Solid State Circuits Amir Amirkhany, Tanay Karnik, Shidhartha Das, Jun Deguchi, Yasuhiko Taito
2021	—	`conf`	Baud rate pattern-adaptable dual loop clock recovery for high speed serial links. ACSCC Gaurav Malhotra, Jalil Kamali, Amir Amirkhany
2021	—	`conf`	Session 11 Overview: Advanced Wireline Links and Techniques Wireline Subcommittee. ISSCC Mike Shuo-Wei Chen, Wei-Zen Chen, Amir Amirkhany
2019	—	`conf`	A 1.5pJ/bit, 5-to-10Gbps Forwarded-Clock I/O with Per-Lane Clock De-Skew in a Low Power 28nm CMOS Process. CICC Anup P. Jose, Valentin Abramzon, Mohamed Elzeftawi, Michael Wang, Kyunglok Kim, Younghoon Song, Shiva Moballegh, Jalil Kamali, Amir Amirkhany
2016	—	`conf`	23.3 A 6Gb/s 3-tap FFE transmitter and 5-tap DFE receiver in 65nm/0.18µm CMOS for next-generation 8K displays. ISSCC Mohammad Hekmat, Sanquan Song, Nancy Jaffari, Sabarish Sankaranarayanan, Chaofeng Huang, Minghui Han, Gaurav Malhotra, Jalil Kamali, Amir Amirkhany, Wei Xiong
2013	J	`jnl`	A 0.4-mW/Gb/s Near-Ground Receiver Front-End With Replica Transconductance Termination Calibration for a 16-Gb/s Source-Series Terminated Transceiver. IEEE J. Solid State Circuits Kambiz Kaviani, Amir Amirkhany, Charlie Huang, Phuong Le, Wendemagegnehu T. Beyene, Chris J. Madden, Keisuke Saito, Koji Sano, Vinod Inipodu Murugan, Kun-Yung Ken Chang, Xingchao Chuck Yuan
2013	—	`conf`	A 0.94mW/Gb/s 22Gb/s 2-tap partial-response DFE receiver in 40nm LP CMOS. ISSCC Kwangmo Jung, Amir Amirkhany, Kambiz Kaviani
2012	—	`conf`	A 0.4mW/Gb/s 16Gb/s near-ground receiver front-end with replica transconductance termination calibration. ISSCC Kambiz Kaviani, Amir Amirkhany, Charlie Huang, Phuong Le, Chris J. Madden, Keisuke Saito, Koji Sano, Vinod Murugan, Wendemagegnehu T. Beyene, Ken Chang, Chuck Yuan
2012	J	`jnl`	A 12.8-Gb/s/link Tri-Modal Single-Ended Memory Interface. IEEE J. Solid State Circuits Amir Amirkhany, Jason Wei, Navin K. Mishra, Jie Shen, Wendemagegnehu T. Beyene, Catherine Chen, T. J. Chin, Deborah Dressler, Charlie Huang, Vijay P. Gadde, Mohammad Hekmat, Kambiz Kaviani, Hai Lan, Phuong Le, Mahabaleshwara, Chris J. Madden, Sanku Mukherjee, Leneesh Raghavan, Keisuke Saito, Dave Secker, Arul Sendhil, Ralf Schmitt, H. Md. Shuaeb Fazeel, Gundlapalli Shanmukha Srinivas, Ting Wu, Chanh Tran, Arun Vaidyanath, Kapil Vyas, Ling Yang, Manish Jain, Kun-Yung Ken Chang, Xingchao Yuan
2012	J	`jnl`	A 4.1-pJ/b, 16-Gb/s Coded Differential Bidirectional Parallel Electrical Link. IEEE J. Solid State Circuits Amir Amirkhany, Kambiz Kaviani, Ali-Azam Abbasfar, H. Md. Shuaeb Fazeel, Wendemagegnehu T. Beyene, Chikara Hoshino, Chris J. Madden, Ken Chang, Chuck Yuan
2012	—	`conf`	A 4.1pJ/b 16Gb/s coded differential bidirectional parallel electrical link. ISSCC Amir Amirkhany, Kambiz Kaviani, Ali-Azam Abbasfar, H. Md. Shuaeb Fazeel, Wendemagegnehu T. Beyene, Chikara Hoshino, Chris J. Madden, Ken Chang, Chuck Yuan
2012	J	`jnl`	A Tri-Modal 20-Gbps/Link Differential/DDR3/GDDR5 Memory Interface. IEEE J. Solid State Circuits Kambiz Kaviani, Ting Wu, Jason Wei, Amir Amirkhany, Jie Shen, T. J. Chin, Chintan Thakkar, Wendemagegnehu T. Beyene, Norman Chan, Catherine Chen, Bing Ren Chuang, Deborah Dressler, Vijay P. Gadde, Mohammad Hekmat, Eugene Ho, Charlie Huang, Phuong Le, Mahabaleshwara, Chris J. Madden, Navin K. Mishra, Leneesh Raghavan, Keisuke Saito, Ralf Schmitt, Dave Secker, Xudong Shi, H. Md. Shuaeb Fazeel, Gundlapalli Shanmukha Srinivas, Steve Zhang, Chanh Tran, Arun Vaidyanath, Kapil Vyas, Manish Jain, Kun-Yung Ken Chang, Xingchao Yuan
2011	—	`conf`	An output structure for a bi-modal 6.4-Gbps GDDR5 and 2.4-Gbps DDR3 compatible memory interface. CICC Navin K. Mishra, Manish Jain, Phuong Le, Sanku Mukherjee, Arul Sendhil, Amir Amirkhany
2011	—	`conf`	On overcoming the limitations of single-ended signaling for graphics memory interfaces. A-SSCC Amir Amirkhany, Wendemagegnehu T. Beyene, Chris J. Madden, Aliazam Abbasfar, Dave Secker, Dan Oh, Mohammad Hekmat, Ralf Schmitt, Chuck Yuan
2011	—	`conf`	Power-efficient I/O design considerations for high-bandwidth applications. CICC John C. Eble, Scott Best, Brian S. Leibowitz, Lei Luo, Robert Palmer, John M. Wilson, Jared Zerbe, Amir Amirkhany, Nhat Nguyen
2010	J	`jnl`	A 5 Gbps 0.13 μ m CMOS Pilot-Based Clock and Data Recovery Scheme for High-Speed Links. IEEE J. Solid State Circuits Mahmoud Reza Ahmadi, Amir Amirkhany, Ramesh Harjani
2010	J	`jnl`	A Low-Cost Resonance Mitigation Technique for Multidrop Memory Interfaces. IEEE Trans. Circuits Syst. II Express Briefs Farshid Aryanfar, Amir Amirkhany
2009	—	`conf`	A 5Gbps 0.13μm CMOS pilot-based clock and data recovery scheme for high-speed links. CICC Mahmoud Reza Ahmadi, Amir Amirkhany, Ramesh Harjani
2008	J	`jnl`	A 12-GS/s Phase-Calibrated CMOS Digital-to-Analog Converter for Backplane Communications. IEEE J. Solid State Circuits Jafar Savoj, Aliazam Abbasfar, Amir Amirkhany, Metha Jeeradit, Bruno W. Garlepp
2008	J	`jnl`	A 24 Gb/s Software Programmable Analog Multi-Tone Transmitter. IEEE J. Solid State Circuits Amir Amirkhany, Aliazam Abbasfar, Jafar Savoj, Metha Jeeradit, Bruno W. Garlepp, Ravi T. Kollipara, Vladimir Stojanovic, Mark Horowitz
2007	A	`conf`	A new technique for characterization of digital-to-analog converters in high-speed systems. DATE Jafar Savoj, Ali-Azam Abbasfar, Amir Amirkhany, Bruno W. Garlepp, Mark A. Horowitz
2007	—	`conf`	Practical Limits of Multi-Tone Signaling Over High-Speed Backplane Electrical Links. ICC Amir Amirkhany, Ali-Azam Abbasfar, Vladimir Stojanovic, Mark A. Horowitz
2007	—	`conf`	Time-Variant Characterization and Compensation of Wideband Circuits. CICC Amir Amirkhany, Ali-Azam Abbasfar, Jafar Savoj, Mark A. Horowitz
2006	B	`conf`	Analog Multi-Tone Signaling for High-Speed Backplane Electrical Links. GLOBECOM Amir Amirkhany, Ali-Azam Abbasfar, Vladimir Stojanovic, Mark A. Horowitz
2004	B	`conf`	Multi-tone signaling for high-speed backplane electrical links. GLOBECOM Amir Amirkhany, Vladimir Stojanovic, Mark A. Horowitz
2004	—	`conf`	Optimal linear precoding with theoretical and practical data rates in high-speed serial-link backplane communication. ICC Vladimir Stojanovic, Amir Amirkhany, Mark A. Horowitz