Amin Farshidi

13 papers Journal 6Unranked 5
YearRankTypeTitle / Venue / Authors
2019 — conf
ISPD 2019 Initial Detailed Routing Contest and Benchmark with Advanced Routing Rules.
ISPD
Wen-Hao Liu, Stefanus Mantik, Wing-Kai Chow, Yixiao Ding, Amin Farshidi, Gracieli Posser
2017 J jnl
A Multiobjective Cooptimization of Buffer and Wire Sizes in High-Performance Clock Trees.
IEEE Trans. Circuits Syst. II Express Briefs
Amin Farshidi, Laleh Behjat, Logan M. Rakai, David T. Westwick
2016 — —
Power and Timing Driven Optimal Gate, Clock Buffer and Clock Wire Sizing in High Performance Digital Integrated Circuits.
Amin Farshidi
2015 — ch.
Sizing Digital Circuits Using Convex Optimization Techniques.
Computational Intelligence in Digital and Network Designs and Applications
Logan Rakai, Amin Farshidi
2015 — conf
The impact of industry-organized contests on EDA education.
MSE
Nima Karimpour Darav, Amin Farshidi, Aysa Fakheri Tabrizi, Emily Marasco, Amir Karbalaei, Andrew A. Kennings, Ismail S. Bustany, Laleh Behjat
2014 J jnl
Optimal gate sizing using a self-tuning multi-objective framework.
Integr.
Amin Farshidi, Logan M. Rakai, Laleh Behjat, David T. Westwick
2014 J jnl
Variation-Aware Geometric Programming Models for the Clock Network Buffer Sizing Problem.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Logan M. Rakai, Amin Farshidi, David T. Westwick, Laleh Behjat
2013 J jnl
A new a priori net length estimation technique for integrated circuits using radial basis functions.
Comput. Electr. Eng.
Amin Farshidi, Logan M. Rakai, Bardia Samimi, Laleh Behjat, David T. Westwick
2013 — conf
A self-tuning multi-objective optimization framework for geometric programming with gate sizing applications.
ACM Great Lakes Symposium on VLSI
Amin Farshidi, Logan M. Rakai, Laleh Behjat, David T. Westwick
2013 — conf
Buffer sizing for clock networks using robust geometric programming considering variations in buffer sizes.
ISPD
Logan M. Rakai, Amin Farshidi, Laleh Behjat, David T. Westwick
2012 J jnl
A New Length-Based Algebraic Multigrid Clustering Algorithm.
VLSI Design
Logan M. Rakai, Amin Farshidi, Laleh Behjat, David T. Westwick
2012 — conf
Analysis of post-placement length estimation.
SLIP
William Swartz, Yang-Yang Li, Amin Farshidi, Laleh Behjat
2011 J jnl
A pre-placement individual net length estimation model and an application for modern circuits.
Integr.
Amin Farshidi, Laleh Behjat, Logan M. Rakai, Bahareh Fathi