Alwin Zulehner

43 papers A* 1A 8C 6Journal 16Unranked 10

Year	Rank	Type	Title / Venue / Authors
2022	J	`jnl`	Approximating Decision Diagrams for Quantum Circuit Simulation. ACM Trans. Quantum Comput. Stefan Hillmich, Alwin Zulehner, Richard Kueng, Igor L. Markov, Robert Wille
2021	—	`conf`	Exploiting Quantum Teleportation in Quantum Circuit Mapping. ASP-DAC Stefan Hillmich, Alwin Zulehner, Robert Wille
2020	J	`jnl`	An efficient memristor crossbar architecture for mapping Boolean functions using Binary Decision Diagrams (BDD). Integr. Phrangboklang Lyngton Thangkhiew, Alwin Zulehner, Robert Wille, Kamalika Datta, Indranil Sengupta
2020	—	`conf`	Approximation of Quantum States Using Decision Diagrams. ASP-DAC Alwin Zulehner, Stefan Hillmich, Igor L. Markov, Robert Wille
2020	—	`conf`	Concurrency in DD-based Quantum Circuit Simulation. ASP-DAC Stefan Hillmich, Alwin Zulehner, Robert Wille
2020	J	`jnl`	On the Difficulty of Inserting Trojans in Reversible Computing Architectures. IEEE Trans. Emerg. Top. Comput. Xiaotong Cui, Samah Mohamed Saeed, Alwin Zulehner, Robert Wille, Kaijie Wu, Rolf Drechsler, Ramesh Karri
2020	J	`jnl`	Overcoming the Tradeoff Between Accuracy and Compactness in Decision Diagrams for Quantum Computation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Philipp Niemann, Alwin Zulehner, Rolf Drechsler, Robert Wille
2020	—	`ch.`	Simulation and Design of Quantum Circuits. Selected Results of the COST Action IC1405 Alwin Zulehner, Robert Wille
2019	—	`conf`	A staircase structure for scalable and efficient synthesis of memristor-aided logic. ASP-DAC Alwin Zulehner, Kamalika Datta, Indranil Sengupta, Robert Wille
2019	A	`conf`	Accuracy and Compactness in Decision Diagrams for Quantum Computation. DATE Alwin Zulehner, Philipp Niemann, Rolf Drechsler, Robert Wille
2019	J	`jnl`	Advanced Simulation of Quantum Computations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Alwin Zulehner, Robert Wille
2019	J	`jnl`	An Efficient Methodology for Mapping Quantum Circuits to the IBM QX Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Alwin Zulehner, Alexandru Paler, Robert Wille
2019	—	`conf`	Compiling SU(4) quantum circuits to IBM QX architectures. ASP-DAC Alwin Zulehner, Robert Wille
2019	—	`conf`	Design automation for adiabatic circuits. ASP-DAC Alwin Zulehner, Michael P. Frank, Robert Wille
2019	—	`ch.`	Entwurfsautomatisierung für Quantencomputer. Ausgezeichnete Informatikdissertationen Alwin Zulehner
2019	C	`conf`	Evaluating the Flexibility of A* for Mapping Quantum Circuits. RC Alwin Zulehner, Hartwig Bauer, Robert Wille
2019	A	`conf`	How to Efficiently Handle Complex Values? Implementing Decision Diagrams for Quantum Computing. ICCAD Alwin Zulehner, Stefan Hillmich, Robert Wille
2019	J	`jnl`	How to Efficiently Handle Complex Values? Implementing Decision Diagrams for Quantum Computing. CoRR Alwin Zulehner, Stefan Hillmich, Robert Wille
2019	J	`jnl`	Identification of Synthesis Approaches for IP/IC Piracy of Reversible Circuits. ACM J. Emerg. Technol. Comput. Syst. Samah Mohamed Saeed, Nithin Mahendran, Alwin Zulehner, Robert Wille, Ramesh Karri
2019	A*	`conf`	Mapping Quantum Circuits to IBM QX Architectures Using the Minimal Number of SWAP and H Operations. DAC Robert Wille, Lukas Burgholzer, Alwin Zulehner
2019	A	`conf`	Matrix-Vector vs. Matrix-Matrix Multiplication: Potential in DD-based Simulation of Quantum Computations. DATE Alwin Zulehner, Robert Wille
2019	—	`conf`	One Additional Qubit is Enough: Encoded Embeddings for Boolean Components in Quantum Circuits. ISMVL Alwin Zulehner, Philipp Niemann, Rolf Drechsler, Robert Wille
2019	J	`jnl`	One Additional Qubit is Enough: Encoded Embeddings for Boolean Components in Quantum Circuits. CoRR Alwin Zulehner, Philipp Niemann, Rolf Drechsler, Robert Wille
2019	J	`jnl`	Reversible Circuits: IC/IP Piracy Attacks and Countermeasures. IEEE Trans. Very Large Scale Integr. Syst. Samah Mohamed Saeed, Alwin Zulehner, Robert Wille, Rolf Drechsler, Ramesh Karri
2018	J	`jnl`	Design Automation for Adiabatic Circuits. CoRR Alwin Zulehner, Michael P. Frank, Robert Wille
2018	A	`conf`	Efficient mapping of quantum circuits to the IBM QX architectures. DATE Alwin Zulehner, Alexandru Paler, Robert Wille
2018	—	`conf`	Exploiting coding techniques for logic synthesis of reversible circuits. ASP-DAC Alwin Zulehner, Robert Wille
2018	—	`conf`	Generalizing the Concept of Scalable Reversible Circuit Synthesis for Multiple-Valued Logic. ISMVL Alwin Zulehner, P. Mercy Nesa Rani, Kamalika Datta, Indranil Sengupta, Robert Wille
2018	A	`conf`	IC/IP piracy assessment of reversible logic. ICCAD Samah Mohamed Saeed, Xiaotong Cui, Alwin Zulehner, Robert Wille, Rolf Drechsler, Kaijie Wu, Ramesh Karri
2018	J	`jnl`	NISQ circuit compilers: search space structure and heuristics. CoRR Alexandru Paler, Alwin Zulehner, Robert Wille
2018	J	`jnl`	One-Pass Design of Reversible Circuits: Combining Embedding and Synthesis for Reversible Logic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Alwin Zulehner, Robert Wille
2018	A	`conf`	Pushing the number of qubits below the "minimum": Realizing compact boolean components for quantum logic. DATE Alwin Zulehner, Robert Wille
2018	C	`conf`	QMDD-Based One-Pass Design of Reversible Logic: Exploring the Available Degree of Freedom (Work-in-Progress Report). RC Alwin Zulehner, Robert Wille
2017	J	`jnl`	Advanced Simulation of Quantum Computations: Compact Representation Rather than Hardware Power. CoRR Alwin Zulehner, Robert Wille
2017	C	`conf`	Efficient Construction of QMDDs for Irreversible, Reversible, and Quantum Functions. RC Philipp Niemann, Alwin Zulehner, Robert Wille, Rolf Drechsler
2017	C	`conf`	Exact Global Reordering for Nearest Neighbor Quantum Circuits Using A ^* ∗. RC Alwin Zulehner, Stefan Gasser, Robert Wille
2017	C	`conf`	Identifying Reversible Circuit Synthesis Approaches to Enable IP Piracy Attacks. ICCD Samah Mohamed Saeed, Nithin Mahendran, Alwin Zulehner, Robert Wille, Ramesh Karri
2017	C	`conf`	Improving Synthesis of Reversible Circuits: Exploiting Redundancies in Paths and Nodes of QMDDs. RC Alwin Zulehner, Robert Wille
2017	A	`conf`	Make it reversible: Efficient embedding of non-reversible functions. DATE Alwin Zulehner, Robert Wille
2017	J	`jnl`	On the Difficulty of Inserting Trojans in Reversible Computing Architectures. CoRR Xiaotong Cui, Samah Mohamed Saeed, Alwin Zulehner, Robert Wille, Rolf Drechsler, Kaijie Wu, Ramesh Karri
2017	—	`conf`	Skipping Embedding in the Design of Reversible Circuits. ISMVL Alwin Zulehner, Robert Wille
2017	A	`conf`	Taking one-to-one mappings for granted: Advanced logic design of encoder circuits. DATE Alwin Zulehner, Robert Wille
2017	J	`jnl`	Towards Reverse Engineering Reversible Logic. CoRR Samah Mohamed Saeed, Xiaotong Cui, Robert Wille, Alwin Zulehner, Kaijie Wu, Rolf Drechsler, Ramesh Karri