Alireza Kaviani

28 papers A* 1A 6B 1Misc 1Journal 8Unranked 11
YearRankTypeTitle / Venue / Authors
2026 A* conf
Improved Maximin Share Guarantee for Additive Valuations.
SODA
Ehsan Heidari, Alireza Kaviani, Masoud Seddighin, AmirMohammad Shahrezaei
2025 J jnl
Choreographer: A Full-System Framework for Fine-Grained Tasks in Cache Hierarchies.
CoRR
Hoa Nguyen, Pongstorn Maidee, Jason Lowe-Power, Alireza Kaviani
2025 J jnl
Improved Approximate EFX Guarantees for Multigraphs.
CoRR
Alireza Kaviani, Alireza Keshavarz, Masoud Seddighin, AmirMohammad Shahrezaei
2025 J jnl
Improved Maximin Share Guarantee for Additive Valuations.
CoRR
Ehsan Heidari, Alireza Kaviani, Masoud Seddighin, AmirMohammad Shahrezaei
2025 J jnl
Pickle Prefetcher: Programmable and Scalable Last-Level Cache Prefetcher.
CoRR
Hoa Nguyen, Pongstorn Maidee, Jason Lowe-Power, Alireza Kaviani
2024 — conf
Almost Envy-Free Allocation of Indivisible Goods: A Tale of Two Valuations.
WINE
Alireza Kaviani, Masoud Seddighin, AmirMohammad Shahrezaei
2024 J jnl
Almost Envy-free Allocation of Indivisible Goods: A Tale of Two Valuations.
CoRR
Alireza Kaviani, Masoud Seddighin, AmirMohammad Shahrezaei
2023 — conf
Addressing the EDA Roadblocks for Domain-specific Compilers: An Industry Perspective.
ISPD
Alireza Kaviani
2023 J jnl
RapidStream 2.0: Automated Parallel Implementation of Latency-Insensitive FPGA Designs Through Partial Reconfiguration.
ACM Trans. Reconfigurable Technol. Syst.
Licheng Guo, Pongstorn Maidee, Yun Zhou, Chris Lavin, Eddie Hung, Wuxi Li, Jason Lau, Weikang Qiao, Yuze Chi, Linghao Song, Yuanlong Xiao, Alireza Kaviani, Zhiru Zhang, Jason Cong
2022 J jnl
RWRoute: An Open-source Timing-driven Router for Commercial FPGAs.
ACM Trans. Reconfigurable Technol. Syst.
Yun Zhou, Pongstorn Maidee, Chris Lavin, Alireza Kaviani, Dirk Stroobandt
2022 A conf
RapidStream: Parallel Physical Implementation of FPGA HLS Designs.
FPGA
Licheng Guo, Pongstorn Maidee, Yun Zhou, Chris Lavin, Jie Wang, Yuze Chi, Weikang Qiao, Alireza Kaviani, Zhiru Zhang, Jason Cong
2021 — conf
Software-like Compilation for Data Center FPGA Accelerators.
HEART
James Thomas, Chris Lavin, Alireza Kaviani
2019 — conf
An Open-Source Lightweight Timing Model for RapidWright.
FPT
Pongstorn Maidee, Chris Neely, Alireza Kaviani, Chris Lavin
2019 A conf
Build Your Own Domain-specific Solutions with RapidWright: Invited Tutorial.
FPGA
Chris Lavin, Alireza Kaviani
2018 Misc conf
RapidWright: Enabling Custom Crafted Implementations for FPGAs.
FCCM
Chris Lavin, Alireza Kaviani
2017 — conf
LinkBlaze: Efficient global data movement for FPGAs.
ReConFig
Pongstorn Maidee, Alireza Kaviani, Kevin Zeng
2016 A conf
Boolean Satisfiability-Based Routing and Its Application to Xilinx UltraScale Clock Network.
FPGA
Henri Fraisse, Abhishek Joshi, Dinesh Gaitonde, Alireza Kaviani
2015 — conf
Analyzing the divide between FPGA academic and commercial results.
FPT
Elias Vansteenkiste, Alireza Kaviani, Henri Fraisse
2015 — conf
Improving FPGA NoC performance using virtual cut-through switching technique.
ReConFig
Pongstorn Maidee, Alireza Kaviani
2008 — conf
Programmable all-digital adaptive deskewing and phase shifting.
SoCC
Alireza Kaviani, Tao Pi, Declan Kelly
2004 — conf
Phase Alignment Using Asynchronous State Machines.
ASYNC
Alireza Kaviani
2002 A conf
Dynamic power consumption in Virtex[tm]-II FPGA family.
FPGA
Li Shang, Alireza Kaviani, Kusuma Bathala
2002 B conf
Using Design Hierarchy to Improve Quality of Results in FPGAs.
FPL
Alireza Kaviani
2000 A conf
Technology mapping issues for an FPGA with lookup tables and PLA-like blocks.
FPGA
Alireza Kaviani, Stephen Brown
1999 J jnl
The Hybrid Field-Programmable Architecture.
IEEE Des. Test Comput.
Alireza Kaviani, Stephen Brown
1998 — conf
Computational field programmable architecture.
CICC
Alireza Kaviani, Daniel Vranesic, Stephen Brown
1996 A conf
Hybrid FPGA Architecture.
FPGA
Alireza Kaviani, Stephen Brown
1994 — conf
On Scheduling in Multiprocessor Systems Using Fuzzy Logic.
ISMVL
Alireza Kaviani, Zvonko G. Vranesic