Alina Deutsch

20 papers A* 1A 3C 1Journal 11Unranked 4
YearRankTypeTitle / Venue / Authors
2011 J jnl
Prediction and Comparison of High-Performance On-Chip Global Interconnection.
IEEE Trans. Very Large Scale Integr. Syst.
Yulei Zhang, Xiang Hu, Alina Deutsch, A. Ege Engin, James F. Buckwalter, Chung-Kuan Cheng
2009 — conf
Design methodology of high performance on-chip global interconnect using terminated transmission-line.
ISQED
Yulei Zhang, Ling Zhang, Alina Deutsch, George A. Katopis, Daniel M. Dreps, James F. Buckwalter, Ernest S. Kuh, Chung-Kuan Cheng
2009 — conf
Electrical-thermal co-analysis for power delivery networks in 3D system integration.
3DIC
Jianyong Xie, Daehyun Chung, Madhavan Swaminathan, Michael McAllister, Alina Deutsch, Lijun Jiang, Barry J. Rubin
2009 A conf
Fast 3-D thermal analysis of complex interconnect structures using electrical modeling and simulation methodologies.
ICCAD
Chuan Xu, Lijun Jiang, Seshadri K. Kolluri, Barry J. Rubin, Alina Deutsch, Howard H. Smith, Kaustav Banerjee
2009 — conf
Prediction of high-performance on-chip global interconnection.
SLIP
Yulei Zhang, Xiang Hu, Alina Deutsch, A. Ege Engin, James F. Buckwalter, Chung-Kuan Cheng
2008 — conf
Low Power Passive Equalizer Design for Computer Memory Links.
Hot Interconnects
Ling Zhang, Wenjian Yu, Yulei Zhang, Renshen Wang, Alina Deutsch, George A. Katopis, Daniel M. Dreps, James F. Buckwalter, Ernest S. Kuh, Chung-Kuan Cheng
2008 A* conf
Low power passive equalizer optimization using tritonic step response.
DAC
Ling Zhang, Wenjian Yu, Haikun Zhu, Alina Deutsch, George A. Katopis, Daniel M. Dreps, Ernest S. Kuh, Chung-Kuan Cheng
2005 J jnl
Development of next-generation system-on-package (SOP) technology based on silicon carriers with fine-pitch chip interconnection.
IBM J. Res. Dev.
John U. Knickerbocker, Paul S. Andry, L. Paivikki Buchwalter, Alina Deutsch, Raymond R. Horton, Keith A. Jenkins, Young Hoon Kwark, Gerald McVicker, Chirag S. Patel, Robert J. Polastre, Christian D. Schuster, Arun Sharma, Sri M. Sri-Jayantha, Christopher W. Surovic, Cornelia K. Tsang, Bucknell C. Webb, Steven L. Wright, Samuel R. McKnight, Edmund J. Sprogis, Bing Dang
2004 A conf
A CAD Methodology and Tool for the Characterization of Wide On-Chip Buses.
DATE
Ibrahim M. Elfadel, Alina Deutsch, Gerard V. Kopcsay, Bradley Rubin, Howard H. Smith
2002 J jnl
A comprehensive 2-D inductance modeling approach for VLSI interconnects: frequency-dependent extraction and compact circuit model synthesis.
IEEE Trans. Very Large Scale Integr. Syst.
Gerard V. Kopcsay, Byron Krauter, David Widiger, Alina Deutsch, Barry J. Rubin, Howard H. Smith
2002 A conf
An overview of the BlueGene/L Supercomputer.
SC
Narasimha R. Adiga, George Almási, George S. Almási, Yariv Aridor, Rajkishore Barik, Daniel K. Beece, Ralph Bellofatto, Gyan Bhanot, Randy Bickford, Matthias A. Blumrich, Arthur A. Bright, José R. Brunheroto, Calin Cascaval, José G. Castaños, Waiman Chan, Luis Ceze, Paul Coteus, Siddhartha Chatterjee, Dong Chen, George L.-T. Chiu, Thomas M. Cipolla, Paul Crumley, K. M. Desai, Alina Deutsch, Tamar Domany, Marc Boris Dombrowa, Wilm E. Donath, Maria Eleftheriou, C. Christopher Erway, J. Esch, Blake G. Fitch, Joseph Gagliano, Alan Gara, Rahul Garg, Robert S. Germain, Mark Giampapa, Balaji Gopalsamy, John A. Gunnels, Manish Gupta, Fred G. Gustavson, Shawn Hall, Ruud A. Haring, David F. Heidel, Philip Heidelberger, Lorraine Herger, Dirk Hoenicke, R. D. Jackson, T. Jamal-Eddine, Gerard V. Kopcsay, Elie Krevat, Manish P. Kurhekar, Alphonso P. Lanzetta, Derek Lieber, L. K. Liu, M. Lu, Mark P. Mendell, A. Misra, Yosef Moatti, Lawrence S. Mok, José E. Moreira, Ben J. Nathanson, Matthew Newton, Martin Ohmacht, Adam J. Oliner, Vinayaka Pandit, R. B. Pudota, Rick A. Rand, Richard D. Regan, Bradley Rubin, Albert E. Ruehli, Silvius Vasile Rus, Ramendra K. Sahoo, Alda Sanomiya, Eugen Schenfeld, M. Sharma, Edi Shmueli, Sarabjeet Singh, Peilin Song, Vijay Srinivasan, Burkhard D. Steinmacher-Burow, Karin Strauss, Christopher W. Surovic, Richard A. Swetz, Todd Takken, R. Brett Tremaine, Mickey Tsao, Arun R. Umamaheshwaran, P. Verma, Pavlos Vranas, T. J. Christopher Ward, Michael E. Wazlowski, W. Barrett, C. Engel, B. Drehmel, B. Hilgart, D. Hill, F. Kasemkhani, David J. Krolak, Chun-Tao Li, Thomas A. Liebsch, James A. Marcella, A. Muff, A. Okomo, M. Rouse, A. Schram, M. Tubbs, G. Ulsh, Charles D. Wait, J. Wittrup, Myung Bae, Kenneth A. Dockser, Lynn Kissel, Mark K. Seager, Jeffrey S. Vetter, K. Yates
2002 C conf
Blue Gene/L, a System-On-A-Chip.
CLUSTER
George S. Almási, Daniel K. Beece, Ralph Bellofatto, Gyan Bhanot, Randy Bickford, Matthias A. Blumrich, Arthur A. Bright, José R. Brunheroto, Calin Cascaval, José G. Castaños, Luis Ceze, Paul Coteus, Siddhartha Chatterjee, Dong Chen, George L.-T. Chiu, Thomas M. Cipolla, Paul Crumley, Alina Deutsch, Marc Boris Dombrowa, Wilm E. Donath, Maria Eleftheriou, Blake G. Fitch, Joseph Gagliano, Alan Gara, Robert S. Germain, Mark Giampapa, Manish Gupta, Fred G. Gustavson, Shawn Hall, Ruud A. Haring, David F. Heidel, Philip Heidelberger, Lorraine Herger, Dirk Hoenicke, T. Jamal-Eddine, Gerard V. Kopcsay, Alphonso P. Lanzetta, Derek Lieber, M. Lu, Mark P. Mendell, Lawrence S. Mok, José E. Moreira, Ben J. Nathanson, Matthew Newton, Martin Ohmacht, Rick A. Rand, Richard D. Regan, Ramendra K. Sahoo, Alda Sanomiya, Eugen Schenfeld, Sarabjeet Singh, Peilin Song, Burkhard D. Steinmacher-Burow, Karin Strauss, Richard A. Swetz, Todd Takken, R. Brett Tremaine, Mickey Tsao, Pavlos Vranas, T. J. Christopher Ward, Michael E. Wazlowski, J. Brown, Thomas A. Liebsch, A. Schram, G. Ulsh
2001 J jnl
On-chip wiring design challenges for gigahertz operation.
Proc. IEEE
Alina Deutsch, Paul W. Coteus, Gerard V. Kopcsay, Howard H. Smith, Christopher W. Surovic, Byron Krauter, Daniel C. Edelstein, Phillip J. Restle
1998 J jnl
Electrical characteristics of interconnections for high-performance systems.
Proc. IEEE
Alina Deutsch
1998 J jnl
Measurement and modeling of on-chip transmission line effects in a 400 MHz microprocessor.
IEEE J. Solid State Circuits
Phillip J. Restle, Keith A. Jenkins, Alina Deutsch, Peter W. Cook
1996 J jnl
Single-chip 4×500-MBd CMOS transceiver.
IEEE J. Solid State Circuits
Albert X. Widmer, Kevin R. Wrenner, Herschel A. Ainspan, Ben Parker, Pierre Austruy, Bernard Brezzo, Anne-Marie Haen, John F. Ewen, Mehmet Soyuer, Alain Blanc, Jean-Claude Abbiate, Alina Deutsch, Hyun J. Shin
1995 J jnl
Modeling and characterization of long on-chip interconnections for high-performance microprocessors.
IBM J. Res. Dev.
Alina Deutsch, Gerard V. Kopcsay, Christopher W. Surovic, Barry J. Rubin, Lewis M. Terman, Richard P. Dunne Jr., Thomas A. Gallo, Robert H. Dennard
1994 J jnl
Performance limits of electrical cables for intrasystem communication.
IBM J. Res. Dev.
Alina Deutsch, G. Arjavalingam, Christopher W. Surovic, Alphonso P. Lanzetta, Keith E. Fogel, Fuad Dowany, Mark B. Ritter
1993 J jnl
Electrical characterization and performance limits of a flexible cable.
IBM J. Res. Dev.
Alina Deutsch, David W. Dranchak, G. Arjavalingam, Christopher W. Surovic, James K. Tam, Gerard V. Kopcsay, John B. Gillett
1990 J jnl
High-Speed Signal Propagation on Lossy Transmission Lines.
IBM J. Res. Dev.
Alina Deutsch, Gerard V. Kopcsay, Vincent A. Ranieri, J. K. Cataldo, Eileen A. Galligan, William S. Graham, R. P. McGouey, Sharon L. Nunes, Jurij R. Paraszczak, John J. Ritsko, R. J. Serino, D. Y. Shih, J. S. Wilczynski