Alhad Daftardar

15 papers A* 2B 1C 1Journal 8Unranked 3
YearRankTypeTitle / Venue / Authors
2026 A* conf
zkPHIRE: A Programmable Accelerator for ZKPs over HIgh-degRee, Expressive Gates.
HPCA
Alhad Daftardar, Jianqiao Mo, Joey Ah-kiow, Benedikt Bünz, Siddharth Garg, Brandon Reagen
2025 — conf
MTU: The Multifunction Tree Unit for Accelerating Zero-Knowledge Proofs.
HASP@MICRO
Jianqiao Mo, Alhad Daftardar, Joey Ah-kiow, Kaiyue Guo, Benedikt Bünz, Siddharth Garg, Brandon Reagen
2025 J jnl
MTU: The Multifunction Tree Unit in zkSpeed for Accelerating HyperPlonk.
CoRR
Jianqiao Mo, Alhad Daftardar, Joey Ah-kiow, Kaiyue Guo, Benedikt Bünz, Siddharth Garg, Brandon Reagen
2025 A* conf
Need for zkSpeed: Accelerating HyperPlonk for Zero-Knowledge Proofs.
ISCA
Alhad Daftardar, Jianqiao Mo, Joey Ah-kiow, Benedikt Bünz, Ramesh Karri, Siddharth Garg, Brandon Reagen
2025 J jnl
Need for zkSpeed: Accelerating HyperPlonk for Zero-Knowledge Proofs.
CoRR
Alhad Daftardar, Jianqiao Mo, Joey Ah-kiow, Benedikt Bünz, Ramesh Karri, Siddharth Garg, Brandon Reagen
2025 J jnl
Need for zkSpeed: Accelerating HyperPlonk for Zero-Knowledge Proofs.
IACR Cryptol. ePrint Arch.
Alhad Daftardar, Jianqiao Mo, Joey Ah-kiow, Benedikt Bünz, Ramesh Karri, Siddharth Garg, Brandon Reagen
2025 J jnl
zkPHIRE: A Programmable Accelerator for ZKPs over HIgh-degRee, Expressive Gates.
CoRR
Alhad Daftardar, Jianqiao Mo, Joey Ah-kiow, Benedikt Bünz, Siddharth Garg, Brandon Reagen
2024 B conf
SZKP: A Scalable Accelerator Architecture for Zero-Knowledge Proofs.
PACT
Alhad Daftardar, Brandon Reagen, Siddharth Garg
2024 J jnl
SZKP: A Scalable Accelerator Architecture for Zero-Knowledge Proofs.
CoRR
Alhad Daftardar, Brandon Reagen, Siddharth Garg
2022 C conf
Enabling Software-Defined RF Convergence with a Novel Coarse-Scale Heterogeneous Processor.
ISCAS
Daniel W. Bliss, Tutu Ajayi, Ali Akoglu, Ilkin Aliyev, Toygun Basaklar, Leul Belayneh, David T. Blaauw, John S. Brunhaver, Chaitali Chakrabarti, Liangliang Chang, Kuan-Yu Chen, Ming-Hung Chen, Xing Chen, Alex R. Chiriyath, Alhad Daftardar, Ronald G. Dreslinski, Arindam Dutta, Allen-Jasmin Farcas, Yukang Fu, A. Alper Goksoy, Xin He, Md Sahil Hassan, Andrew Herschfelt, Jacob Holtom, Hun-Seok Kim, A. N. Krishnakumar, Yang Li, Owen Ma, Joshua Mack, Saurav Mallik, Sumit K. Mandal, Radu Marculescu, Brittany M. McCall, Trevor N. Mudge, Ümit Y. Ogras, Vishrut Pandey, Saquib Ahmad Siddiqui, Yu-Hsiu Sun, Adarsh A. Venkataramani, Xiangdong Wei, B. R. Willis, Hanguang Yu, Yufan Yue
2022 J jnl
Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory.
IEEE J. Solid State Circuits
Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor N. Mudge, Chaitali Chakrabarti, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim
2021 — conf
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm.
VLSI Circuits
Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor N. Mudge, Chaitali Chakrabarti, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim
2021 J jnl
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm.
CoRR
Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor N. Mudge, Chaitali Chakrabarti, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim
2020 J jnl
Hardware Root-of-Trust-based integrity for shared library function pointers in embedded systems.
Microprocess. Microsystems
Patrick Coppock, Momen K. Yacoub, Bruce L. Qin, Alhad Daftardar, Zayd Tolaymat, Vincent J. Mooney
2019 — conf
Hardware Root-of-Trust Based Integrity for Shared Library Function Pointers in Embedded Systems.
MECO
Gabriela Lopez, Michael Foreman, Alhad Daftardar, Patrick Coppock, Zayd Tolaymat, Vincent J. Mooney