Alexandre Solon Nery

29 papers C 6Journal 11Unranked 12
YearRankTypeTitle / Venue / Authors
2021 J jnl
A CPU-FPGA heterogeneous approach for biological sequence comparison using high-level synthesis.
Concurr. Comput. Pract. Exp.
Carlos Antônio Campos Jorge, Alexandre Solon Nery, Alba C. M. A. Melo, Alfredo Goldman
2021 — conf
A Lightweight Error-Resiliency Mechanism for Deep Neural Networks.
ISQED
Brunno F. Goldstein, Victor da Cruz Ferreira, Sudarshan Srinivasan, Dipankar Das, Alexandre Solon Nery, Sandip Kundu, Felipe M. G. França
2021 J jnl
Enabling heterogeneous ray-tracing acceleration in edge/cloud architectures.
Concurr. Comput. Pract. Exp.
Adrianno Sampaio, Alexandre da Costa Sena, Alexandre Solon Nery
2021 J jnl
Preventing DNN Model IP Theft via Hardware Obfuscation.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Brunno F. Goldstein, Vinay C. Patil, Victor da Cruz Ferreira, Alexandre Solon Nery, Felipe M. G. França, Sandip Kundu
2020 — conf
Reliability Evaluation of Compressed Deep Learning Models.
LASCAS
Brunno F. Goldstein, Sudarshan Srinivasan, Dipankar Das, Kunal Banerjee, Leandro Santiago de Araújo, Victor da Cruz Ferreira, Alexandre Solon Nery, Sandip Kundu, Felipe M. G. França
2019 C conf
A Feasible FPGA Weightless Neural Accelerator.
ISCAS
Victor da Cruz Ferreira, Alexandre Solon Nery, Leandro A. J. Marzulo, Leandro Santiago, Diego Fonseca Pereira de Souza, Brunno F. Goldstein, Felipe M. G. França, Vladimir Castro Alves
2019 — conf
A Re-Configurable Ray-Triangle Vector Accelerator for Emerging Fog Architectures.
IPDPS Workshops
Adrianno Sampaio, Alexandre da Costa Sena, Alexandre Solon Nery
2019 J jnl
An efficient pathfinding system in FPGA for edge/fog computing.
Int. J. Grid Util. Comput.
Alexandre Solon Nery, Alexandre da Costa Sena, Leandro Soares Guedes
2019 J jnl
An optimised dataflow engine for GPGPU stream processing.
Int. J. Grid Util. Comput.
Marcos Paulo Rocha, Felipe M. G. França, Alexandre Solon Nery, Leandro Soares Guedes
2019 J jnl
DF-DTM: Dynamic Task Memoization and reuse in dataflow.
Concurr. Comput. Pract. Exp.
Leandro Rouberte, Alexandre da Costa Sena, Alexandre Solon Nery, Leandro A. J. Marzulo, Tiago A. O. Alves, Felipe M. G. França
2019 J jnl
DTM@GPU: Characterizing and evaluating trace redundancy in GPU.
Concurr. Comput. Pract. Exp.
Leandro A. J. Marzulo, Alexandre da Costa Sena, Alexandre Solon Nery, Cristiana Bentes, Igor Machado Coelho, Maria Clicia Stelling de Castro, Saulo T. Oliveira, Tiago A. O. Alves, Felipe M. G. França
2019 — conf
Hardware-Accelerated Similarity Search with Multi-Index Hashing.
DASC/PiCom/DataCom/CyberSciTech
Leandro Santiago de Araújo, Victor da Cruz Ferreira, Brunno Figueiroa Goldstein, Alexandre Solon Nery, Leandro Augusto Justen Marzulo, Sandip Kundu, Felipe Maia Galvão França
2018 — conf
A Smart Disk for In-Situ Face Recognition.
IPDPS Workshops
Victor da Cruz Ferreira, Alexandre Solon Nery, Felipe Maia Galvão França
2018 — conf
Efficient A* Co-processor for Reconfigurable Gaming Devices.
SBGames
Alexandre Solon Nery, Alexandre da Costa Sena
2017 — conf
Dataflow Programming for Stream Processing.
SBAC-PAD (Workshops)
Marcos Paulo Rocha, Felipe M. G. França, Alexandre Solon Nery, Leandro Soares Guedes
2017 — conf
Efficient Pathfinding Co-Processors for FPGAs.
SBAC-PAD (Workshops)
Alexandre Solon Nery, Alexandre da Costa Sena, Leandro Soares Guedes
2014 C conf
A framework for automatic custom instruction identification on multi-issue ASIPs.
INDIN
Alexandre Solon Nery, Nadia Nedjah, Felipe Maia Galvão França, Lech Józwiak, Henk Corporaal
2014 — conf
Automatic complex instruction identification for efficient application mapping onto ASIPs.
LASCAS
Alexandre Solon Nery, Nadia Nedjah, Felipe Maia Galvão França, Lech Józwiak, Henk Corporaal
2013 — conf
A Reconfigurable Ray-Tracing Multi-Processor SoC with Hardware Replication-Aware Instruction Set Extension.
ICA3PP (1)
Alexandre Solon Nery, Nadia Nedjah, Felipe M. G. França, Lech Józwiak, Henk Corporaal
2013 J jnl
Efficient hardware implementation of Ray Tracing based on an embedded software for intersection computation.
J. Syst. Archit.
Alexandre Solon Nery, Nadia Nedjah, Felipe M. G. França
2013 J jnl
Hardware reuse in modern application-specific processors and accelerators.
Microprocess. Microsystems
Alexandre Solon Nery, Lech Józwiak, Menno Lindwer, Mauro Cocco, Nadia Nedjah, Felipe M. G. França
2013 J jnl
Parallel processing of intersections for ray-tracing in application-specific processors and GPGPUs.
Microprocess. Microsystems
Alexandre Solon Nery, Nadia Nedjah, Felipe M. G. França, Lech Józwiak
2012 — conf
Interactive Volume Rendering Based on Ray-Casting for Multi-core Architectures.
VECPAR
Alexandre Solon Nery, Nadia Nedjah, Felipe M. G. França, Lech Józwiak
2011 C conf
A Parallel Ray Tracing Architecture Suitable for Application-Specific Hardware and GPGPU Implementations.
DSD
Alexandre Solon Nery, Nadia Nedjah, Felipe M. G. França, Lech Józwiak
2011 C conf
A parallel architecture for ray-tracing with an embedded intersection algorithm.
ISCAS
Alexandre Solon Nery, Nadia Nedjah, Felipe Maia Galvão França, Lech Józwiak
2011 C conf
Hardware Reuse in Modern Application-Specific Processors and Accelerators.
DSD
Alexandre Solon Nery, Lech Józwiak, Menno Lindwer, Mauro Cocco, Nadia Nedjah, Felipe M. G. França
2011 — conf
Massively Parallel Identification of Intersection Points for GPGPU Ray Tracing.
ICA3PP (2)
Alexandre Solon Nery, Nadia Nedjah, Felipe M. G. França, Lech Józwiak
2009 J jnl
A massively parallel hardware architecture for ray-tracing.
Int. J. High Perform. Syst. Archit.
Alexandre Solon Nery, Nadia Nedjah, Felipe M. G. França
2009 C conf
GridRT: A Massively Parallel Architecture for Ray-Tracing Using Uniform Grids.
DSD
Alexandre Solon Nery, Nadia Nedjah, Felipe Maia Galvão França