Alexander Sudnitson

28 papers B 1C 5Journal 3Unranked 19

Year	Rank	Type	Title / Venue / Authors
2017	—	`conf`	RAM-based mergers for data sort and frequent item computation. MIPRO Artjem Rjabov, Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson
2017	C	`conf`	Reconfigurable systems in engineering education: Best practices and future trends. EDUCON Iouliia Skliarova, Valery Sklyarov, Alexander Sudnitson, Margus Kruus
2016	J	`jnl`	Computing Sorted Subsets for Data Processing in Communicating Software/Hardware Control Systems. Int. J. Comput. Commun. Control Valery Sklyarov, Iouliia Skliarova, Artjem Rjabov, Alexander Sudnitson
2015	C	`conf`	Analysis and Comparison of Attainable Hardware Acceleration in All Programmable Systems-on-Chip. DSD Valery Sklyarov, Iouliia Skliarova, João Paulo Sá da Silva, Alexander Sudnitson
2015	—	`conf`	FPGA-based time and cost effective Hamming weight comparators for binary vectors. EUROCON Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, Margus Kruus
2015	—	`conf`	Integration of high-level synthesis to the courses on reconfigurable digital systems. MIPRO Iouliia Skliarova, Valery Sklyarov, Alexander Sudnitson, Margus Kruus
2014	—	`conf`	Design space exploration in multi-level computing systems. CompSysTech Valery Sklyarov, Iouliia Skliarova, João Paulo Sá da Silva, Alexander Sudnitson
2014	J	`jnl`	FPGA-based Accelerators for Parallel Data Sort. Appl. Comput. Syst. Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson
2014	C	`conf`	Teaching FPGA-based systems. EDUCON Iouliia Skliarova, Valery Sklyarov, Alexander Sudnitson, Margus Kruus
2013	—	`conf`	Address-based data processing over N-ary trees. EUROCON Valery Sklyarov, Iouliia Skliarova, Margus Kruus, Dmitri Mihhailov, Alexander Sudnitson
2013	—	`conf`	Implementation of address-based data sorting on different FPGA platforms. EWDTS Dmitri Mihhailov, Alexander Sudnitson, Valery Sklyarov, Iouliia Skliarova
2013	—	`conf`	Implementation of parallel operations over streams in extensible processing platforms. MWSCAS Valery Sklyarov, Iouliia Skliarova, Artjem Rjabov, Alexander Sudnitson
2013	—	`conf`	Optimization of address-based data sorting unit with external memory support. CompSysTech Dmitri Mihhailov, Artjem Rjabov, Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson
2012	C	`conf`	Methodology and international collaboration in teaching reconfigurable systems. EDUCON Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson
2012	—	`conf`	Performance evaluation for FPGA-based processing of tree-like structures. ICECS Valery Sklyarov, Iouliia Skliarova, Dmitri Mihhailov, Alexander Sudnitson
2011	C	`conf`	High-performance hardware accelerators for sorting and managing priorities. DDECS Valery Sklyarov, Iouliia Skliarova, Dmitri Mihhailov, Alexander Sudnitson
2011	B	`conf`	Implementation in FPGA of Address-Based Data Sorting. FPL Valery Sklyarov, Iouliia Skliarova, Dmitri Mihhailov, Alexander Sudnitson
2011	—	`conf`	Recursion and hierarchy in digital design and prototyping: a case study. CompSysTech Dmitri Mihhailov, Margus Kruus, Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson
2011	J	`jnl`	Using SAT-Based Techniques in Low Power State Assignment. J. Circuits Syst. Comput. Assim Sagahyroon, Fadi A. Aloul, Alexander Sudnitson
2010	—	`conf`	Advanced topics of FSM design using FPGA educational boards and web-based tools. EWDTS Alexander Sudnitson, Dmitri Mihhailov, Margus Kruus
2010	—	`conf`	Application-specific hardware accelerator for implementing recursive sorting algorithms. FPT Dmitri Mihhailov, Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson
2010	—	`conf`	Parallel FPGA-Based Implementation of Recursive Sorting Algorithms. ReConFig Dmitri Mihhailov, Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson
2010	—	`conf`	Synthesis and Implementation of Hierarchical Finite State Machines with Implicit Modules. ReConFig Valery Sklyarov, Iouliia Skliarova, Dmitri Mihhailov, Alexander Sudnitson
2009	—	`conf`	FSM decomposition with application to FPGA synthesis. CompSysTech Alexander Sudnitson, Dmitri Mihhailov, Margus Kruus, Konstantin Tarletski
2008	—	`conf`	FPGA platform based digital design education. CompSysTech Dmitri Mihhailov, Margus Kruus, Alexander Sudnitson
2004	—	`conf`	Asynchronous e-learning resources for hardware design issues. CompSysTech Artur Jutman, Alexander Sudnitson, Raimund Ubar, Heinz-Dietrich Wuttke
2003	—	`conf`	A decomposition procedure for register-transfer level power management. CompSysTech Elena Fomina, Andres Keevallik, Margus Kruus, Alexander Sudnitson
2002	—	`conf`	Computational kernel extraction for synthesis of power-managed sequential components. ICECS Alexander Sudnitson