Alejandro Rico

36 papers A* 3A 5B 5C 1Journal 10Unranked 12

Year	Rank	Type	Title / Venue / Authors
2024	J	`jnl`	AMD XDNA NPU in Ryzen AI Processors. IEEE Micro Alejandro Rico, Satyaprakash Pareek, Javier Cabezas, David Clarke, Baris Özgül, Francisco Barat, Yao Fu, Stephan Münz, Dylan Stuart, Patrick Schlangen, Pedro Duarte, Sneha Date, Indrani Paul, Jian Weng, Sonal Santan, Vinod Kathail, Ashish Sirasao, Juanjo Noguera
2023	A*	`conf`	DynAMO: Improving Parallelism Through Dynamic Placement of Atomic Memory Operations. ISCA Víctor Soria Pardos, Adrià Armejach, Tiago Mück, Darío Suárez Gracia, José A. Joao, Alejandro Rico, Miquel Moretó
2022	—	`conf`	System technology co-optimization and design challenges for 3D IC. CICC Supreet Jeloka, Brian Cline, Shidhartha Das, Benoit Labbe, Alejandro Rico, Rainer Herberholz, Javier A. DeLaCruz, Rahul Mathur, Shawn Hung
2021	A	`conf`	Power Delivery and Thermal-Aware Arm-Based Multi-Tier 3D Architecture. ISLPED Lingjun Zhu, Tuan Ta, Rossana Liu, Rahul Mathur, Xiaoqing Xu, Shidhartha Das, Ankit Kaul, Alejandro Rico, Doug Joseph, Brian Cline, Sung Kyu Lim
2020	C	`conf`	Towards Data-Flow Parallelization for Adaptive Mesh Refinement Applications. CLUSTER Kevin Sala, Alejandro Rico, Vicenç Beltran
2019	—	`conf`	Cache Line Sharing and Communication in ECP Proxy Applications. IWOMP Joshua Randall, Alejandro Rico, José A. Joao
2019	A*	`conf`	DynaSprint: Microarchitectural Sprints with Dynamic Utility and Thermal Management. MICRO Ziqiang Huang, José A. Joao, Alejandro Rico, Andrew D. Hilton, Benjamin C. Lee
2019	—	`conf`	On the Benefits of Tasking with OpenMP. IWOMP Alejandro Rico, Isaac Sánchez Barrera, José A. Joao, Joshua Randall, Marc Casas, Miquel Moretó
2019	J	`jnl`	On the maturity of parallel applications for asymmetric multi-core processors. J. Parallel Distributed Comput. Kallia Chronaki, Miquel Moretó, Marc Casas, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Mateo Valero
2019	J	`jnl`	Sampled Simulation of Task-Based Programs. IEEE Trans. Computers Thomas Grass, Trevor E. Carlson, Alejandro Rico, Germán Ceballos, Eduard Ayguadé, Marc Casas, Miquel Moretó
2019	—	`conf`	Scaling up performance of fat nodes for HPC. CF Alejandro Rico
2018	J	`jnl`	The ARM Scalable Vector Extension. CoRR Nigel Stephens, Stuart Biles, Matthias Boettcher, Jacob Eapen, Mbou Eyole, Giacomo Gabrielli, Matt Horsnell, Grigorios Magklis, Alejandro Martinez, Nathanaël Prémillieu, Alastair Reid, Alejandro Rico, Paul Walker
2017	—	`conf`	ARM HPC Ecosystem and the Reemergence of Vectors: Invited Paper. Conf. Computing Frontiers Alejandro Rico, José A. Joao, Chris Adeniyi-Jones, Eric Van Hensbergen
2017	J	`jnl`	Adaptive Runtime-Assisted Block Prefetching on Chip-Multiprocessors. Int. J. Parallel Program. Victor Garcia, Alejandro Rico, Carlos Villavieja, Paul M. Carpenter, Nacho Navarro, Alex Ramírez
2017	B	`conf`	Sharing the instruction cache among lean cores on an asymmetric CMP for HPC applications. ISPASS Ugljesa Milic, Alejandro Rico, Paul M. Carpenter, Alex Ramírez
2017	J	`jnl`	Task Scheduling Techniques for Asymmetric Multi-Core Systems. IEEE Trans. Parallel Distributed Syst. Kallia Chronaki, Alejandro Rico, Marc Casas, Miquel Moretó, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero
2017	J	`jnl`	The ARM Scalable Vector Extension. IEEE Micro Nigel Stephens, Stuart Biles, Matthias Boettcher, Jacob Eapen, Mbou Eyole, Giacomo Gabrielli, Matt Horsnell, Grigorios Magklis, Alejandro Martinez, Nathanaël Prémillieu, Alastair Reid, Alejandro Rico, Paul Walker
2016	—	`conf`	Evaluating the effect of last-level cache sharing on integrated GPU-CPU systems with heterogeneous applications. IISWC Victor Garcia, Juan Gómez-Luna, Thomas Grass, Alejandro Rico, Eduard Ayguadé, Antonio J. Peña
2016	A	`conf`	MUSA: a multi-level simulation approach for next-generation HPC machines. SC Thomas Grass, César Allande, Adrià Armejach, Alejandro Rico, Eduard Ayguadé, Jesús Labarta, Mateo Valero, Marc Casas, Miquel Moretó
2016	B	`conf`	POSTER: Exploiting Asymmetric Multi-Core Processors with Flexible System Sofware. PACT Kallia Chronaki, Miquel Moretó, Marc Casas, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero
2016	—	`conf`	Rebalancing the core front-end through HPC code analysis. IISWC Ugljesa Milic, Paul M. Carpenter, Alejandro Rico, Alex Ramírez
2016	B	`conf`	TaskPoint: Sampled simulation of task-based programs. ISPASS Thomas Grass, Alejandro Rico, Marc Casas, Miquel Moretó, Eduard Ayguadé
2016	A	`conf`	The mont-blanc prototype: an alternative approach for HPC systems. SC Nikola Rajovic, Alejandro Rico, Filippo Mantovani, Daniel Ruiz, Josep Oriol Vilarrubi, Constantino Gómez, Luna Backes, Diego Nieto, Harald Servat, Xavier Martorell, Jesús Labarta, Eduard Ayguadé, Chris Adeniyi-Jones, Said Derradji, Hervé Gloaguen, Piero Lanucara, Nico Sanna, Jean-François Méhaut, Kevin Pouget, Brice Videau, Eric Boyer, Momme Allalen, Axel Auweter, David Brayford, Daniele Tafani, Volker Weinberg, Dirk Brömmel, René Halver, Jan H. Meinke, Ramón Beivide, Mariano Benito, Enrique Vallejo, Mateo Valero, Alex Ramírez
2015	A	`conf`	Criticality-Aware Dynamic Task Scheduling for Heterogeneous Architectures. ICS Kallia Chronaki, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero
2015	—	`conf`	Experiences in speeding up computer vision applications on mobile computing platforms. SAMOS Luna Backes, Alejandro Rico, Björn Franke
2014	—	`conf`	Evaluating Execution Time Predictability of Task-Based Programs on Multi-Core Processors. Euro-Par Workshops (2) Thomas Grass, Alejandro Rico, Marc Casas, Miquel Moretó, Alex Ramírez
2014	J	`jnl`	Tibidabo: Making the case for an ARM-based HPC system. Future Gener. Comput. Syst. Nikola Rajovic, Alejandro Rico, Nikola Puzovic, Chris Adeniyi-Jones, Alex Ramírez
2013	A	`conf`	Experiences with mobile processors for energy efficient HPC. DATE Nikola Rajovic, Alejandro Rico, James Vipond, Isaac Gelado, Nikola Puzovic, Alex Ramírez
2013	B	`conf`	Trace filtering of multithreaded applications for CMP memory simulation. ISPASS Alejandro Rico, Alex Ramírez, Mateo Valero
2012	J	`jnl`	On the simulation of large-scale architectures using multiple application abstraction levels. ACM Trans. Archit. Code Optim. Alejandro Rico, Felipe Cabarcas, Carlos Villavieja, Milan Pavlovic, Augusto Vega, Yoav Etsion, Alex Ramírez, Mateo Valero
2011	B	`conf`	Trace-driven simulation of multithreaded applications. ISPASS Alejandro Rico, Alejandro Duran, Felipe Cabarcas, Yoav Etsion, Alex Ramírez, Mateo Valero
2010	—	`conf`	Comparing last-level cache designs for CMP architectures. IFMT Augusto Vega, Alejandro Rico, Felipe Cabarcas, Alex Ramírez, Mateo Valero
2010	—	`conf`	Interleaving granularity on high bandwidth memory architecture for CMPs. ICSAMOS Felipe Cabarcas, Alejandro Rico, Yoav Etsion, Alex Ramírez
2010	—	`conf`	Performance and power evaluation of an in-line accelerator. Conf. Computing Frontiers Alejandro Rico, Jeff H. Derby, Robert K. Montoye, Timothy H. Heil, Chen-Yong Cher, Pradip Bose
2010	A*	`conf`	Task Superscalar: An Out-of-Order Task Pipeline. MICRO Yoav Etsion, Felipe Cabarcas, Alejandro Rico, Alex Ramírez, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero
2009	J	`jnl`	Available task-level parallelism on the Cell BE. Sci. Program. Alejandro Rico, Alex Ramírez, Mateo Valero