Alejandro Nocua

11 papers C 3Journal 4Unranked 4
YearRankTypeTitle / Venue / Authors
2021 — conf
Multilevel simulation-based co-design of next generation HPC microprocessors.
PMBS
Lilia Zaourar, Mohamed Benazouz, Ayoub Mouhagir, Fatma Jebali, Tanguy Sassolas, Jean-Christophe Weill, Carlos Falquez, Nam Ho, Dirk Pleiter, Antoni Portero, Estela Suarez, Polydoros Petrakis, Vassilis Papaefstathiou, Manolis Marazakis, Milan Radulovic, Francesc Martínez, Adrià Armejach, Marc Casas, Alejandro Nocua, Romain Dolbeau
2020 C conf
Mont-Blanc 2020: Simulation Efforts Towards Exascale High Performance Computing : Embedded Tutorial on "DDECS-2020".
DDECS
Alejandro Nocua, Said Derradji, Gregory Vaumourin, Pierre-Axel Lagadec, Zoltan Menyhart
2019 J jnl
A gem5 trace-driven simulator for fast architecture exploration of OpenMP workloads.
Microprocess. Microsystems
Alejandro Nocua, Florent Bruguier, Gilles Sassatelli, Abdoulaye Gamatié
2018 — conf
Evaluation of Heterogeneous Multicore Cluster Architectures Designed for Mobile Computing.
ReCoSoC
David Novo, Alejandro Nocua, Florent Bruguier, Abdoulaye Gamatié, Gilles Sassatelli
2017 J jnl
A Cross-Level Power Estimation Technique to Enhance High-Level Power Models Quality.
J. Low Power Electron.
Alejandro Nocua, Arnaud Virazel, Alberto Bosio, Patrick Girard, Cyril Chevalier
2017 — conf
ElasticSimMATE: A fast and accurate gem5 trace-driven simulator for multicore systems.
ReCoSoC
Alejandro Nocua, Florent Bruguier, Gilles Sassatelli, Abdoulaye Gamatié
2017 J jnl
HPET: An Efficient Hybrid Power Estimation Technique to Improve High-Level Power Characterization.
J. Circuits Syst. Comput.
Alejandro Nocua, Arnaud Virazel, Alberto Bosio, Patrick Girard, Cyril Chevalier
2016 C conf
A Hybrid Power Estimation Technique to improve IP power models quality.
VLSI-SoC
Alejandro Nocua, Arnaud Virazel, Alberto Bosio, Patrick Girard, Cyril Chevalier
2016 C conf
A hybrid power modeling approach to enhance high-level power models.
DDECS
Alejandro Nocua, Arnaud Virazel, Alberto Bosio, Patrick Girard, Cyril Chevalier
2015 — conf
An efficient hybrid power modeling approach for accurate gate-level power estimation.
ICM
Alejandro Nocua, Arnaud Virazel, Alberto Bosio, Patrick Girard, Cyril Chevalier
2015 J jnl
Screening small-delay defects using inter-path correlation to reduce reliability risk.
Microelectron. Reliab.
Jose Luis Garcia-Gervacio, Alejandro Nocua, Víctor H. Champac