Alan P. Su

13 papers Misc 1Journal 1Unranked 11
YearRankTypeTitle / Venue / Authors
2018 J jnl
A Hybrid Multicast Routing Approach with Enhanced Methods for Mesh-Based Networks-on-Chip.
IEEE Trans. Computers
Chun-Wei Wu, Kuen-Jong Lee, Alan P. Su
2017 — conf
A low power synthesis flow for multi-rate systems.
VLSI-DAT
Hsin-Pang Kuo, Alan P. Su, Kuen-Jong Lee
2012 — conf
Buffer size minimization method considering mix-clock domains and discontinuous data access.
APCCAS
Lih-Yih Chiou, Liang-Ying Lu, Bo-Chi Lin, Alan P. Su
2011 — conf
A software/hardware co-debug platform for multi-core systems.
ASICON
Kuen-Jong Lee, Alan P. Su, Long-Feng Chen, Jia-Wei Jhou, Jiff Kuo, Mark Liu
2010 — conf
A practice of ESL verification methodology from SystemC to FPGA: using EPC class-1 generation-2 RFID tag design as an example.
ASP-DAC
W. M. Young, Chua-Huang Huang, Alan P. Su, Chewnpu Jou, Fu-Lung Hsueh
2010 — conf
Application of ESL synthesis on GSM edge algorithm for base station.
ASP-DAC
Alan P. Su
2009 — conf
A low-cost SOC debug platform based on on-chip test architectures.
SoCC
Kuen-Jong Lee, Si-Yuan Liang, Alan P. Su
2009 — conf
Transaction Level Modeling and Design Space Exploration for SOC Test Architectures.
Asian Test Symposium
Chin-Yao Chang, Chih-Yuan Hsiao, Kuen-Jong Lee, Alan P. Su
2008 — conf
Flow Maximization for NoC Routing Algorithms.
ISVLSI
Ying-Cherng Lan, Michael C. Chen, Alan P. Su, Yu Hen Hu, Sao-Jie Chen
2008 — conf
Fluidity concept for NoC: A congestion avoidance and relief routing scheme.
SoCC
Ying-Cherng Lan, Michael C. Chen, Alan P. Su, Yu Hen Hu, Sao-Jie Chen
2007 Misc conf
An architectural co-synthesis algorithm for energy-aware network-on-chip design.
SAC
Wei-Hsuan Hung, Yi-Jung Chen, Chia-Lin Yang, Yen-Sheng Chang, Alan P. Su
2006 — conf
Applying ESL in A Dual-Core SoC Platform Designing.
SoCC
Alan P. Su, Robert Chen
2004 — conf
Low Power Heuristic Block-level Voltage/Frequency Scheduling.
ESA/VLSI
Li-Chuan Weng, Xiaojun Wang, Alan P. Su, Bin Liu