Akira Tsukamoto

24 papers A 1B 1C 2Journal 14Unranked 6
YearRankTypeTitle / Venue / Authors
2023 J jnl
A cross-process Spectre attack via cache on RISC-V processor with trusted execution environment.
Comput. Electr. Eng.
Anh-Tien Le, Trong-Thuc Hoang, Ba-Anh Dao, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2022 J jnl
A Robust and Healthy Against PVT Variations TRNG Based on Frequency Collapse.
IEEE Access
Ronaldo Serrano, Ckristian Duran, Marco Sarmiento, Trong-Thuc Hoang, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2022 — conf
High-performance Multi-function HMAC-SHA2 FPGA Implementation.
NEWCAS
Binh Kieu-Do-Nguyen, Trong-Thuc Hoang, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2022 C conf
Spectre attack detection with Neutral Network on RISC-V processor.
ISCAS
Anh-Tien Le, Trong-Thuc Hoang, Ba-Anh Dao, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2022 J jnl
Trusted Execution Environment Hardware by Isolated Heterogeneous Architecture for Key Scheduling.
IEEE Access
Trong-Thuc Hoang, Ckristian Duran, Ronaldo Serrano, Marco Sarmiento, Khai-Duy Nguyen, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 J jnl
A Fully Digital True Random Number Generator With Entropy Source Based in Frequency Collapse.
IEEE Access
Ronaldo Serrano, Ckristian Duran, Trong-Thuc Hoang, Marco Sarmiento, Khai-Duy Nguyen, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 J jnl
A Real-Time Cache Side-Channel Attack Detection System on RISC-V Out-of-Order Processor.
IEEE Access
Anh-Tien Le, Trong-Thuc Hoang, Ba-Anh Dao, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 — conf
ChaCha20-Poly1305 Crypto Core Compatible with Transport Layer Security 1.3.
ISOCC
Ronaldo Serrano, Ckristian Duran, Trong-Thuc Hoang, Marco Sarmiento, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 J jnl
Correlation Power Analysis Attack Resisted Cryptographic RISC-V SoC With Random Dynamic Frequency Scaling Countermeasure.
IEEE Access
Ba-Anh Dao, Trong-Thuc Hoang, Anh-Tien Le, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 J jnl
Exploiting the Back-Gate Biasing Technique as a Countermeasure Against Power Analysis Attacks.
IEEE Access
Ba-Anh Dao, Trong-Thuc Hoang, Anh-Tien Le, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 — conf
System-on-Chip Implementation of Trusted Execution Environment with Heterogeneous Architecture.
HCS
Trong-Thuc Hoang, Ckristian Duran, Ronaldo Serrano, Marco Sarmiento, Khai-Duy Nguyen, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 J jnl
TS-Perf: General Performance Measurement of Trusted Execution Environment and Rich Execution Environment on Intel SGX, Arm TrustZone, and RISC-V Keystone.
IEEE Access
Kuniyasu Suzaki, Kenta Nakajima, Tsukasa Oi, Akira Tsukamoto
2020 J jnl
An in vitro model of temporal enhancement of epithelium barrier permeability by low-energy shock waves without contrast agents.
Medical Biol. Eng. Comput.
Yuki Monden, Akira Tsukamoto, Takashi Ushida, Etsuko Kobayashi, Keiichi Nakagawa, Ichiro Sakuma
2020 C conf
Cryptographic Accelerators for Trusted Execution Environment in RISC-V Processors.
ISCAS
Trong-Thuc Hoang, Ckristian Duran, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2020 B conf
Library Implementation and Performance Analysis of GlobalPlatform TEE Internal API for Intel SGX and RISC-V Keystone.
TrustCom
Kuniyasu Suzaki, Kenta Nakajima, Tsukasa Oi, Akira Tsukamoto
2020 J jnl
Low-power high-performance 32-bit RISC-V microcontroller on 65-nm silicon-on-thin-BOX (SOTB).
IEICE Electron. Express
Trong-Thuc Hoang, Ckristian Duran, Khai-Duy Nguyen, Tuan-Kiet Dang, Quynh Nguyen Quang Nhu, Phuc Hong Than, Xuan-Tu Tran, Duc-Hung Le, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2020 J jnl
Quick Boot of Trusted Execution Environment With Hardware Accelerators.
IEEE Access
Trong-Thuc Hoang, Ckristian Duran, Duc-Thinh Nguyen-Hoang, Duc-Hung Le, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2020 A conf
Reboot-Oriented IoT: Life Cycle Management in Trusted Execution Environment for Disposable IoT devices.
ACSAC
Kuniyasu Suzaki, Akira Tsukamoto, Andy Green, Mohammad Mannan
2018 — conf
A two-stage-pipeline CPU of SH-2 architecture implemented on FPGA and SoC for IoT, edge AI and robotic applications.
COOL CHIPS
Kesami Hagiwara, Tomoichi Hayashi, Shumpei Kawasaki, Fumio Arakawa, Oleg Endo, Hayato Nomura, Akira Tsukamoto, Duong Nguyen, Binh Nguyen, Anh Tran, Hoan Hyunh, Ikuo Kudoh, Cong-Kha Pham
2018 — conf
Analysis of Dielectrophoretic Properties of Cells by the use of the Uniform Field Gradient.
WAC
Shigeru Tada, Yui Omi, Masanori Eguchi, Noriko Nakai, Akira Tsukamoto
2012 J jnl
Recent Developments of High-
IEICE Trans. Electron.
Seiji Adachi, Akira Tsukamoto, Tsunehiro Hato, Joji Kawano, Keiichi Tanabe
2009 J jnl
Liquid-Phase Detection of Biological Targets with Magnetic Marker and Superconducting Quantum Interference Device.
IEICE Trans. Electron.
Keiji Enpuku, Yuki Sugimoto, Yuya Tamai, Akira Tsukamoto, Takako Mizoguchi, Akihiko Kandori, Naoki Usuki, Hisao Kanzaki, Kohji Yoshinaga, Yoshinori Sugiura, Hiroyuki Kuma, Naotaka Hamasaki
2005 J jnl
Magnetic Marker and High
IEICE Trans. Electron.
Keiji Enpuku, Katsuhiro Inoue, Kohji Yoshinaga, Akira Tsukamoto, Kazuo Saitoh, Keiji Tsukada, Akihiko Kandori, Yoshinori Sugiura, Shigenori Hamaoka, Hiroyuki Morita, Hiroyuki Kuma, Naotaka Hamasaki
2005 — conf
Scalable Overlay Network Deployment for Dynamic Collaborative Groups.
SAINT
Norihito Fujita, Yuichi Ishikawa, Toshio Koide, Akira Tsukamoto