Akira Tanabe

12 papers C 1Journal 7Unranked 4
YearRankTypeTitle / Venue / Authors
2015 C conf
CIT Brains KidSize Robot: RoboCup 2015 KidSize League Winner.
RoboCup
Yasuo Hayashibara, Hideaki Minakata, Kiyoshi Irie, Daiki Maekawa, George Tsukioka, Yasufumi Suzuki, Taiitiro Mashiko, Yusuke Ito, Ryu Yamamoto, Masayuki Ando, Shouta Hirama, Yukari Suzuki, Chisato Kasebayashi, Akira Tanabe, Youta Seki, Moeno Masuda, Yuya Hirata, Yuuki Kanno, Tomotaka Suzuki, Joshua Supratman, Kosuke Machi, Shigechika Miki, Yoshitaka Nishizaki, Kenji Kanemasu, Hajime Sakamoto
2015 — conf
Low-power embedded ReRAM technology for IoT applications.
VLSIC
Makoto Ueki, K. Takeuchi, T. Yamamoto, Akira Tanabe, N. Ikarashi, M. Saitoh, T. Nagumo, Hiroshi Sunamura, Mitsuru Narihiro, Kazuya Uejima, Koji Masuzaki, Naoya Furutake, S. Saito, Y. Yabe, Akira Mitsuiki, Koichi Takeda, Takashi Hase, Yoshihiro Hayashi
2011 J jnl
A Novel Variable Inductor Using a Bridge Circuit and Its Application to a 5-20 GHz Tunable LC-VCO.
IEEE J. Solid State Circuits
Akira Tanabe, Ken'ichiro Hijioka, Hirokazu Nagase, Yoshihiro Hayashi
2009 J jnl
A 40 Gb/s Multi-Data-Rate CMOS Transmitter and Receiver Chipset With SFI-5 Interface for Optical Transmission Systems.
IEEE J. Solid State Circuits
Shunichi Kaeriyama, Yasushi Amamiya, Hidemi Noguchi, Zin Yamazaki, Tomoyuki Yamase, Ken'ichi Hosoya, Minoru Okamoto, Shiro Tomari, Hiroshi Yamaguchi, Hiroaki Shoda, Hironobu Ikeda, Shinji Tanaka, Tsugio Takahashi, Risato Ohhira, Arihide Noda, Ken'ichiro Hijioka, Akira Tanabe, Sadao Fujita, Nobuhiro Kawahara
2009 — conf
A 40Gb/s multi-data-rate CMOS transceiver chipset with SFI-5 interface for optical transmission systems.
ISSCC
Yasushi Amamiya, Shunichi Kaeriyama, Hidemi Noguchi, Zin Yamazaki, Tomoyuki Yamase, Ken'ichi Hosoya, Minoru Okamoto, Shiro Tomari, Hiroshi Yamaguchi, Hiroaki Shoda, Hironobu Ikeda, Shinji Tanaka, Tsugio Takahashi, Risato Ohhira, Arihide Noda, Ken'ichiro Hijioka, Akira Tanabe, Sadao Fujita, Nobuhiro Kawahara
2006 — conf
A Novel Monitoring Method of RF Characteristics Variations for Sub-0.1μm MOSFETs with Precise Gate-resistance Model.
CICC
Akira Tanabe, Ken'ichiro Hijioka, Yoshihiro Hayashi
2003 J jnl
A redundant multivalued logic for a 10-Gb/s CMOS demultiplexer IC.
IEEE J. Solid State Circuits
Akira Tanabe, Yasushi Nakahara, Akio Furukawa, Tohru Mogami
2001 J jnl
0.18- μm CMOS 10-Gb/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold voltage fluctuation.
IEEE J. Solid State Circuits
Akira Tanabe, Masato Umetani, Ikuo Fujiwara, Takayuki Ogura, Kotaro Kataoka, Masao Okihara, Hiroshi Sakuraba, Tetsuo Endoh, Fujio Masuoka
2001 — conf
Beyond the red brick wall (panel): challenges and solutions in 50nm physical design.
ASP-DAC
Hidetoshi Onodera, Andrew B. Kahng, Wayne Wei-Ming Dai, Sani R. Nassif, Juho Kim, Akira Tanabe, Toshihiro Hattori
1998 J jnl
A single-chip 2.4-Gb/s CMOS optical receiver IC with low substrate cross-talk preamplifier.
IEEE J. Solid State Circuits
Akira Tanabe, Masaaki Soda, Yasushi Nakahara, Takao Tamura, Kazuyoshi Yoshida, Akio Furukawa
1996 J jnl
2.8-Gb/s 176-mW byte-interleaved and 3.0-Gb/s 118-mW bit-interleaved 8: 1 multiplexers with a 0.15-μm CMOS technology.
IEEE J. Solid State Circuits
Masakazu Kurisu, Makoto Kaneko, Tetsuyuki Suzaki, Akira Tanabe, Mitsuhiro Togo, Akio Furukawa, Takao Tamura, Ken Nakajima, Kazuyoshi Yoshida
1992 J jnl
A 30-ns 64-Mb DRAM with built-in self-test and self-repair function.
IEEE J. Solid State Circuits
Akira Tanabe, Toshio Takeshima, Hiroki Koike, Yoshiharu Aimoto, Masahide Takada, Toshiyuki Ishijima, Naoki Kasai, Hiromitsu Hada, Kentaro Shibahara, Takemitsu Kunio, Takaho Tanigawa, Takanori Saeki, Masato Sakao, Hidenobu Miyamoto, Hiroshi Nozue, Shuichi Ohya, Tatsunori Murotani, Kuniaki Koyama, Takashi Okuda