Akinori Kanasugi

22 papers Journal 15Unranked 7
YearRankTypeTitle / Venue / Authors
2020 J jnl
A design of EPIC type processor based on MIPS architecture.
Artif. Life Robotics
Takahito Hayashi, Akinori Kanasugi
2020 J jnl
An integrated machine code monitor for a RISC-V processor on an FPGA.
Artif. Life Robotics
Hiroaki Kaneko, Akinori Kanasugi
2018 — conf
Design of Approximate Arithmetic Circuits within Tolerance.
CEEC
Akihiko Tsukahara, Akinori Kanasugi
2015 — conf
Design of a Real Coded GA Processor.
IJCCI (ECTA)
Akihiko Tsukahara, Akinori Kanasugi
2015 J jnl
Generator of dynamically reconfigurable processor.
Artif. Life Robotics
Takahiko Sega, Akinori Kanasugi, Ki Ando
2015 J jnl
Hardware implementation of evolutionary algorithms using dynamic reconfiguration technology.
Nat. Comput.
Akinori Kanasugi, Akihiko Tsukahara, Ki Ando
2014 J jnl
A novel architecture of dynamically reconfigurable fused multiply-adder for digital signal processing.
Artif. Life Robotics
Akihiko Tsukahara, Akinori Kanasugi
2014 J jnl
Accuracy improvement of genetic algorithm for obtaining floating-point solution.
Artif. Life Robotics
Kengo Nishijima, Akinori Kanasugi, Ki Ando
2014 J jnl
Position detection method for microwell chip on microscope stage by photon multiplier tube.
Artif. Life Robotics
Ki Ando, Hidekazu Uchida, Shamim Ahmed, Koichi Nishigaki, Osamu Takei, Akinori Kanasugi
2012 J jnl
A Processor for GA based on Redundant Binary Number using FPGA.
J. Next Gener. Inf. Technol.
Akira Murayama, Akinori Kanasugi
2010 J jnl
A Design and Simulation for Dynamically Reconfigurable Systolic Array.
Int. J. Inf. Process. Manag.
Toshiyuki Ishimura, Akinori Kanasugi
2010 J jnl
A Processor for Genetic Algorithm Based on Redundant Binary Number.
J. Next Gener. Inf. Technol.
Masanao Aoshima, Akinori Kanasugi
2010 J jnl
A dynamically reconfigurable processor for H.264/AVC image prediction.
Artif. Life Robotics
Yuki Hayakawa, Akinori Kanasugi
2010 J jnl
A novel coding method for genetic algorithms based on redundant binary numbers.
Artif. Life Robotics
Akira Murayama, Akinori Kanasugi
2010 — conf
Design of Dynamically Reconfigurable Processor for the H.264/AVC Image Prediction and De-blocking Filter.
CSE
Yuki Hayakawa, Akinori Kanasugi
2007 J jnl
A Processor for Genetic Algorithm using Dynamically Reconfigurable Memory.
J. Convergence Inf. Technol.
Akinori Kanasugi, Akihiko Tsukahara
2007 — conf
Design and Implementation of Rough Rules Generation from Logical Rules on FPGA Board.
RSEISP
Akinori Kanasugi, Mitsuhiro Matsumoto
2007 — conf
Genetic Algorithm that can Dynamically Change Number of Individuals and Accuracy.
FBIT
Akihiko Tsukahara, Akinori Kanasugi
2001 — conf
A Design of Architecture for Rough Set Processor.
JSAI Workshops
Akinori Kanasugi
1998 — conf
A Genetic Algorithm for Switchbox Routing Problem.
Rough Sets and Current Trends in Computing
Akinori Kanasugi, Takashi Shimayama, Naoshi Nakaya, Takeshi Iizuka
1997 J jnl
A digital application of chaotic oscillation modes in Josephson circuit.
Int. J. Intell. Syst.
Mititada Morisue, Masayuki Yamadaya, Hiroshi Noguchi, Akinori Kanasugi
1988 J jnl
A wafer-scale 170000-gate FFT processor with built-in test circuits.
IEEE J. Solid State Circuits
Koichi Yamashita, Akinori Kanasugi, Shinpei Hijiya, Gensuke Goto, Nobutake Matsumura, Takehide Shirato