Akash Kumar - RankMe

322 papers A* 13A 56B 18C 33Misc 17Journal 113Unranked 70

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	BiKA: Kolmogorov-Arnold-Network-inspired Ultra Lightweight Neural Network Hardware Accelerator. CoRR Yuhao Liu, Salim Ullah, Akash Kumar
2026	J	`jnl`	Bitwise Systolic Array Architecture for Runtime-Reconfigurable Multi-precision Quantized Multiplication on Hardware Accelerators. CoRR Yuhao Liu, Salim Ullah, Akash Kumar
2026	J	`jnl`	C-SIMD: CORDIC-Driven SIMD Processing Element for Resource-Efficient Multi-Precision Deep Learning Inference. IEEE Access Vasundhara Trivedi, Gopal Raut, Baker Mohammad, Santosh Kumar Vishvakarma, Akash Kumar
2026	J	`jnl`	GRAU: Generic Reconfigurable Activation Unit Design for Neural Network Hardware Accelerators. CoRR Yuhao Liu, Salim Ullah, Akash Kumar
2026	J	`jnl`	Structurally Secure Obfuscation: Assessing and Mitigating Structural Vulnerabilities in Circuits Obfuscation. ACM Trans. Design Autom. Electr. Syst. Armin Darjani, Nima Kavand, Zhentao Han, Akash Kumar
2025	J	`jnl`	A bit-level loosely coupled computing-in-memory macro with early termination. Microelectron. J. Junchuan Gu, Yang Chen, Wenwei Wang, Akash Kumar, Salim Ullah, Kejie Huang, Haibin Shen
2025	J	`jnl`	Analytical Uncertainty Propagation in Neural Networks. IEEE Trans. Neural Networks Learn. Syst. Paul Jungmann, Julia Poray, Akash Kumar
2025	—	`conf`	Approximate Arithmetic Circuits Enabling Energy-Efficient Edge Computing. MOCAST Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2025	J	`jnl`	AxOSyn: An Open-source Framework for Synthesizing Novel Approximate Arithmetic Operators. CoRR Siva Satyendra Sahoo, Salim Ullah, Akash Kumar
2025	Misc	`conf`	BiKA: Binarized KAN-inspired Neural Network for Efficient Hardware Accelerator Designs. FCCM Yuhao Liu, Salim Ullah, Akash Kumar
2025	—	`conf`	Bitwise Systolic Array Architecture for Runtime-Reconfigurable Multi-Precision Quantized Multiplication on Hardware Accelerators. ISQED Yuhao Liu, Salim Ullah, Akash Kumar
2025	Misc	`conf`	Design, Model, and Explore Approximate Arithmetic Operators with AI/ML: A Tutorial. CASES Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2025	J	`jnl`	EMGAxO: Extending Machine Learning Hardware Generators With Approximate Operators. IEEE Embed. Syst. Lett. Ali Asghar, Shahzad Bangash, Suleman Shah, Laiq Hasan, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2025	J	`jnl`	Fast Retraining of Approximate CNNs for High Accuracy. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Elias Trommer, Bernd Waschneck, Akash Kumar
2025	—	`conf`	Flip-Break: Breaking Flip-flop-based Logic Locking in Sequential Circuits. ACM Great Lakes Symposium on VLSI Armin Darjani, Nima Kavand, Akash Kumar
2025	—	`conf`	Flip-UnLock: An Anomaly Detection Attack on Flip-Flop-Based Logic Locking. ISVLSI Armin Darjani, Nima Kavand, Akash Kumar
2025	J	`jnl`	GNN-MiCS: Graph Neural-Network-Based Bounding Time in Embedded Mixed-Criticality Systems. IEEE Embed. Syst. Lett. Behnaz Ranjbar, Paul Justen, Akash Kumar
2025	J	`jnl`	HTTM: Head-wise Temporal Token Merging for Faster VGGT. CoRR Weitian Wang, Lukas Meiner, Shubham Rai, Cecilia De la Parra, Akash Kumar
2025	A	`conf`	Invited Paper: Circuit and Architecture Design with Emerging Computing Paradigms. ICCAD Salim Ullah, Siva Satyendra Sahoo, Can Li, Chao Li, Liu Liu, Tomas Sousa Pereira, Bo Wen, Xunzhao Yin, Armin Darjani, Nima Kavand, Chakravarthy Bodla, Rupa Yashaswi Panduga, Aniruddh Holemadlu, Johannes Maly, Jonathan Förste, Samarth Vadia, Xiaobo Sharon Hu, Akash Kumar
2025	J	`jnl`	MdCSR: A Memory-Efficient Sparse Matrix Compression Format. IEEE Embed. Syst. Lett. Noble G, Nalesh S, S. Kala, Salim Ullah, Akash Kumar
2025	J	`jnl`	MixA-Q: Revisiting Activation Sparsity for Vision Transformers from a Mixed-Precision Quantization Perspective. CoRR Weitian Wang, Shubham Rai, Cecilia De la Parra, Akash Kumar
2025	—	`conf`	QoS-Nets: Adaptive Approximate Neural Networks. AICAS Elias Trommer, Bernd Waschneck, Akash Kumar
2025	—	`conf`	RAT: RFET-based Analog Hardware Trojan. ISVLSI Nima Kavand, Armin Darjani, Tushar Niranjan, Akash Kumar
2025	—	`conf`	Retrospective: A CORDIC Based Configurable Activation Function for NN Applications. ISVLSI Omkar Kokane, Gopal Raut, Salim Ullah, Mukul Lokhande, Adam Teman, Akash Kumar, Santosh Kumar Vishvakarma
2025	J	`jnl`	Retrospective: A CORDIC Based Configurable Activation Function for NN Applications. CoRR Omkar Kokane, Gopal Raut, Salim Ullah, Mukul Lokhande, Adam Teman, Akash Kumar, Santosh Kumar Vishvakarma
2025	Misc	`conf`	Special Sessions - Emerging Scope and Design Challenges for Approximate Computing: Optimizing Accuracy-PPA trade-offs and Beyond. CASES Siva Satyendra Sahoo, Bastien Deveautour, Marcello Traiola, Chongyan Gu, Yun Wu, Aditya Japa, Salim Ullah, Akash Kumar
2025	—	`conf`	Verilog-A Look-Up Table Model of a TIG-RFET Compatible with 22 nm FDSOI Design Rules Satisfying Gummel Symmetry. MOCAST Juan P. Martinez, Niladri Bhattacharjee, Yuxuan He, Giulio Galderisi, Nima Kavand, Akash Kumar, Thomas Mikolajick, Jens Trommer
2025	J	`jnl`	X-DINC: Toward Cross-Layer ApproXimation for theDistributed and In-Network ACceleration of Multi-Kernel Applications. Future Gener. Comput. Syst. Zahra Ebrahimi, Maryam Eslami, Xun Xiao, Akash Kumar
2024	J	`jnl`	Adapting Neural Networks at Runtime: Current Trends in At-Runtime Optimizations for Deep Learning. ACM Comput. Surv. Max Sponner, Bernd Waschneck, Akash Kumar
2024	J	`jnl`	AxOCS: Scaling FPGA-Based Approximate Operators Using Configuration Supersampling. IEEE Trans. Circuits Syst. I Regul. Pap. Siva Satyendra Sahoo, Salim Ullah, Soumyo Bhattacharjee, Akash Kumar
2024	J	`jnl`	AxOSpike: Spiking Neural Networks-Driven Approximate Operator Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2024	Misc	`conf`	BitSys: Bitwise Systolic Array Architecture for Multi-precision Quantized Hardware Accelerators. FCCM Yuhao Liu, Salim Ullah, Akash Kumar
2024	—	`ch.`	Designing Resource-Efficient Hardware Arithmetic for FPGA-Based Accelerators Leveraging Approximations and Mixed Quantizations. Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing: Hardware Architectures Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2024	A	`conf`	Dynamic Reconfigurable Security Cells Based on Emerging Devices Integrable in FDSOI Technology. DATE Niladri Bhattacharjee, Viktor Havel, Suruchi Kumari, Nima Kavand, Jorge Navarro Quijada, Akash Kumar, Thomas Mikolajick, Jens Trommer
2024	J	`jnl`	ESOMICS: ML-Based Timing Behavior Analysis for Efficient Mixed-Criticality System Design. IEEE Access Vikash Kumar, Behnaz Ranjbar, Akash Kumar
2024	J	`jnl`	Efficient Post-Training Augmentation for Adaptive Inference in Heterogeneous and Distributed IoT Environments. CoRR Max Sponner, Lorenzo Servadei, Bernd Waschneck, Robert Wille, Akash Kumar
2024	—	`conf`	Efficient Post-training Augmentation for Adaptive Inference in Heterogeneous and Distributed IoT Environments. SAMOS Max Sponner, Lorenzo Servadei, Bernd Waschneck, Robert Wille, Akash Kumar
2024	Misc	`conf`	Enabling Energy-efficient AI Computing: Leveraging Application-specific Approximations : (Education Class). CASES Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2024	—	`conf`	Flip-Lock: A Flip-Flop-Based Logic Locking Technique for Thwarting ML-based and Algorithmic Structural Attacks. ACM Great Lakes Symposium on VLSI Armin Darjani, Nima Kavand, Akash Kumar
2024	J	`jnl`	GREEN: An Approximate SIMD/MIMD CGRA for Energy-Efficient Processing at the Edge. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zahra Ebrahimi, Akash Kumar
2024	—	`conf`	Harnessing Temporal Information for Efficient Edge AI. FMEC Max Sponner, Lorenzo Servadei, Bernd Waschneck, Robert Wille, Akash Kumar
2024	J	`jnl`	Introduction to the FPL 2021 Special Section. ACM Trans. Reconfigurable Technol. Syst. Diana Göhringer, Georgios Keramidas, Akash Kumar
2024	C	`conf`	LeQC-At: Learning Quantization Configurations During Adversarial Training for Robust Deep Neural Networks. DSD Siddharth Gupta, Salim Ullah, Akash Kumar
2024	J	`jnl`	Leveraging Temporal Patterns: Automated Augmentation to Create Temporal Early Exit Networks for Efficient Edge AI. IEEE Access Max Sponner, Lorenzo Servadei, Bernd Waschneck, Robert Wille, Akash Kumar
2024	J	`jnl`	MONO: Enhancing Bit-Flip Resilience With Bit Homogeneity for Neural Networks. IEEE Embed. Syst. Lett. Maryam Eslami, Yuhao Liu, Salim Ullah, Mostafa E. Salehi, Reshad Hosseini, Seyed Ahmad Mirsalari, Akash Kumar
2024	A	`conf`	Motivating the Use of Machine-Learning for Improving Timing Behaviour of Embedded Mixed-Criticality Systems. DATE Vikash Kumar, Behnaz Ranjbar, Akash Kumar
2024	J	`jnl`	QoS-Nets: Adaptive Approximate Neural Network Inference. CoRR Elias Trommer, Bernd Waschneck, Akash Kumar
2024	J	`jnl`	QuantMAC: Enhancing Hardware Performance in DNNs With Quantize Enabled Multiply-Accumulate Unit. IEEE Access Neha Ashar, Gopal Raut, Vasundhara Trivedi, Santosh Kumar Vishvakarma, Akash Kumar
2024	A	`conf`	REDCAP: Reconfigurable RFET-Based Circuits Against Power Side-Channel Attacks. DATE Nima Kavand, Armin Darjani, Giulio Galderisi, Jens Trommer, Thomas Mikolajick, Akash Kumar
2024	—	`conf`	RFET-Based Dynamic Differential Logic Cells Against Power Side-Channel Attacks. ISVLSI Nima Kavand, Armin Darjani, Garvit Chhabra, Akash Kumar
2024	J	`jnl`	Smaller Together: Groupwise Encoding of Sparse Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Elias Trommer, Bernd Waschneck, Akash Kumar
2024	J	`jnl`	Temporal Decisions: Leveraging Temporal Correlation for Efficient Decisions in Early Exit Neural Networks. CoRR Max Sponner, Lorenzo Servadei, Bernd Waschneck, Robert Wille, Akash Kumar
2024	J	`jnl`	Thwarting GNN-Based Attacks Against Logic Locking. IEEE Trans. Inf. Forensics Secur. Armin Darjani, Nima Kavand, Shubham Rai, Akash Kumar
2024	—	`conf`	Toward Structurally Safe Design-for-Trust Techniques. APCCAS Armin Darjani, Nima Kavand, Akash Kumar
2024	J	`jnl`	Utilizing Machine Learning Techniques for Worst-Case Execution Time Estimation on GPU Architectures. IEEE Access Vikash Kumar, Behnaz Ranjbar, Akash Kumar
2023	A	`conf`	A Study of Early Aggregation in Database Query Processing on FPGAs. FPGA Mehdi Moghaddamfar, Norman May, Christian Färber, Wolfgang Lehner, Akash Kumar
2023	J	`jnl`	ACM TECS Special Issue on Embedded System Security Tutorials. ACM Trans. Embed. Comput. Syst. Aviral Shrivastava, Jian-Jia Chen, Akash Kumar, Anup Das
2023	A*	`conf`	ADAPTIVE: Agent-Based Learning for Bounding Time in Mixed-Criticality Systems. DAC Behnaz Ranjbar, Ali Hosseinghorban, Akash Kumar
2023	J	`jnl`	AxOCS: Scaling FPGA-based Approximate Operators using Configuration Supersampling. CoRR Siva Satyendra Sahoo, Salim Ullah, Soumyo Bhattacharjee, Akash Kumar
2023	J	`jnl`	AxOMaP: Designing FPGA-based Approximate Arithmetic Operators using Mathematical Programming. CoRR Siva Satyendra Sahoo, Salim Ullah, Akash Kumar
2023	—	`conf`	CoOAx: Correlation-aware Synthesis of FPGA-based Approximate Operators. ACM Great Lakes Symposium on VLSI Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2023	A	`conf`	Design Enablement Flow for Circuits with Inherent Obfuscation based on Reconfigurable Transistors. DATE Jens Trommer, Niladri Bhattacharjee, Thomas Mikolajick, Sebastian Huhn, Marcel Merten, Mohammed E. Djeridane, Muhammad Hassan, Rolf Drechsler, Shubham Rai, Nima Kavand, Armin Darjani, Akash Kumar, V. Sessi, M. Drescher, S. Kolodinski, M. Wiatr
2023	J	`jnl`	Design of Energy-Efficient RFET-Based Exact and Approximate 4:2 Compressors and Multipliers. IEEE Trans. Circuits Syst. II Express Briefs Nima Kavand, Armin Darjani, Shubham Rai, Akash Kumar
2023	A*	`conf`	Discerning Limitations of GNN-based Attacks on Logic Locking. DAC Armin Darjani, Nima Kavand, Shubham Rai, Akash Kumar
2023	—	`conf`	Formal Analysis of Camouflaged Reconfigurable Circuits. NEWCAS Steffen Märcker, Michael Raitza, Shubham Rai, Giulio Galderisi, Thomas Mikolajick, Jens Trommer, Akash Kumar
2023	J	`jnl`	High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers. IEEE Embed. Syst. Lett. Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar
2023	C	`conf`	High-Throughput Approximate Multiplication Models in PyTorch. DDECS Elias Trommer, Bernd Waschneck, Akash Kumar
2023	C	`conf`	KeRRaS: Sort-Based Database Query Processing on Wide Tables Using FPGAs. DaMoN Mehdi Moghaddamfar, Christian Färber, Wolfgang Lehner, Akash Kumar
2023	A	`conf`	Learning-Oriented Reliability Improvement of Computing Systems From Transistor to Application Level. DATE Behnaz Ranjbar, Florian Klemme, Paul R. Genssler, Hussam Amrouch, Jinhyo Jung, Shail Dave, Hwisoo So, Kyongwoo Lee, Aviral Shrivastava, Ji-Yung Lin, Pieter Weckx, Subrat Mishra, Francky Catthoor, Dwaipayan Biswas, Akash Kumar
2023	J	`jnl`	MTTR reduction of FPGA scrubbing: Exploring SEU sensitivity. Microprocess. Microsystems Mahsa Mousavi, Hamid Reza Pourshaghaghi, Akash Kumar, Henk Corporaal
2023	A	`conf`	Motivating Agent-Based Learning for Bounding Time in Mixed-Criticality Systems. DATE Behnaz Ranjbar, Ali Hosseinghorban, Akash Kumar
2023	—	`conf`	NetPU-M: a Generic Reconfigurable Neural Network Accelerator Architecture for MLPs. IPDPS Workshops Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar
2023	J	`jnl`	NvMISC: Toward an FPGA-Based Emulation Platform for RISC-V and Nonvolatile Memories. IEEE Embed. Syst. Lett. Yuankang Zhao, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2023	J	`jnl`	Parallel FPGA Routers With Lagrange Relaxation. IEEE Access Rohit Agrawal, Kapil Ahuja, Dhaarna Maheshwari, Mohd Ubaid Shaikh, Mohamed Bouaziz, Akash Kumar
2023	J	`jnl`	RAPID: Approximate Pipelined Soft Multipliers and Dividers for High Throughput and Energy Efficiency. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zahra Ebrahimi, Muhammad Zaid, Mark Wijtvliet, Akash Kumar
2023	C	`conf`	Reconfigurable FET Approximate Computing-based Accelerator for Deep Learning Applications. ISCAS Raghul Saravanan, Sathwika Bavikadi, Shubham Rai, Akash Kumar, Sai Manoj Pudukotai Dinakarrao
2023	J	`jnl`	SeqL+: Secure Scan-Obfuscation With Theoretical and Empirical Validation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Seetal Potluri, Shamik Kundu, Akash Kumar, Kanad Basu, Aydin Aysu
2023	Misc	`conf`	Special Session: Mitigating Side-Channel Attacks Through Circuit to Application Layer Approaches. CODES+ISSS Nima Kavand, Armin Darjani, Jens Trommer, Giulio Galderisi, Thomas Mikolajick, Nicolai Müller, Amir Moradi, Chongzhou Fang, Ning Miao, Han Wang, Sai Manoj P. D., Houman Homayoun, Benjamin Hettwer, Luca Parrini, Akash Kumar
2023	—	`conf`	SyFAxO-GeN: Synthesizing FPGA-Based Approximate Operators with Generative Networks. ASP-DAC Rohit Ranjan, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2023	J	`jnl`	Temporal Patience: Efficient Adaptive Deep Learning for Embedded Radar Data Processing. CoRR Max Sponner, Julius Ott, Lorenzo Servadei, Bernd Waschneck, Robert Wille, Akash Kumar
2023	J	`jnl`	Utilizing XMG-Based Synthesis to Preserve Self-Duality for RFET-Based Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Shubham Rai, Alessandro Tempia Calvino, Heinz Riener, Giovanni De Micheli, Akash Kumar
2022	C	`conf`	A Hybrid Scheduling Mechanism for Multi-programming in Mixed-Criticality Systems. DSD Mohammad Bawatna, Behnaz Ranjbar, Akash Kumar
2022	—	`conf`	A Versatile Mapping Approach for Technology Mapping and Graph Optimization. ASP-DAC Alessandro Tempia Calvino, Heinz Riener, Shubham Rai, Akash Kumar, Giovanni De Micheli
2022	J	`jnl`	BOT-MICS: Bounding Time Using Analytics in Mixed-Criticality Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Behnaz Ranjbar, Ali Hosseinghorban, Siva Satyendra Sahoo, Alireza Ejlali, Akash Kumar
2022	J	`jnl`	Blocks: Challenging SIMDs and VLIWs With a Reconfigurable Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mark Wijtvliet, Akash Kumar, Henk Corporaal
2022	A	`conf`	Combining Gradients and Probabilities for Heterogeneous Approximation of Neural Networks. ICCAD Elias Trommer, Bernd Waschneck, Akash Kumar
2022	J	`jnl`	Combining Gradients and Probabilities for Heterogeneous Approximation of Neural Networks. CoRR Elias Trommer, Bernd Waschneck, Akash Kumar
2022	A*	`conf`	DELTA: DEsigning a stealthy trigger mechanism for analog hardware trojans and its detection analysis. DAC Nishant Gupta, Mohil Sandip Desai, Mark Wijtvliet, Shubham Rai, Akash Kumar
2022	—	`conf`	ENTANGLE: An Enhanced Logic-locking Technique for Thwarting SAT and Structural Attacks. ACM Great Lakes Symposium on VLSI Armin Darjani, Nima Kavand, Shubham Rai, Mark Wijtvliet, Akash Kumar
2022	B	`conf`	ERMES: Efficient Racetrack Memory Emulation System based on FPGA. FPL Fanny Spagnolo, Salim Ullah, Pasquale Corsonello, Akash Kumar
2022	J	`jnl`	Efficient Privacy-Aware Federated Learning by Elimination of Downstream Redundancy. IEEE Des. Test Aditya Lohana, Ansh Rupani, Shubham Rai, Akash Kumar
2022	A	`conf`	Exploring Standard-Cell Designs for Reconfigurable Nanotechnologies: A Formal Approach. DATE Michael Raitza, Steffen Märcker, Shubham Rai, Akash Kumar
2022	Misc	`conf`	FPGA-Based Database Query Processing on Arbitrarily Wide Tables. FCCM Mehdi Moghaddamfar, Christian Färber, Norman May, Wolfgang Lehner, Akash Kumar
2022	J	`jnl`	High-Performance Accurate and Approximate Multipliers for FPGA-Based Hardware Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Salim Ullah, Semeen Rehman, Muhammad Shafique, Akash Kumar
2022	A	`conf`	Improving Technology Mapping for And-Inverter-Cones. DATE Martin Thümmler, Shubham Rai, Akash Kumar
2022	J	`jnl`	Increasing Throughput of In-Memory DNN Accelerators by Flexible Layerwise DNN Approximation. IEEE Micro Cecilia De la Parra, Taha Soliman, Andre Guntoro, Akash Kumar, Norbert Wehn
2022	J	`jnl`	Learning-Oriented QoS- and Drop-Aware Task Scheduling for Mixed-Criticality Systems. Comput. Behnaz Ranjbar, Hamidreza Alikhani, Bardia Safaei, Alireza Ejlali, Akash Kumar
2022	—	`conf`	Multi-Precision Deep Neural Network Acceleration on FPGAs. ASP-DAC Negar Neda, Salim Ullah, Azam Ghanbari, Hoda Mahdiani, Mehdi Modarressi, Akash Kumar
2022	—	`conf`	NetPU: Prototyping a Generic Reconfigurable Neural Network Accelerator Architecture. FPT Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar
2022	J	`jnl`	Peak-Power Aware Life-Time Reliability Improvement in Fault-Tolerant Mixed-Criticality Systems. IEEE Open J. Circuits Syst. Mozhgan Navardi, Behnaz Ranjbar, Nezam Rohbani, Alireza Ejlali, Akash Kumar
2022	J	`jnl`	Plasticine: A Cross-layer Approximation Methodology for Multi-kernel Applications through Minimally Biased, High-throughput, and Energy-efficient SIMD Soft Multiplier-divider. ACM Trans. Design Autom. Electr. Syst. Zahra Ebrahimi, Dennis Klar, Mohammad Aasim Ekhtiyar, Akash Kumar
2022	C	`conf`	PosAx-O: Exploring Operator-level Approximations for Posit Arithmetic in Embedded AI/ML. DSD Amritha Immaneni, Salim Ullah, Suresh Nambi, Siva Satyendra Sahoo, Akash Kumar
2022	J	`jnl`	RAPID: AppRoximAte Pipelined Soft Multipliers and Dividers for High-Throughput and Energy-Efficiency. CoRR Zahra Ebrahimi, Muhammad Zaid, Mark Wijtvliet, Akash Kumar
2022	J	`jnl`	Reduced-Precision Acceleration of Radio-Astronomical Imaging on Reconfigurable Hardware. IEEE Access Stefano Corda, Bram Veenboer, Ahsan Javed Awan, John W. Romein, Roel Jordans, Akash Kumar, Albert-Jan Boonstra, Henk Corporaal
2022	—	`conf`	SCRAMBLE: A Secure and Configurable, Memristor-Based Neuromorphic Hardware Leveraging 3D Architecture. ISVLSI Nikhil Rangarajan, Satwik Patnaik, Mohammed Nabeel, Mohammed Ashraf, Shubham Rai, Gopal Raut, Heba Abunahla, Baker Mohammad, Santosh Kumar Vishvakarma, Akash Kumar, Johann Knechtel, Ozgur Sinanoglu
2022	A	`conf`	Securing Hardware through Reconfigurable Nano-Structures. ICCAD Nima Kavand, Armin Darjani, Shubham Rai, Akash Kumar
2022	J	`jnl`	Security Promises and Vulnerabilities in Emerging Reconfigurable Nanotechnology-Based Circuits. IEEE Trans. Emerg. Top. Comput. Shubham Rai, Satwik Patnaik, Ansh Rupani, Johann Knechtel, Ozgur Sinanoglu, Akash Kumar
2022	J	`jnl`	Toward the Design of Fault-Tolerance-Aware and Peak-Power-Aware Multicore Mixed-Criticality Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Behnaz Ranjbar, Ali Hosseinghorban, Mohammad Salehi, Alireza Ejlali, Akash Kumar
2021	J	`jnl`	A Survey of FPGA Logic Cell Designs in the Light of Emerging Technologies. IEEE Access Shubham Rai, Pallab Nath, Ansh Rupani, Santosh Kumar Vishvakarma, Akash Kumar
2021	—	`conf`	AMAH-Flex: A Modular and Highly Flexible Tool for Generating Relocatable Systems on FPGAs. FPT Najdet Charaf, Christoph Tietz, Michael Raitza, Akash Kumar, Diana Göhringer
2021	J	`jnl`	Area-Optimized Accurate and Approximate Softcore Signed Multiplier Architectures. IEEE Trans. Computers Salim Ullah, Hendrik Schmidl, Siva Satyendra Sahoo, Semeen Rehman, Akash Kumar
2021	C	`conf`	BioCare: An Energy-Efficient CGRA for Bio-Signal Processing at the Edge. ISCAS Zahra Ebrahimi, Akash Kumar
2021	J	`jnl`	CGRA-EAM - Rapid Energy and Area Estimation for Coarse-grained Reconfigurable Architectures. ACM Trans. Reconfigurable Technol. Syst. Mark Wijtvliet, Henk Corporaal, Akash Kumar
2021	A*	`conf`	CLAppED: A Design Framework for Implementing Cross-Layer Approximation in FPGA-based Embedded Systems. DAC Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2021	C	`conf`	CLEO-CoDe: Exploiting Constrained Decoding for Cross-Layer Energy Optimization in Heterogeneous Embedded Systems. VLSI-SoC Siva Satyendra Sahoo, Akash Kumar
2021	J	`jnl`	Compiler Toolchains for Deep Learning Workloads on Embedded Platforms. CoRR Max Sponner, Bernd Waschneck, Akash Kumar
2021	J	`jnl`	Correction to "RECON: Resource-Efficient CORDIC-Based Neuron Architecture". IEEE Open J. Circuits Syst. Gopal Raut, Shubham Rai, Santosh Kumar Vishvakarma, Akash Kumar
2021	—	`conf`	END-TRUE: Emerging Nanotechnology-Based Double-Throughput True Random Number Generator. VLSI-SoC (Selected Papers) Shubham Rai, Nishant Gupta, Abhiroop Bhattacharjee, Ansh Rupani, Michael Raitza, Jens Trommer, Thomas Mikolajick, Akash Kumar
2021	—	`conf`	Efficient Accuracy Recovery in Approximate Neural Networks by Systematic Error Modelling. ASP-DAC Cecilia De la Parra, Andre Guntoro, Akash Kumar
2021	Misc	`conf`	Emergent design challenges for embedded systems and paths forward: mixed-criticality, energy, reliability and security perspectives. CODES+ISSS Siva Satyendra Sahoo, Akash Kumar, Martin Decky, Samuel Chang Bing Wong, Geoff V. Merrett, Yinyuan Zhao, Jiachen Wang, Xiaohang Wang, Amit Kumar Singh
2021	J	`jnl`	Energy-Efficient Low-Latency Signed Multiplier for FPGA-Based Hardware Accelerators. IEEE Embed. Syst. Lett. Salim Ullah, Tuan Duy Anh Nguyen, Akash Kumar
2021	J	`jnl`	ExPAN(N)D: Exploring Posits for Efficient Artificial Neural Network Design in FPGA-Based Systems. IEEE Access Suresh Nambi, Salim Ullah, Siva Satyendra Sahoo, Aditya Lohana, Farhad Merchant, Akash Kumar
2021	C	`conf`	Exploiting Resiliency for Kernel-Wise CNN Approximation Enabled by Adaptive Hardware Design. ISCAS Cecilia De la Parra, Ahmed El-Yamany, Taha Soliman, Akash Kumar, Norbert Wehn, Andre Guntoro
2021	A	`conf`	Exploring Physical Synthesis for Circuits based on Emerging Reconfigurable Nanotechnologies. ICCAD Andreas Krinke, Shubham Rai, Akash Kumar, Jens Lienig
2021	A	`conf`	Improving the Timing Behaviour of Mixed-Criticality Systems Using Chebyshev's Theorem. DATE Behnaz Ranjbar, Ali Hoseinghorban, Siva Satyendra Sahoo, Alireza Ejlali, Akash Kumar
2021	A	`conf`	Knowledge Distillation and Gradient Estimation for Active Error Compensation in Approximate Neural Networks. DATE Cecilia De la Parra, Xuyi Wu, Andre Guntoro, Akash Kumar
2021	A	`conf`	Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. DATE Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa, Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jônata Tyska Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee
2021	C	`conf`	Metastability with Emerging Reconfigurable Transistors: Exploiting Ambipolarity for Throughput. VLSI-SoC Abhiroop Bhattacharjee, Shubham Rai, Ansh Rupani, Michael Raitza, Akash Kumar
2021	C	`conf`	NMPO: Near-Memory Computing Profiling and Offloading. DSD Stefano Corda, Madhurya Kumaraswamy, Ahsan Javed Awan, Roel Jordans, Akash Kumar, Henk Corporaal
2021	J	`jnl`	NMPO: Near-Memory Computing Profiling and Offloading. CoRR Stefano Corda, Madhurya Kumaraswamy, Ahsan Javed Awan, Roel Jordans, Akash Kumar, Henk Corporaal
2021	A	`conf`	Nano Security: From Nano-Electronics to Secure Systems. DATE Ilia Polian, Frank Altmann, Tolga Arul, Christian Boit, Ralf Brederlow, Lucas Davi, Rolf Drechsler, Nan Du, Thomas Eisenbarth, Tim Güneysu, Sascha Hermann, Matthias Hiller, Rainer Leupers, Farhad Merchant, Thomas Mussenbrock, Stefan Katzenbeisser, Akash Kumar, Wolfgang Kunz, Thomas Mikolajick, Vivek Pachauri, Jean-Pierre Seifert, Frank Sill Torres, Jens Trommer
2021	A	`conf`	Perspectives on Emerging Computation-in-Memory Paradigms. DATE Shubham Rai, Mengyun Liu, Anteneh Gebregiorgis, Debjyoti Bhattacharjee, Krishnendu Chakrabarty, Said Hamdioui, Anupam Chattopadhyay, Jens Trommer, Akash Kumar
2021	J	`jnl`	Power-Aware Runtime Scheduler for Mixed-Criticality Systems on Multicore Platform. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Behnaz Ranjbar, Tuan D. A. Nguyen, Alireza Ejlali, Akash Kumar
2021	A	`conf`	Preserving Self-Duality During Logic Synthesis for Emerging Reconfigurable Nanotechnologies. DATE Shubham Rai, Heinz Riener, Giovanni De Micheli, Akash Kumar
2021	J	`jnl`	RECON: Resource-Efficient CORDIC-Based Neuron Architecture. IEEE Open J. Circuits Syst. Gopal Raut, Shubham Rai, Santosh Kumar Vishvakarma, Akash Kumar
2021	A	`conf`	RL-Guided Runtime-Constrained Heuristic Exploration for Logic Synthesis. ICCAD Yasasvi V. Peruvemba, Shubham Rai, Kapil Ahuja, Akash Kumar
2021	J	`jnl`	ReLAccS: A Multilevel Approach to Accelerator Design for Reinforcement Learning on FPGA-Based Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Akhil Raj Baranwal, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2021	C	`conf`	Resource-Efficient Database Query Processing on FPGAs. DaMoN Mehdi Moghaddamfar, Christian Färber, Wolfgang Lehner, Norman May, Akash Kumar
2021	J	`jnl`	SeqL+: Secure Scan-Obfuscation with Theoretical and Empirical Validation. IACR Cryptol. ePrint Arch. Seetal Potluri, Shamik Kundu, Akash Kumar, Kanad Basu, Aydin Aysu
2021	J	`jnl`	Toward the Design of Fault-Tolerance- and Peak- Power-Aware Multi-Core Mixed-Criticality Systems. CoRR Behnaz Ranjbar, Ali Hoseinghorban, Mohammad Salehi, Alireza Ejlali, Akash Kumar
2021	C	`conf`	Using Monte Carlo Tree Search for EDA - A Case-study with Designing Cross-layer Reliability for Heterogeneous Embedded Systems. VLSI-SoC Siva Satyendra Sahoo, Akash Kumar
2021	A	`conf`	Vertical IP Protection of the Next-Generation Devices: Quo Vadis? DATE Shubham Rai, Siddharth Garg, Christian Pilato, Vladimir Herdt, Elmira Moussavi, Dominik Sisejkovic, Ramesh Karri, Rolf Drechsler, Farhad Merchant, Akash Kumar
2021	A	`conf`	dCSR: A Memory-Efficient Sparse Matrix Representation for Parallel Neural Network Inference. ICCAD Elias Trommer, Bernd Waschneck, Akash Kumar
2021	J	`jnl`	dCSR: A Memory-Efficient Sparse Matrix Representation for Parallel Neural Network Inference. CoRR Elias Trommer, Bernd Waschneck, Akash Kumar
2020	—	`conf`	A CORDIC Based Configurable Activation Function for ANN Applications. ISVLSI Gopal Raut, Shubham Rai, Santosh Kumar Vishvakarma, Akash Kumar
2020	J	`jnl`	ALigN: A Highly Accurate Adaptive Layerwise Log_2_Lead Quantization of Pre-Trained Neural Networks. IEEE Access Siddharth Gupta, Salim Ullah, Kapil Ahuja, Aruna Tiwari, Akash Kumar
2020	—	`conf`	An Approximate Binary Classifier for Data Integrity Assessment in IoT Sensors. ICECS Arlene John, Salim Ullah, Akash Kumar, Barry Cardiff, Deepu John
2020	A*	`conf`	CL(R)Early: An Early-stage DSE Methodology for Cross-Layer Reliability-aware Heterogeneous Embedded Systems. DAC Siva Satyendra Sahoo, Bharadwaj Veeravalli, Akash Kumar
2020	A	`conf`	DiSCERN: Distilling Standard-Cells for Emerging Reconfigurable Nanotechnologies. DATE Shubham Rai, Michael Raitza, Siva Satyendra Sahoo, Akash Kumar
2020	J	`jnl`	ExPAN(N)D: Exploring Posits for Efficient Artificial Neural Network Design in FPGA-based Systems. CoRR Suresh Nambi, Salim Ullah, Aditya Lohana, Siva Satyendra Sahoo, Farhad Merchant, Akash Kumar
2020	J	`jnl`	FANTOM: Fault Tolerant Task-Drop Aware Scheduling for Mixed-Criticality Systems. IEEE Access Behnaz Ranjbar, Bardia Safaei, Alireza Ejlali, Akash Kumar
2020	C	`conf`	Full Approximation of Deep Neural Networks through Efficient Optimization. ISCAS Cecilia De la Parra, Andre Guntoro, Akash Kumar
2020	J	`jnl`	Improving approximate neural networks for perception tasks through specialized optimization. Future Gener. Comput. Syst. Cecilia De la Parra, Andre Guntoro, Akash Kumar
2020	C	`conf`	Introducing FPGA-based Machine Learning on the Edge to Undergraduate Students. FIE Rajesh C. Panicker, Akash Kumar, Deepu John
2020	A	`conf`	L2L: A Highly Accurate Log_2_Lead Quantization of Pre-trained Neural Networks. DATE Salim Ullah, Siddharth Gupta, Kapil Ahuja, Aruna Tiwari, Akash Kumar
2020	—	`conf`	LeAp: Leading-one Detection-based Softcore Approximate Multipliers with Tunable Accuracy. ASP-DAC Zahra Ebrahimi, Salim Ullah, Akash Kumar
2020	J	`jnl`	Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. CoRR Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa Jr., Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jônata Tyska Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee
2020	—	`conf`	Markov Chain-based Modeling and Analysis of Checkpointing with Rollback Recovery for Efficient DSE in Soft Real-time Systems. DFT Siva Satyendra Sahoo, Bharadwaj Veeravalli, Akash Kumar
2020	A	`conf`	Maximizing the Serviceability of Partially Reconfigurable FPGA Systems in Multi-tenant Environment. FPGA Tuan D. A. Nguyen, Akash Kumar
2020	—	`conf`	Near Memory Acceleration on High Resolution Radio Astronomy Imaging. MECO Stefano Corda, Bram Veenboer, Ahsan Javed Awan, Akash Kumar, Roel Jordans, Henk Corporaal
2020	J	`jnl`	Near Memory Acceleration on High Resolution Radio Astronomy Imaging. CoRR Stefano Corda, Bram Veenboer, Ahsan Javed Awan, Akash Kumar, Roel Jordans, Henk Corporaal
2020	J	`jnl`	ParaLarH: Parallel FPGA Router based upon Lagrange Heuristics. CoRR Rohit Agrawal, Kapil Ahuja, Dhaarna Maheshwari, Akash Kumar
2020	J	`jnl`	Power-Aware Run-Time Scheduler for Mixed-Criticality Systems on Multi-Core Platform. CoRR Behnaz Ranjbar, Tuan D. A. Nguyen, Alireza Ejlali, Akash Kumar
2020	A	`conf`	ProxSim: GPU-based Simulation Framework for Cross-Layer Approximate DNN Optimization. DATE Cecilia De la Parra, Andre Guntoro, Akash Kumar
2020	J	`jnl`	Quantitative Characterization of Reconfigurable Transistor Logic Gates. IEEE Access Michael Raitza, Steffen Märcker, Jens Trommer, Andre Heinzig, Sascha Klüppelholz, Christel Baier, Akash Kumar
2020	—	`conf`	SIMDive: Approximate SIMD Soft Multiplier-Divider for FPGAs with Tunable Accuracy. ACM Great Lakes Symposium on VLSI Zahra Ebrahimi, Salim Ullah, Akash Kumar
2020	J	`jnl`	SIMDive: Approximate SIMD Soft Multiplier-Divider for FPGAs with Tunable Accuracy. CoRR Zahra Ebrahimi, Salim Ullah, Akash Kumar
2020	—	`conf`	SeqL: Secure Scan-Locking for IP Protection. ISQED Seetal Potluri, Aydin Aysu, Akash Kumar
2020	J	`jnl`	SeqL: Secure Scan-Locking for IP Protection. CoRR Seetal Potluri, Aydin Aysu, Akash Kumar
2019	A*	`conf`	A Hybrid Agent-based Design Methodology for Dynamic Cross-layer Reliability in Heterogeneous Embedded Systems. DAC Siva Satyendra Sahoo, Bharadwaj Veeravalli, Akash Kumar
2019	J	`jnl`	Architecture and Advanced Electronics Pathways Toward Highly Adaptive Energy- Efficient Computing. Proc. IEEE Gerhard P. Fettweis, Meik Dorpinghaus, Jerónimo Castrillón, Akash Kumar, Christel Baier, Karlheinz Bock, Frank Ellinger, Andreas Fery, Frank H. P. Fitzek, Hermann Härtig, Kambiz Jamshidi, Thomas Kissinger, Wolfgang Lehner, Michael Mertig, Wolfgang E. Nagel, Giang T. Nguyen, Dirk Plettemeier, Michael Schröter, Thorsten Strufe
2019	—	`conf`	Design Methodology for Embedded Approximate Artificial Neural Networks. ACM Great Lakes Symposium on VLSI Adarsha Balaji, Salim Ullah, Anup Das, Akash Kumar
2019	J	`jnl`	Designing Efficient Circuits Based on Runtime-Reconfigurable Field-Effect Transistors. IEEE Trans. Very Large Scale Integr. Syst. Shubham Rai, Jens Trommer, Michael Raitza, Thomas Mikolajick, Walter M. Weber, Akash Kumar
2019	C	`conf`	Exploiting Emerging Reconfigurable Technologies for Secure Devices. DSD Ansh Rupani, Shubham Rai, Akash Kumar
2019	—	`conf`	Hardware Watermarking Using Polymorphic Inverter Designs Based On Reconfigurable Nanotechnologies. ISVLSI Shubham Rai, Ansh Rupani, Pallab Nath, Akash Kumar
2019	C	`conf`	High-Throughput BitPacking Compression. DSD Nusrat Jahan Lisa, Tuan Duy Anh Nguyen, Dirk Habich, Akash Kumar, Wolfgang Lehner
2019	J	`jnl`	Multi-objective design space exploration for system partitioning of FPGA-based Dynamic Partially Reconfigurable Systems. Integr. Siva Satyendra Sahoo, Tuan D. A. Nguyen, Bharadwaj Veeravalli, Akash Kumar
2019	C	`conf`	Online Peak Power and Maximum Temperature Management in Multi-core Mixed-Criticality Embedded Systems. DSD Behnaz Ranjbar, Tuan D. A. Nguyen, Alireza Ejlali, Akash Kumar
2019	—	`conf`	Performance Evaluation of Thermal-Constrained Scheduling Strategies in Multi-core Systems. EPEW Muhammad Usama Sardar, Clemens Dubslaff, Sascha Klüppelholz, Christel Baier, Akash Kumar
2019	—	`conf`	Scatter Scrubbing: A Method to Reduce SEU Repair Time in FPGA Configuration Memory. DFT Mahsa Mousavi, Hamid Reza Pourshaghaghi, Henk Corporaal, Akash Kumar
2019	J	`jnl`	Shouji: a fast and efficient pre-alignment filter for sequence alignment. Bioinform. Mohammed Alser, Hasan Hassan, Akash Kumar, Onur Mutlu, Can Alkan
2018	J	`jnl`	A Hardware/Software Stack for Heterogeneous Systems. IEEE Trans. Multi Scale Comput. Syst. Jerónimo Castrillón, Matthias Lieber, Sascha Klüppelholz, Marcus Völp, Nils Asmussen, Uwe Aßmann, Franz Baader, Christel Baier, Gerhard P. Fettweis, Jochen Fröhlich, Andrés Goens, Sebastian Haas, Dirk Habich, Hermann Härtig, Mattis Hasler, Immo Huismann, Tomas Karnagel, Sven Karol, Akash Kumar, Wolfgang Lehner, Linda Leuschner, Siqi Ling, Steffen Märcker, Christian Menard, Johannes Mey, Wolfgang E. Nagel, Benedikt Nöthen, Rafael Peñaloza, Michael Raitza, Jörg Stiller, Annett Ungethüm, Axel Voigt, Sascha Wunderlich
2018	C	`conf`	A Self-Reconfiguring Cache Architecture to Improve Control Quality in Cyber-Physical Systems. ISORC Mohammad Shihabul Haque, Sriram Vasudevan, Alamuri Sriram Nihar, Arvind Easwaran, Akash Kumar, Y. C. Tay
2018	A	`conf`	A physical synthesis flow for early technology evaluation of silicon nanowire based reconfigurable FETs. DATE Shubham Rai, Ansh Rupani, Dennis Walter, Michael Raitza, Andre Heinzig, Tim Baldauf, Jens Trommer, Christian Mayr, Walter M. Weber, Akash Kumar
2018	—	`conf`	Adaptive Learning and Analytics in Engineering Education. TALE Rajesh C. Panicker, Akash Kumar, Dipti Srinivasan, Deepu John
2018	A*	`conf`	Area-optimized low-latency approximate multipliers for FPGA-based hardware accelerators. DAC Salim Ullah, Semeen Rehman, Bharath Srinivas Prabakaran, Florian Kriebel, Muhammad Abdullah Hanif, Muhammad Shafique, Akash Kumar
2018	Misc	`conf`	CLRFrame: An Analysis Framework for Designing Cross-Layer Reliability in Embedded Systems. VLSID Siva Satyendra Sahoo, Bharadwaj Veeravalli, Akash Kumar
2018	—	`conf`	Column Scan Acceleration in Hybrid CPU-FPGA Systems. ADMS@VLDB Nusrat Jahan Lisa, Annett Ungethüm, Dirk Habich, Wolfgang Lehner, Tuan D. A. Nguyen, Akash Kumar
2018	C	`conf`	Column Scan Optimization by Increasing Intra-Instruction Parallelism. DATA Nusrat Jahan Lisa, Annett Ungethüm, Dirk Habich, Tuan D. A. Nguyen, Akash Kumar, Wolfgang Lehner
2018	—	`conf`	Dataflow-Based Mapping of Spiking Neural Networks on Neuromorphic Hardware. ACM Great Lakes Symposium on VLSI Anup Das, Akash Kumar
2018	A	`conf`	DeMAS: An efficient design methodology for building approximate adders for FPGA-based systems. DATE Bharath Srinivas Prabakaran, Semeen Rehman, Muhammad Abdullah Hanif, Salim Ullah, Ghazal Mazaheri, Akash Kumar, Muhammad Shafique
2018	A	`conf`	Emerging reconfigurable nanotechnologies: can they support future electronics? ICCAD Shubham Rai, Srivatsa Rangachar Srinivasa, Patsy Cadareanu, Xunzhao Yin, Xiaobo Sharon Hu, Pierre-Emmanuel Gaillardon, Vijaykrishnan Narayanan, Akash Kumar
2018	—	`conf`	FPGA vs. SIMD: Comparison for Main Memory-Based Fast Column Scan. DATA (Revised Selected Papers) Nusrat Jahan Lisa, Annett Ungethüm, Dirk Habich, Wolfgang Lehner, Tuan Duy Anh Nguyen, Akash Kumar
2018	—	`conf`	Lifetime-aware design methodology for dynamic partially reconfigurable systems. ASP-DAC Siva Satyendra Sahoo, Tuan D. A. Nguyen, Bharadwaj Veeravalli, Akash Kumar
2018	A	`conf`	ParaDRo: A Parallel Deterministic Router Based on Spatial Partitioning and Scheduling. FPGA Chin Hau Hoo, Akash Kumar
2018	J	`jnl`	Parallel FPGA Router using Sub-Gradient method and Steiner tree. CoRR Rohit Agrawal, Chin Hao Hoo, Kapil Ahuja, Akash Kumar
2018	Misc	`ed.`	Proceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2018, Torino, Italy, September 30 - October 05, 2018 CASES Tulika Mitra, Akash Kumar
2018	—	`conf`	Protecting Communication in Many-Core Systems against Active Attackers. ACM Great Lakes Symposium on VLSI Sadia Moriam, Elke Franz, Paul Walther, Akash Kumar, Thorsten Strufe, Gerhard P. Fettweis
2018	—	`conf`	QoS-Aware Cross-Layer Reliability-Integrated FPGA-Based Dynamic Partially Reconfigurable System Partitioning. FPT Siva Satyendra Sahoo, Tuan D. A. Nguyen, Bharadwaj Veeravalli, Akash Kumar
2018	Misc	`conf`	Reloc - An Open-Source Vivado Workflow for Generating Relocatable End-User Configuration Tiles. FCCM Björn Gottschall, Thomas PreuBer, Akash Kumar
2018	J	`jnl`	SLIDER: Fast and Efficient Computation of Banded Sequence Alignment. CoRR Mohammed Alser, Hasan Hassan, Akash Kumar, Onur Mutlu, Can Alkan
2018	A	`conf`	Technology mapping flow for emerging reconfigurable silicon nanowire transistors. DATE Shubham Rai, Michael Raitza, Akash Kumar
2017	A	`conf`	Accounting for systematic errors in approximate computing. DATE Martin Bruestel, Akash Kumar
2017	A	`conf`	Embracing approximate computing for energy-efficient motion estimation in high efficiency video coding. DATE Walaa El-Harouni, Semeen Rehman, Bharath Srinivas Prabakaran, Akash Kumar, Rehan Hafiz, Muhammad Shafique
2017	A	`conf`	Exploiting transistor-level reconfiguration to optimize combinational circuits. DATE Michael Raitza, Akash Kumar, Marcus Völp, Dennis Walter, Jens Trommer, Thomas Mikolajick, Walter M. Weber
2017	A*	`conf`	Locality-Aware CTA Clustering for Modern GPUs. ASPLOS Ang Li, Shuaiwen Leon Song, Weifeng Liu, Xu Liu, Akash Kumar, Henk Corporaal
2017	Misc	`conf`	ParaDiMe: A Distributed Memory FPGA Router Based on Speculative Parallelism and Path Encoding. FCCM Chin Hau Hoo, Akash Kumar
2017	—	`ed.`	Proceedings of the 15th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia, ESTIMedia 2017, Seoul, Republic of Korea, October 15 - 20, 2017 ESTIMedia Sander Stuijk, Akash Kumar
2017	J	`jnl`	Scrubbing Mechanism for Heterogeneous Applications in Reconfigurable Devices. ACM Trans. Design Autom. Electr. Syst. Rui Santos, Shyamsundar Venkataraman, Akash Kumar
2017	A	`conf`	Soft error-aware architectural exploration for designing reliability adaptive cache hierarchies in multi-cores. DATE Arun Subramaniyan, Semeen Rehman, Muhammad Shafique, Akash Kumar, Jörg Henkel
2016	A	`conf`	A flexible inexact TMR technique for SRAM-based FPGAs. DATE Shyamsundar Venkataraman, Rui Santos, Akash Kumar
2016	J	`jnl`	Analysis and Mapping for Thermal and Energy Efficiency of 3-D Video Processing on 3-D Multicore Processors. IEEE Trans. Very Large Scale Integr. Syst. Amit Kumar Singh, Muhammad Shafique, Akash Kumar, Jörg Henkel
2016	A	`conf`	Architectural-space exploration of approximate multipliers. ICCAD Semeen Rehman, Walaa El-Harouni, Muhammad Shafique, Akash Kumar, Jörg Henkel
2016	—	`conf`	Automatic framework to generate reconfigurable accelerators for option pricing applications. ReConFig Pham Nam Khanh, Khin Mi Mi Aung, Akash Kumar
2016	A	`conf`	Critical points based register-concurrency autotuning for GPUs. DATE Ang Li, Shuaiwen Leon Song, Akash Kumar, Eddy Z. Zhang, Daniel G. Chavarría-Miranda, Henk Corporaal
2016	—	`conf`	Cross-layer fault-tolerant design of real-time systems. DFT Siva Satyendra Sahoo, Bharadwaj Veeravalli, Akash Kumar
2016	A	`conf`	Design and evaluation of reliability-oriented task re-mapping in MPSoCs using time-series analysis of intermittent faults. DATE Siva Satyendra Sahoo, Akash Kumar, Bharadwaj Veeravalli
2016	J	`jnl`	Leakage aware resource management approach with machine learning optimization framework for partially reconfigurable architectures. Microprocess. Microsystems Pham Nam Khanh, Akash Kumar, Amit Kumar Singh, Khin Mi Mi Aung
2016	C	`conf`	Machine Learning Approach to Generate Pareto Front for List-scheduling Algorithms. SCOPES Pham Nam Khanh, Akash Kumar, Khin Mi Mi Aung
2016	A	`conf`	PRFloor: An Automatic Floorplanner for Partially Reconfigurable FPGA Systems. FPGA Tuan D. A. Nguyen, Akash Kumar
2016	B	`conf`	ParaFRo: A hybrid parallel FPGA router using fine grained synchronization and partitioning. FPL Chin Hau Hoo, Yajun Ha, Akash Kumar
2016	J	`jnl`	Reliability and Energy-Aware Mapping and Scheduling of Multimedia Applications on Multiprocessor Systems. IEEE Trans. Parallel Distributed Syst. Anup Das, Akash Kumar, Bharadwaj Veeravalli
2016	J	`jnl`	Resource and Throughput Aware Execution Trace Analysis for Efficient Run-Time Mapping on MPSoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Amit Kumar Singh, Muhammad Shafique, Akash Kumar, Jörg Henkel
2016	A	`conf`	SFU-Driven Transparent Approximation Acceleration on GPUs. ICS Ang Li, Shuaiwen Leon Song, Mark Wijtvliet, Akash Kumar, Henk Corporaal
2016	A	`conf`	X: A Comprehensive Analytic Model for Parallel Machines. IPDPS Ang Li, Shuaiwen Leon Song, Eric Brugel, Akash Kumar, Daniel G. Chavarría-Miranda, Henk Corporaal
2016	B	`conf`	XNoC: A non-intrusive TDM circuit-switched Network-on-Chip. FPL Tuan D. A. Nguyen, Akash Kumar
2015	A	`conf`	(AS) DATE Shakith Fernando, Mark Wijtvliet, Cedric Nugteren, Akash Kumar, Henk Corporaal
2015	J	`jnl`	Accelerating Non-volatile/Hybrid Processor Cache Design Space Exploration for Application Specific Embedded Systems. CoRR Mohammad Shihabul Haque, Ang Li, Akash Kumar, Qingsong Wei
2015	—	`conf`	Accelerating non-volatile/hybrid processor cache design space exploration for application specific embedded systems. ASP-DAC Mohammad Shihabul Haque, Ang Li, Akash Kumar, Qingsong Wei
2015	A	`conf`	Adaptive and transparent cache bypassing for GPUs. SC Ang Li, Gert-Jan van den Braak, Akash Kumar, Henk Corporaal
2015	B	`conf`	An automated technique to generate relocatable partial bitstreams for Xilinx FPGAs. FPL Roel Oomen, Tuan D. A. Nguyen, Akash Kumar, Henk Corporaal
2015	J	`jnl`	Autonomous Soft-Error Tolerance of FPGA Configuration Bits. ACM Trans. Reconfigurable Technol. Syst. Anup Das, Shyamsundar Venkataraman, Akash Kumar
2015	J	`jnl`	Correlation ratio based volume image registration on GPUs. Microprocess. Microsystems Ang Li, Akash Kumar, Yajun Ha, Henk Corporaal
2015	A	`conf`	Designing inexact systems efficiently using elimination heuristics. DATE Shyamsundar Venkataraman, Akash Kumar, Jeremy Schlachter, Christian C. Enz
2015	A	`conf`	Dynamic reconfigurable puncturing for secure wireless communication. DATE Liang Tang, Jude Angelo Ambrose, Akash Kumar, Sri Parameswaran
2015	A*	`conf`	Dynamically adaptive scrubbing mechanism for improved reliability in reconfigurable embedded systems. DAC Rui Santos, Shyamsundar Venkataraman, Akash Kumar
2015	J	`jnl`	Execution Trace-Driven Energy-Reliability Optimization for Multimedia MPSoCs. ACM Trans. Reconfigurable Technol. Syst. Anup Das, Amit Kumar Singh, Akash Kumar
2015	A	`conf`	Exploiting loop-array dependencies to accelerate the design space exploration with high level synthesis. DATE Pham Nam Khanh, Amit Kumar Singh, Akash Kumar, Khin Mi Mi Aung
2015	A	`conf`	Fine-Grained Synchronizations and Dataflow Programming on GPUs. ICS Ang Li, Gert-Jan van den Braak, Henk Corporaal, Akash Kumar
2015	C	`conf`	Generic scrubbing-based architecture for custom error correction algorithms. RSP Rui Santos, Shyamsundar Venkataraman, Akash Kumar
2015	—	`conf`	Hardware task migration module for improved fault tolerance and predictability. SAMOS Shyamsundar Venkataraman, Rui Santos, Akash Kumar, Jasper Kuijsten
2015	J	`jnl`	Nano-satellite swarm for SAR applications: design and robust scheduling. IEEE Trans. Aerosp. Electron. Syst. Chee Khiang Pang, Akash Kumar, Cher-Hiang Goh, Cao Vinh Le
2015	B	`conf`	ParaLaR: A parallel FPGA router based on Lagrangian relaxation. FPL Chin Hau Hoo, Akash Kumar, Yajun Ha
2015	J	`jnl`	TRISHUL: A Single-pass Optimal Two-level Inclusive Data Cache Hierarchy Selection Process for Real-time MPSoCs. CoRR Mohammad Shihabul Haque, Akash Kumar, Yajun Ha, Qiang Wu, Shaobo Luo
2015	A	`conf`	Transit: A Visual Analytical Model for Multithreaded Machines. HPDC Ang Li, Y. C. Tay, Akash Kumar, Henk Corporaal
2015	A	`conf`	Workload uncertainty characterization and adaptive frequency scaling for energy minimization of embedded systems. DATE Anup Das, Akash Kumar, Bharadwaj Veeravalli, Rishad Ahmed Shafik, Geoff V. Merrett, Bashir M. Al-Hashimi
2014	J	`jnl`	A Low Active Leakage and High Reliability Phase Change Memory (PCM) Based Non-Volatile FPGA Storage Element. IEEE Trans. Circuits Syst. I Regul. Pap. Kejie Huang, Yajun Ha, Rong Zhao, Akash Kumar, Yong Lian
2014	B	`conf`	A bit-interleaved embedded hamming scheme to correct single-bit and multi-bit upsets for SRAM-based FPGAs. FPL Shyamsundar Venkataraman, Rui Santos, Anup Das, Akash Kumar
2014	—	`conf`	A heterogeneous platform with GPU and FPGA for power efficient high performance computing. ISIC Qiang Wu, Yajun Ha, Akash Kumar, Shaobo Luo, Ang Li, Shihab Mohamed
2014	—	`conf`	A multi-stage leakage aware resource management technique for reconfigurable architectures. ACM Great Lakes Symposium on VLSI Pham Nam Khanh, Amit Kumar Singh, Akash Kumar
2014	C	`conf`	A multi-stage thermal management strategy for 3D multicores. RSP Dipika Suresh, Amit Kumar Singh, Akash Kumar
2014	C	`conf`	Accelerating Volume Image Registration through Correlation Ratio Based Methods on GPUs. DSD Ang Li, Akash Kumar
2014	—	`conf`	Artificial intelligence based task mapping and pipelined scheduling for checkpointing on real time systems with imperfect fault detection. DFT Anup Das, Akash Kumar, Bharadwaj Veeravalli
2014	A	`conf`	Combined DVFS and mapping exploration for lifetime and soft-error susceptibility improvement in MPSoCs. DATE Anup Das, Akash Kumar, Bharadwaj Veeravalli, Cristiana Bolchini, Antonio Miele
2014	J	`jnl`	Communication and migration energy aware task mapping for reliable multiprocessor systems. Future Gener. Comput. Syst. Anup Das, Akash Kumar, Bharadwaj Veeravalli
2014	B	`conf`	Criticality-aware scrubbing mechanism for SRAM-based FPGAs. FPL Rui Santos, Shyamsundar Venkataraman, Anup Das, Akash Kumar
2014	Misc	`conf`	Design Space Exploration to Accelerate Nelder-Mead Algorithm Using FPGA. FCCM Pham Nam Khanh, Amit Kumar Singh, Akash Kumar, Khin Mi Mi Aung
2014	C	`conf`	Design and robust scheduling of nano-satellite swarm for synthetic aperture radar applications. ICARCV Chee Khiang Pang, Akash Kumar, Cher-Hiang Goh, Cao Vinh Le
2014	J	`jnl`	Energy-aware task mapping and scheduling for reliable embedded computing systems. ACM Trans. Embed. Comput. Syst. Anup Das, Akash Kumar, Bharadwaj Veeravalli
2014	—	`conf`	FPGA-based high throughput XTS-AES encryption/decryption for storage area network. FPT Yi Wang, Akash Kumar, Yajun Ha
2014	B	`conf`	Leakage and performance aware resource management for 2D dynamically reconfigurable FPGA architectures. FPL Siqi Wang, Pham Nam Khanh, Amit Kumar Singh, Akash Kumar
2014	C	`conf`	Lightweight Bare-Metal Stateful Firewall. PRDC Yihuan Xing, Ford-Long Wong, Akash Kumar
2014	B	`conf`	Multi-directional error correction schemes for SRAM-based FPGAs. FPL Shyamsundar Venkataraman, Rui Santos, Sidharth Maheshwari, Akash Kumar
2014	B	`conf`	PR-HMPSoC: A versatile partially reconfigurable heterogeneous Multiprocessor System-on-Chip for dynamic FPGA-based embedded systems. FPL Tuan D. A. Nguyen, Akash Kumar
2014	A*	`conf`	Reinforcement Learning-Based Inter- and Intra-Application Thermal Optimization for Lifetime Improvement of Multicore Systems. DAC Anup Das, Rishad A. Shafik, Geoff V. Merrett, Bashir M. Al-Hashimi, Akash Kumar, Bharadwaj Veeravalli
2014	A	`conf`	Temperature aware energy-reliability trade-offs for mapping of throughput-constrained applications on multimedia MPSoCs. DATE Anup Das, Akash Kumar, Bharadwaj Veeravalli
2013	B	`conf`	A directional coarse-grained power gated FPGA switch box and power gating aware routing algorithm. FPL Chin Hau Hoo, Yajun Ha, Akash Kumar
2013	Misc	`conf`	Aging-aware hardware-software task partitioning for reliable reconfigurable multiprocessor systems. CASES Anup Das, Akash Kumar, Bharadwaj Veeravalli
2013	J	`jnl`	CADSE: communication aware design space exploration for efficient run-time MPSoC management. Frontiers Comput. Sci. Amit Kumar Singh, Akash Kumar, Jigang Wu, Thambipillai Srikanthan
2013	A	`conf`	Communication and migration energy aware design space exploration for multicore systems with intermittent faults. DATE Anup Das, Akash Kumar, Bharadwaj Veeravalli
2013	J	`jnl`	Computational analysis of xanthine dehydrogenase enzyme from different source organisms. Netw. Model. Anal. Health Informatics Bioinform. Vivek Dhar Dwivedi, Shikha Arora, Akash Kumar, Sarad Kumar Mishra
2013	A*	`conf`	Energy optimization by exploiting execution slacks in streaming applications on multiprocessor systems. DAC Amit Kumar Singh, Anup Das, Akash Kumar
2013	—	`conf`	Energy-aware dynamic reconfiguration of communication-centric applications for reliable MPSoCs. ReCoSoC Anup Das, Amit Kumar Singh, Akash Kumar
2013	Misc	`conf`	High Speed Video Processing Using Fine-Grained Processing on FPGA Platform. FCCM Zhi Ping Ang, Akash Kumar, Yajun Ha
2013	B	`conf`	Improving autonomous soft-error tolerance of FPGA through LUT configuration bit manipulation. FPL Anup Das, Shyamsundar Venkataraman, Akash Kumar
2013	C	`conf`	Incorporating Energy and Throughput Awareness in Design Space Exploration and Run-Time Mapping for Heterogeneous MPSoCs. DSD Pham Nam Khanh, Amit Kumar Singh, Akash Kumar, Khin Mi Mi Aung
2013	B	`conf`	MAMPSX: A demonstration of rapid, predictable HMPSOC synthesis. FPL Shakith Fernando, Mark Wijtvliet, Firew Siyoum, Yifan He, Sander Stuijk, Akash Kumar, Henk Corporaal
2013	C	`conf`	MAMPSx: A design framework for rapid synthesis of predictable heterogeneous MPSoCs. RSP Shakith Fernando, Firew Siyoum, Yifan He, Akash Kumar, Henk Corporaal
2013	A*	`conf`	Mapping on multi/many-core systems: survey of current and emerging trends. DAC Amit Kumar Singh, Muhammad Shafique, Akash Kumar, Jörg Henkel
2013	J	`jnl`	Project-Based Learning in Embedded Systems Education Using an FPGA Platform. IEEE Trans. Educ. Akash Kumar, Shakith Fernando, Rajesh Chandrasekhara Panicker
2013	C	`conf`	RAPIDITAS: RAPId Design-Space-Exploration Incorporating Trace-Based Analysis and Simulation. DSD Amit Kumar Singh, Anup Das, Akash Kumar
2013	—	`conf`	Real-time and low power embedded ℓ1-optimization solver design. FPT Zhi Ping Ang, Akash Kumar
2013	A	`conf`	Reliability-driven task mapping for lifetime extension of networks-on-chip based multiprocessor systems. DATE Anup Das, Akash Kumar, Bharadwaj Veeravalli
2013	—	`conf`	Run-time mapping for reliable many-cores based on energy/performance trade-offs. DFTS Cristiana Bolchini, Matteo Carminati, Antonio Miele, Anup Das, Akash Kumar, Bharadwaj Veeravalli
2013	—	`conf`	TRISHUL: A single-pass optimal two-level inclusive data cache hierarchy selection process for real-time MPSoCs. ASP-DAC Mohammad Shihabul Haque, Akash Kumar, Yajun Ha, Qiang Wu, Shaobo Luo
2013	—	`conf`	Thermal-aware mapping of streaming applications on 3D Multi-Processor Systems. ESTIMedia Marco Cox, Amit Kumar Singh, Akash Kumar, Henk Corporaal
2012	C	`conf`	A design flow for partially reconfigurable heterogeneous multi-processor platforms. RSP Jiashu Li, Anup Das, Akash Kumar
2012	J	`jnl`	Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs. ACM Trans. Design Autom. Electr. Syst. Amit Kumar Singh, Akash Kumar, Thambipillai Srikanthan
2012	B	`conf`	Acceleration of distance-to-default with hardware-software co-design. FPL Izaan Allugundu, Pranay Puranik, Yat Piu Lo, Akash Kumar
2012	B	`conf`	An area-efficient partially reconfigurable crossbar switch with low reconfiguration delay. FPL Chin Hau Hoo, Akash Kumar
2012	B	`conf`	Development of an FPGA-based real-time P300 speller. FPL Kanav Khurana, Pooja Gupta, Rajesh Chandrasekhara Panicker, Akash Kumar
2012	B	`conf`	Energy-Aware Communication and Remapping of Tasks for Reliable Multimedia Multiprocessor Systems. ICPADS Anup Das, Akash Kumar, Bharadwaj Veeravalli
2012	C	`conf`	Fault-aware task re-mapping for throughput constrained multimedia applications on NoC-based MPSoCs. RSP Anup Das, Akash Kumar
2012	—	`conf`	Fault-tolerant network interface for spatial division multiplexing based Network-on-Chip. ReCoSoC Anup Das, Akash Kumar, Bharadwaj Veeravalli
2012	C	`conf`	Minimizing Power Consumption of Spatial Division Based Networks-on-Chip Using Multi-path and Frequency Reduction. DSD Sheng Hao Wang, Anup Das, Akash Kumar, Henk Corporaal
2012	J	`jnl`	Review of polynomia and related realms by Dan Kalman. SIGACT News Akash Kumar
2011	—	`conf`	A Design Space Exploration Methodology for Application Specific MPSoC Design. ISVLSI Amit Kumar Singh, Akash Kumar, Thambipillai Srikanthan
2011	Misc	`conf`	A hybrid strategy for mapping multiple throughput-constrained applications on MPSoCs. CASES Amit Kumar Singh, Akash Kumar, Thambipillai Srikanthan
2011	—	`conf`	An Automated Flow to Map Throughput Constrained Applications to a MPSoC. PPES Roel Jordans, Firew Siyoum, Sander Stuijk, Akash Kumar, Henk Corporaal
2011	—	`conf`	An MPSoC design approach for multiple use-cases of throughput constrainted applications. Conf. Computing Frontiers Ahsan Shabbir, Sander Stuijk, Akash Kumar, Henk Corporaal, Bart Mesman
2011	—	`conf`	Bringing soccer to the field of real-time embedded systems education. WESE Akash Kumar, Shakith Fernando, Manmohan Manoharan
2011	—	`conf`	Communication-Aware Design Space Exploration for Efficient Run-Time MPSoC Management. PAAP Amit Kumar Singh, Akash Kumar, Wu Jigang, Thambipillai Srikanthan
2011	—	`conf`	Distributed resource management for concurrent execution of multimedia applications on MPSoC platforms. ICSAMOS Ahsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal
2010	—	`conf`	A predictable communication assist. Conf. Computing Frontiers Ahsan Shabbir, Sander Stuijk, Akash Kumar, Bart D. Theelen, Bart Mesman, Henk Corporaal
2010	—	`conf`	An area-efficient dynamically reconfigurable Spatial Division Multiplexing network-on-chip with static throughput guarantee. FPT Zhiyao Joseph Yang, Akash Kumar, Yajun Ha
2010	J	`jnl`	CA-MPSoC: An automated design flow for predictable multi-processor architectures for multiple applications. J. Syst. Archit. Ahsan Shabbir, Akash Kumar, Sander Stuijk, Bart Mesman, Henk Corporaal
2010	J	`jnl`	Communication-aware heuristics for run-time task mapping on NoC-based MPSoC platforms. J. Syst. Archit. Amit Kumar Singh, Thambipillai Srikanthan, Akash Kumar, Wu Jigang
2010	J	`jnl`	Iterative Probabilistic Performance Prediction for Multi-Application Multiprocessor Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Akash Kumar, Bart Mesman, Henk Corporaal, Yajun Ha
2010	—	`conf`	Mapping real-life applications on run-time reconfigurable NoC-based MPSoC on FPGA. FPT Amit Kumar Singh, Akash Kumar, Thambipillai Srikanthan, Yajun Ha
2010	Misc	`conf`	Run-time mapping of multiple communicating tasks on MPSoC platforms. ICCS Amit Kumar Singh, Wu Jigang, Akash Kumar, Thambipillai Srikanthan
2009	—	`conf`	Performance evaluation of concurrently executing parallel applications on multi-processor systems. ICSAMOS Ahsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal
2008	J	`jnl`	Analyzing composability of applications on MPSoC platforms. J. Syst. Archit. Akash Kumar, Bart Mesman, Bart D. Theelen, Henk Corporaal, Yajun Ha
2008	—	`conf`	Enabling MPSoC Design Space Exploration on FPGAs. IMTIC Ahsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal
2008	J	`jnl`	Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA. ACM Trans. Design Autom. Electr. Syst. Akash Kumar, Shakith Fernando, Yajun Ha, Bart Mesman, Henk Corporaal
2008	A	`conf`	Vectorization of Reed Solomon Decoding and Mapping on the EVP. DATE Akash Kumar, Kees van Berkel
2007	A*	`conf`	A Probabilistic Approach to Model Resource Contention for Performance Estimation of Multi-featured Media Devices. DAC Akash Kumar, Bart Mesman, Henk Corporaal, Bart D. Theelen, Yajun Ha
2007	A	`conf`	Interactive presentation: An FPGA design flow for reconfigurable network-based multi-processor systems on chip. DATE Akash Kumar, Andreas Hansson, Jos Huisken, Henk Corporaal
2007	B	`conf`	Multi-processor System-level Synthesis for Multiple Applications on Platform FPGA. FPL Akash Kumar, Shakith Fernando, Yajun Ha, Bart Mesman, Henk Corporaal
2006	C	`conf`	Global Analysis of Resource Arbitration for MPSoC. DSD Akash Kumar, Bart Mesman, Henk Corporaal, Jef L. van Meerbergen, Yajun Ha
2006	—	`conf`	Resource Manager for Non-preemptive Heterogeneous Multiprocessor System-on-chip. ESTIMedia Akash Kumar, Bart Mesman, Bart D. Theelen, Henk Corporaal, Yajun Ha
2005	J	`jnl`	Efficient techniques for improved QoS performance in WDM optical burst switched networks. Comput. Commun. Gurusamy Mohan, Akash Kumar, M. Ashish
2002	—	`conf`	Membrane Systems and Distributed Computing. WMC-CdeA Gabriel Ciobanu, Rahul Desai, Akash Kumar