Ajit Dingankar

15 papers A 1B 1C 2Misc 1Journal 2Unranked 8
YearRankTypeTitle / Venue / Authors
2015 — conf
Optimizing thread-to-core mapping on manycore platforms with distributed Tag Directories.
ASP-DAC
Guantao Liu, Tim Schmidt, Rainer Dömer, Ajit Dingankar, Desmond Kirkpatrick
2010 J jnl
Hardware-Enabled Dynamic Resource Allocation for Manycore Systems Using Bidding-Based System Feedback.
EURASIP J. Embed. Syst.
Theocharis Theocharides, Maria K. Michael, Marios M. Polycarpou, Ajit Dingankar
2009 — conf
Power estimation methodology for a high-level synthesis framework.
ISQED
Sumit Ahuja, Deepak Mathaikutty, Gaurav Singh, Joe Stetzer, Sandeep K. Shukla, Ajit Dingankar
2009 — conf
Towards embedded runtime system level optimization for MPSoCs: on-chip task allocation.
ACM Great Lakes Symposium on VLSI
Theocharis Theocharides, Maria K. Michael, Marios M. Polycarpou, Ajit Dingankar
2008 — conf
A Novel System-Level On-Chip Resource Allocation Method for Manycore Architectures.
ISVLSI
Theocharis Theocharides, Maria K. Michael, Marios M. Polycarpou, Ajit Dingankar
2008 J jnl
MMV: A Metamodeling Based Microprocessor Validation Environment.
IEEE Trans. Very Large Scale Integr. Syst.
Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja
2007 C conf
A Metamodeling based Framework for Architectural Modeling and Simulator Generation.
FDL
Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla
2007 — conf
Assertion-Based Modal Power Estimation.
MTV
Sumit Ahuja, Deepak Mathaikutty, Sandeep K. Shukla, Ajit Dingankar
2007 A conf
Design fault directed test generation for microprocessor validation.
DATE
Deepak Mathaikutty, Sandeep K. Shukla, Sreekumar V. Kodakara, David J. Lilja, Ajit Dingankar
2007 Misc conf
Model Based Test Generation for Microprocessor Architecture Validation.
VLSI Design
Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja
2007 — conf
Model-driven test generation for system level validation.
HLDVT
Deepak Mathaikutty, Sumit Ahuja, Ajit Dingankar, Sandeep K. Shukla
2006 — conf
MMV: Metamodeling Based Microprocessor Valiation Environment.
HLDVT
Ajit Dingankar, Deepak Mathaikutty, Sreekumar V. Kodakara, Sandeep K. Shukla, David J. Lilja
1995 C conf
On Error Bounds for Neural Network Approximation.
ISCAS
Ajit Dingankar, Irwin W. Sandberg
1988 — conf
Automated Design and Analysis System for Design of Custom Orthopedic Implants.
IEA/AIE (Vol. 1)
R. Larry Dooley, G. Heimke, Ajit Dingankar, E. Berg, E. Kimbrough
1988 B conf
Orthopedic implant design, analysis, and manufacturing system.
CBMS
R. Larry Dooley, Ajit Dingankar, G. Heimke, E. Berg