Ahsan Raja Chowdhury

27 papers A 1B 2C 2Misc 8Journal 7Unranked 7
YearRankTypeTitle / Venue / Authors
2021 J jnl
An improved memetic approach for protein structure prediction incorporating maximal hydrophobic core estimation concept.
Knowl. Based Syst.
Rumana Nazmul, Madhu Chetty, Ahsan Raja Chowdhury
2020 J jnl
Multimodal Memetic Framework for low-resolution protein structure prediction.
Swarm Evol. Comput.
Rumana Nazmul, Madhu Chetty, Ahsan Raja Chowdhury
2018 C conf
Alignment-free Cancellable Template Generation for Fingerprint based Authentication.
ICISSP
Rumana Nazmul, Md. Rafiqul Islam, Ahsan Raja Chowdhury
2015 J jnl
Network decomposition based large-scale reverse engineering of gene regulatory network.
Neurocomputing
Ahsan Raja Chowdhury, Madhu Chetty
2015 Misc conf
On the Analysis of Reversible Booth's Multiplier.
VLSID
Jakia Sultana, Sajib Kumar Mitra, Ahsan Raja Chowdhury
2015 Misc conf
Optimized Logarithmic Barrel Shifter in Reversible Logic Synthesis.
VLSID
Sajib Kumar Mitra, Ahsan Raja Chowdhury
2014 — conf
Reconstructing Gene Regulatory Network with Enhanced Particle Swarm Optimization.
ICONIP (2)
Rezwana Sultana, Dilruba Showkat, Mohammad Samiullah, Ahsan Raja Chowdhury
2013 Misc conf
Design of a Fault Tolerant Reversible Compact Unidirectional Barrel Shifter.
VLSI Design
Md. Shamsujjoha, Hafiz Md. Hasan Babu, Lafifa Jamal, Ahsan Raja Chowdhury
2013 J jnl
Incorporating time-delays in S-System model for reverse engineering genetic networks.
BMC Bioinform.
Ahsan Raja Chowdhury, Madhu Chetty, Xuan Vinh Nguyen
2013 A conf
Inferring large scale genetic networks with S-system model.
GECCO
Ahsan Raja Chowdhury, Madhu Chetty, Xuan Vinh Nguyen
2013 — conf
On the Analysis of Time-Delayed Interactions in Genetic Network Using S-System Model.
ICONIP (2)
Ahsan Raja Chowdhury, Madhu Chetty, Xuan Vinh Nguyen
2013 — conf
Reverse Engineering Genetic Networks with Time-Delayed S-System Model and Pearson Correlation Coefficient.
ICONIP (2)
Ahsan Raja Chowdhury, Madhu Chetty, Xuan Vinh Nguyen
2012 B conf
Adaptive regulatory genes cardinality for reconstructing genetic networks.
IEEE Congress on Evolutionary Computation
Ahsan Raja Chowdhury, Madhu Chetty, Xuan Vinh Nguyen
2012 Misc conf
Minimum Cost Fault Tolerant Adder Circuits in Reversible Logic Synthesis.
VLSI Design
Sajib Kumar Mitra, Ahsan Raja Chowdhury
2012 — conf
On the Reconstruction of Genetic Network from Partial Microarray Data.
ICONIP (1)
Ahsan Raja Chowdhury, Madhu Chetty, Xuan Vinh Nguyen
2011 B conf
An improved method to infer Gene Regulatory Network using S-System.
IEEE Congress on Evolutionary Computation
Ahsan Raja Chowdhury, Madhu Chetty
2010 J jnl
Human Disease Diagnosis Using a Fuzzy Expert System
CoRR
Mir Anamul Hasan, Khaja Md. Sher-E-Alam, Ahsan Raja Chowdhury
2008 Misc conf
A Novel Approach to Design BCD Adder and Carry Skip BCD Adder.
VLSI Design
Ashis Kumer Biswas, Md. Mahmudul Hasan, Moshaddek Hasan, Ahsan Raja Chowdhury, Hafiz Md. Hasan Babu
2008 J jnl
Efficient approaches for designing reversible Binary Coded Decimal adders.
Microelectron. J.
Ashis Kumer Biswas, Md. Mahmudul Hasan, Ahsan Raja Chowdhury, Hafiz Md. Hasan Babu
2008 — conf
Minimization of CTS of k-CNOT Circuits for SSF and MSF Model.
DFT
Muhammad Ibrahim, Ahsan Raja Chowdhury, Hafiz Md. Hasan Babu
2006 Misc conf
A New Approach to Synthesize Multiple-Output Functions Using Reversible Programmable Logic Array.
VLSI Design
Ahsan Raja Chowdhury, Rumana Nazmul, Hafiz Md. Hasan Babu
2006 J jnl
Design of a compact reversible binary coded decimal adder circuit.
J. Syst. Archit.
Hafiz Md. Hasan Babu, Ahsan Raja Chowdhury
2006 — conf
Realization of Digital Fuzzy Operations Using Multi-Valued Fredkin Gates.
CDES
Amin Ahsan Ali, Hafiz Md. Hasan Babu, Ahsan Raja Chowdhury
2005 Misc conf
Design of a Reversible Binary Coded Decimal Adder by Using Reversible 4-Bit Parallel Adder.
VLSI Design
Hafiz Md. Hasan Babu, Ahsan Raja Chowdhury
2004 — conf
A heuristic approach to synthesize Boolean functions using TANT network.
ISCAS (2)
Hafiz Md. Hasan Babu, Md. Rafiqul Islam, Rumana Nazmul, Md. Anwarul Haque, Ahsan Raja Chowdhury
2004 Misc conf
Synthesis of Full-Adder Circuit Using Reversible Logic.
VLSI Design
Hafiz Md. Hasan Babu, Md. Rafiqul Islam, Syed Mostahed Ali Chowdhury, Ahsan Raja Chowdhury
2003 C conf
Reversible Logic Synthesis for Minimization of Full-Adder Circuit.
DSD
Hafiz Md. Hasan Babu, Md. Rafiqul Islam, Ahsan Raja Chowdhury, Syed Mostahed Ali Chowdhury