Agustín Fernández

19 papers A* 3A 1B 1C 2Journal 5Unranked 7
YearRankTypeTitle / Venue / Authors
2015 — conf
In-flight reconfigurable FPGA-based space systems.
AHS
Norma Montealegre, David Merodio, Agustín Fernández, Philippe Armbruster
2011 C conf
A take-home exam to assess professional skills.
FIE
David López, Josep-Llorenc Cruz, Fermín Sánchez, Agustín Fernández
2010 J jnl
A SIMD-efficient 14 instruction shader program for high-throughput microtriangle rasterization.
Vis. Comput.
Jordi Roca, Victor Moya Del Barrio, Carlos González, Vicente Escandell, Albert Murciego, Agustín Fernández, Roger Espasa
2006 B conf
ATTILA: a cycle-level execution-driven simulator for modern GPU architectures.
ISPASS
Victor Moya Del Barrio, Carlos González, Jordi Roca, Agustín Fernández, Roger Espasa
2006 — conf
Workload Characterization of 3D Games.
IISWC
Jordi Roca, Victor Moya Del Barrio, Carlos González, Chema Solis, Agustín Fernández, Roger Espasa
2005 — conf
A Single (Unified) Shader GPU Microarchitecture for Embedded Systems.
HiPEAC
Victor Moya Del Barrio, Carlos González, Jordi Roca, Agustín Fernández, Roger Espasa
2005 A* conf
Shader Performance Analysis on a Modern GPU Architecture.
MICRO
Victor Moya Del Barrio, Carlos González, Jordi Roca, Agustín Fernández, Roger Espasa
2003 J jnl
A Cost-Effective Implementation of Multilevel Tiling.
IEEE Trans. Parallel Distributed Syst.
Marta Jiménez, José M. Llabería, Agustín Fernández
2002 J jnl
Register tiling in nonrectangular iteration spaces.
ACM Trans. Program. Lang. Syst.
Marta Jiménez, José M. Llabería, Agustín Fernández
2000 A* conf
On the Performance of Hand vs. Automatically Optimized Numerical Codes.
HPCA
Marta Jiménez, José M. Llabería, Agustín Fernández
1998 A conf
A General Algorithm for Tiling the Register Level.
International Conference on Supercomputing
Marta Jiménez, José M. Llabería, Agustín Fernández, Enric Morancho
1998 C conf
Loop bounds computation for multilevel tiling.
PDP
Marta Jiménez, José María Llabería, Agustín Fernández
1998 A* conf
Performance Evaluation of Tiling for the Register Level.
HPCA
Marta Jiménez, José M. Llabería, Agustín Fernández
1996 — conf
A Unified Transformation Technique for Multilevel Blocking.
Euro-Par, Vol. I
Marta Jiménez, José M. Llabería, Agustín Fernández, Enric Morancho
1995 J jnl
Loop Transformation Using Nonunimodular Matrices.
IEEE Trans. Parallel Distributed Syst.
Agustín Fernández, José M. Llabería, Miguel Valero-García
1992 — conf
Scheduling partitions in systolic algorithms.
ASAP
Alvaro Suárez, José M. Llabería, Agustín Fernández
1991 — conf
Interleaving Partitions of Systolic Algorithms for Programming Distributed Memory Multiprocessors.
EDMCC
Agustín Fernández, José M. Llabería, Juan J. Navarro, Miguel Valero-García
1991 J jnl
Performance evaluation of transputer systems with linear algebra problems.
Microprocessing and Microprogramming
Agustín Fernández, José María Llabería, Juan J. Navarro, Miguel Valero-García
1991 — conf
Transformation of systolic algorithms for interleaving partitions.
ASAP
Agustín Fernández, José M. Llabería, Juan J. Navarro, Miguel Valero-García