Adoración Rueda

118 papers A* 1A 14B 4C 14Misc 8Journal 31Unranked 46

Year	Rank	Type	Title / Venue / Authors
2019	J	`jnl`	Fast adaptive comparator offset calibration in pipeline ADC with self-repairing thermometer to binary encoder. Int. J. Circuit Theory Appl. Antonio Jose Ginés, Eduardo José Peralías, Cristina Aledo, Adoración Rueda
2019	—	`conf`	Mismatch and Offset Calibration in Redundant SAR ADC. DCIS Antonio Lopez-Angulo, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2018	C	`conf`	Description of SAR ADCs with Digital Redundancy using a Unified Hardware-Based Approach. ISCAS Antonio J. Ginés, Antonio Lopez-Angulo, Eduardo J. Peralías, Adoración Rueda
2018	—	`conf`	Redundant SAR ADCs with Split-capacitor DAC. ICECS Antonio Lopez-Angulo, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2017	J	`jnl`	Black-Box Calibration for ADCs With Hard Nonlinear Errors Using a Novel INL-Based Additive Code: A Pipeline ADC Case Study. IEEE Trans. Circuits Syst. I Regul. Pap. Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2017	J	`jnl`	Fast Background Calibration of Sampling Timing Skew in SHA-Less Pipeline ADCs. IEEE Trans. Very Large Scale Integr. Syst. Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2017	A	`conf`	On the limits of machine learning-based test: A calibrated mixed-signal system case study. DATE Manuel J. Barragán, Gildas Léger, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2016	—	`conf`	Cell-culture measurements using voltage oscillations. LASCAS Andrés Maldonado, Gloria Huertas, Adoración Rueda, José Luis Huertas, Pablo Pérez, Alberto Yufera
2016	B	`conf`	Linearity test of high-speed high-performance ADCs using a self-testable on-chip generator. ETS Antonio J. Ginés, Eduardo J. Peralías, Gildas Léger, Adoración Rueda, Guillaume Renaud, Manuel J. Barragán, Salvador Mir
2015	—	`conf`	An approach to the design of low-jitter differential clock recovery circuits for high performance ADCs. LASCAS Juan Núñez, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2015	J	`jnl`	Background Digital Calibration of Comparator Offsets in Pipeline ADCs. IEEE Trans. Very Large Scale Integr. Syst. Antonio Jose Ginés, Eduardo J. Peralías, Adoración Rueda
2015	—	`conf`	From voltage oscillations to tissue-impedance measurements. BioCAS Andrés Maldonado, Pablo Pérez, Gloria Huertas, Alberto Yufera, Adoración Rueda, José L. Huertas
2015	J	`jnl`	The Bio-Oscillator: A Circuit for Cell-Culture Assays. IEEE Trans. Circuits Syst. II Express Briefs Gloria Huertas, Andrés Maldonado, Alberto Yufera, Adoración Rueda, José Luis Huertas
2014	—	`conf`	Closed-loop simulation method for evaluation of static offset in discrete-time comparators. ICECS Antonio J. Ginés, Eduardo J. Peralías, Gildas Léger, Adoración Rueda
2014	B	`conf`	INL systematic reduced-test technique for Pipeline ADCs. ETS Eduardo J. Peralías, Antonio Jose Ginés, Adoración Rueda
2013	—	`conf`	Analysis of process variations' impact on a 2.4 GHz 90 nm CMOS LNA. LASCAS Jorge Luis González Rios, Juan Carlos Cruz, Diego Vázquez, Adoración Rueda
2013	—	`conf`	Inductor characterization in RF LC-VCOs. LASCAS Ricardo Doldán, Antonio J. Ginés, Adoración Rueda
2013	—	`conf`	Sinusoidal signal generation for mixed-signal BIST using a harmonic-cancellation technique. LASCAS Manuel J. Barragán, Gildas Léger, Diego Vázquez, Adoración Rueda
2012	C	`conf`	Analysis of steady-state common-mode response in differential LC-VCOs. ISCAS Ricardo Doldán, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2012	—	`conf`	Self-biased input common-mode generation for improving dynamic range and yield in inverter-based filters. ICECS Antonio Jose Ginés, Alberto Villegas, Eduardo J. Peralías, Adoración Rueda
2011	—	`conf`	2.4-GHz single-ended input low-power low-voltage active front-end for ZigBee applications in 90 nm CMOS. ECCTD Rafaella Fiorelli, Alberto Villegas, Eduardo J. Peralías, Diego Vázquez, Adoración Rueda
2011	—	`conf`	A 3.6mW @ 1.2V high linear 8 ESSCIRC Alberto Villegas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda
2011	J	`jnl`	Alternate Test of LNAs Through Ensemble Learning of On-Chip Digital Envelope Signatures. J. Electron. Test. Manuel J. Barragan Asian, Rafaella Fiorelli, Gildas Léger, Adoración Rueda, José L. Huertas
2011	J	`jnl`	Analog Sinewave Signal Generators for Mixed-Signal Built-in Test Applications. J. Electron. Test. Manuel J. Barragan Asian, Diego Vázquez, Adoración Rueda
2011	J	`jnl`	Blind Adaptive Estimation of Integral Nonlinear Errors in ADCs Using Arbitrary Input Stimulus. IEEE Trans. Instrum. Meas. Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2011	—	`conf`	Improving the Accuracy of RF Alternate Test Using Multi-VDD Conditions: Application to Envelope-Based Test of LNAs. Asian Test Symposium Manuel J. Barragan Asian, Rafaella Fiorelli, Gildas Léger, Adoración Rueda, José L. Huertas
2010	—	`conf`	(Some) Open Problems to Incorporate BIST in Complex Heterogeneous Integrated Systems. DELTA Manuel J. Barragan Asian, Gloria Huertas, Adoración Rueda, José Luis Huertas
2010	J	`jnl`	A BIST Solution for Frequency Domain Characterization of Analog Circuits. J. Electron. Test. Manuel J. Barragan Asian, Diego Vázquez, Adoración Rueda
2010	C	`conf`	A low power low voltage mixer for 2.4GHz applications in CMOS-90nm technology. DDECS Alberto Villegas, Diego Vázquez, Adoración Rueda
2010	J	`jnl`	Design of a CMOS closed-loop system with applications to bio-impedance measurements. Microelectron. J. Alberto Yufera, Adoración Rueda
2010	B	`conf`	Low-cost signature test of RF blocks based on envelope response analysis. ETS Manuel J. Barragan Asian, Rafaella Fiorelli, Diego Vázquez, Adoración Rueda, José Luis Huertas
2010	J	`jnl`	On Chopper Effects in Discrete-Time SigmaDelta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. Gildas Léger, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2010	C	`conf`	On-chip biased voltage-controlled oscillator with temperature compensation of the oscillation amplitude for robust I/Q generation. ISCAS Antonio J. Ginés, Ricardo Doldán, Manuel J. Barragan Asian, Adoración Rueda, Eduardo J. Peralías
2010	—	`conf`	Power optimization of CMOS programmable gain amplifiers with high dynamic range and common-mode feed-forward circuit. ICECS Antonio J. Ginés, Ricardo Doldán, Adoración Rueda, Eduardo J. Peralías
2009	—	`conf`	A BIST Solution for the Functional Characterization of RF Systems Based on Envelope Response Analysis. Asian Test Symposium Manuel J. Barragan Asian, Rafaella Fiorelli, Diego Vázquez, Adoración Rueda, José Luis Huertas
2009	C	`conf`	A CMOS bio-impedance measurement system. DDECS Alberto Yufera, Adoración Rueda
2009	—	`conf`	A survey on digital background calibration of ADCs. ECCTD Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2009	—	`conf`	Design of A CMOS closed-loop system useful for bio-impedance measurements. ICECS Alberto Yufera, Adoración Rueda
2009	J	`jnl`	Low-Cost Digital Detection of Parametric Faults in Cascaded SigmaDelta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. Gildas Léger, Adoración Rueda
2009	—	`conf`	On-line estimation of the integral non-linear errors in analogue-to-digital converters without histogram evaluation. ECCTD Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2008	—	`conf`	A 1.2V 5.14mW quadrature frequency synthesizer in 90nm CMOS technology for 2.4GHz ZigBee applications. APCCAS Antonio Jose Ginés, Ricardo Doldán, Alberto Villegas, Antonio J. Acosta, Maria Angeles Jalón, Diego Vázquez, Adoración Rueda, Eduardo J. Peralías
2008	—	`conf`	A 2.4GHz LNA in a 90-nm CMOS technology designed with ACM model. SBCCI Rafaella Fiorelli, Fernando Silveira, Eduardo J. Peralías, Diego Vázquez, Adoración Rueda, José Luis Huertas
2008	—	`conf`	A 5GHz wide tuning range LC-VCO in sub-micrometer CMOS technology. APCCAS Ricardo Doldán Lorenzo, Antonio Jose Ginés Arteaga, Adoración Rueda, Eduardo J. Peralías
2008	A	`conf`	Practical Implementation of a Network Analyzer for Analog BIST Applications. DATE Manuel J. Barragan Asian, Diego Vázquez, Adoración Rueda
2008	J	`jnl`	Simple Evaluation of the Nonlinearity Signature of an ADC Using a Spectral Approach. VLSI Design Eduardo J. Peralías, Maria Angeles Jalón, Adoración Rueda
2007	C	`conf`	Improved Background Algorithms for Pipeline ADC Full Calibration. ISCAS Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2007	—	`conf`	Novel swapping technique for background calibration of capacitor mismatching in pipeline ADCS. SBCCI Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2006	C	`conf`	A Sinewave Analyzer for Mixed-Signal BIST Applications in a 0.35µm Technology. DDECS Manuel J. Barragan Asian, Diego Vázquez, Adoración Rueda
2006	B	`conf`	Experimental Validation of a Fully Digital BISTfor Cascaded Sigma Delta Modulators. ETS Gildas Léger, Adoración Rueda
2006	C	`conf`	Statistical analysis of a background correlation-based technique for full calibration of pipeline ADCs. ISCAS Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2005	J	`jnl`	A tissue impedance measurement chip for myocardial ischemia detection. IEEE Trans. Circuits Syst. I Regul. Pap. Alberto Yufera, Adoración Rueda, José Maria Muñoz, Ricardo Doldán, Gildas Léger, Esther Rodríguez-Villegas
2005	—	`conf`	Full calibration digital techniques for pipeline ADCs. ISCAS (3) Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2005	J	`jnl`	Guest Editorial. J. Electron. Test. Adoración Rueda, Michel Renovell, José Luis Huertas
2005	J	`jnl`	Sine-Wave Signal Characterization Using Square-Wave and SigmaDelta-Modulation: Application to Mixed-Signal BIST. J. Electron. Test. Diego Vázquez, Gloria Huertas, África Luque, Manuel J. Barragan Asian, Gildas Léger, Adoración Rueda, José Luis Huertas
2004	J	`jnl`	A 1-V micropower log-domain integrator based on FGMOS transistors operating in weak inversion. IEEE J. Solid State Circuits Esther Rodríguez-Villegas, Alberto Yúfera, Adoración Rueda
2004	J	`jnl`	A 1.25-V micropower Gm-C filter based on FGMOS transistors operating in weak inversion. IEEE J. Solid State Circuits Esther Rodríguez-Villegas, Alberto Yúfera, Adoración Rueda
2004	A	`conf`	A Digital Test for First-Order [Sigma-Delta] Modulators. DATE Gildas Léger, Adoración Rueda
2004	A	`conf`	A Method for Parameter Extraction of Analog Sine-Wave Signals for Mixed-Signal Built-In-Self-Test Applications. DATE Diego Vázquez, Gildas Léger, Gloria Huertas, Adoración Rueda, José L. Huertas
2004	A	`conf`	Digital Background Gain Error Correction in Pipeline ADCs. DATE Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2004	J	`jnl`	Impact of random channel mismatch on the SNR and SFDR of time-interleaved ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. Gildas Léger, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
2003	—	`conf`	A Charge Correction Cell for FGMOS-Based Circuits. SBCCI Esther Rodríguez-Villegas, Alberto Yufera, Adoración Rueda
2003	—	`conf`	Digital Background Calibration Technique for Pipeline ADCs with Multi-Bit Stages. SBCCI Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2003	J	`jnl`	Oscillation-based test in bandpass oversampled A/D converters. Microelectron. J. Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas
2002	—	`conf`	A Continuous-Time Incremental Analog to Digital Converter. SBCCI Ricardo Doldán, Alberto Yúfera, Adoración Rueda
2002	A	`conf`	A Mixed-Signal Design Reuse Methodology Based on Parametric Behavioural Models with Non-Ideal Effects. DATE Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda, Ralf Seepold, Natividad Martínez Madrid
2002	—	`conf`	A micropower log domain FGMOS filter. ISCAS (3) Esther Rodríguez-Villegas, Adoración Rueda, Alberto Yufera
2002	—	`conf`	Design of a switched opamp-based bandpass filter in a 0.35 μm CMOS technology. ICECS Luis Quintanilla, Jesús Arias Álvarez, Lourdes Enríquez, José Vicente, Juan Barbolla, Diego Vázquez, Adoración Rueda
2002	—	`conf`	High-speed low-power logic gates using floating gates. ISCAS (5) Esther Rodríguez-Villegas, José M. Quintana, Maria J. Avedillo, Adoración Rueda
2002	—	`conf`	Low-cost on-chip measurements for Oscillation-Based-Test in Analog Integrated Circuits. LATW Diego Vázquez, Gloria Huertas, Adoración Rueda, Gildas Léger, José L. Huertas
2002	—	`conf`	Practical Oscillation-Based Test in Analog Integrated Filters: Experimental Results. DELTA Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas
2002	J	`jnl`	Practical Oscillation-Based Test of Integrated Filters. IEEE Des. Test Comput. Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
2002	Misc	`conf`	Practical Solutions for the Application of the Oscillation-Based-Test: Start-Up and On-Chip Evaluation. VTS Diego Vázquez, Gloria Huertas, Gildas Léger, Adoración Rueda, José L. Huertas
2002	—	`conf`	Practical solutions for the application of the oscillation-based-test in analog integrated circuits. ISCAS (1) Diego Vázquez, Gloria Huertas, Gildas Léger, Adoración Rueda, José L. Huertas
2002	J	`jnl`	Testing Mixed-Signal Cores: A Practical Oscillation-Based Test in an Analog Macrocell. IEEE Des. Test Comput. Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
2002	—	`conf`	Threshold-logic-based design of compressors. ICECS José M. Quintana, Maria J. Avedillo, Esther Rodríguez-Villegas, Adoración Rueda
2001	—	`conf`	A 1.25 V FGMOS filter using translinear circuits. ISCAS (1) Esther Rodríguez-Villegas, Adoración Rueda, Alberto Yufera
2001	—	`conf`	A 1.5 V 23 MHz low power FGMOS filter. ICECS Esther Rodríguez-Villegas, Adoración Rueda, Alberto Yúfera
2001	J	`jnl`	A Low-Voltage Floating-Gate MOS Biquad. VLSI Design Esther Rodríguez-Villegas, Alberto Yufera, Adoración Rueda
2001	A	`conf`	Analog/mixed-signal IP modeling for design reuse. DATE Natividad Martínez Madrid, Eduardo J. Peralías, Antonio J. Acosta, Adoración Rueda
2001	—	`conf`	Design of a CMOS fully differential switched-opamp for SC circuits at very low power supply voltages. ICECS Jesús Arias Álvarez, Luis Quintanilla, Lourdes Enríquez, José Vicente, Juan Barbolla, Diego Vázquez, Adoración Rueda
2001	J	`jnl`	New BIST Schemes for Structural Testing of Pipelined Analog to Digital Converters. J. Electron. Test. Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
2001	Misc	`conf`	Self-Testable Pipelined ADC with Low Hardware Overhead. VTS Eduardo J. Peralías, Gloria Huertas, Adoración Rueda, José L. Huertas
2001	—	`conf`	Structural testing of pipelined analog to digital converters. ISCAS (1) Eduardo J. Peralías, Adoración Rueda, José L. Huertas
2000	A	`conf`	A Vhdl-Based Methodology for Design and Verification of Pipeline A/D Converters. DATE Eduardo J. Peralías, Antonio J. Acosta, Adoración Rueda, José L. Huertas
2000	C	`conf`	A g ISCAS Esther O. Rodríguez, Alberto Yufera, Adoración Rueda
2000	C	`conf`	A low-voltage √x floating-gate MOS integrator. ISCAS Esther O. Rodríguez, Alberto Yufera, Adoración Rueda
2000	—	`conf`	Alternative DFT Strategies for High-Speed Pipelined Data Converters. LATW Eduardo J. Peralías, Adoración Rueda, José L. Huertas
2000	—	`conf`	An Application of Self-Timed Circuits to the Reduction of Switching Noise in Analog-Digital Circuits. PATMOS Raúl Jiménez, Antonio J. Acosta, Eduardo J. Peralías, Adoración Rueda
2000	Misc	`conf`	Built-In Self-Test in Mixed-Signal ICs: A DTMF Macrocell. VLSI Design Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas
2000	—	`conf`	Efficient νMOS Realization of Threshold Voters for Self-Purging Redundancy. SBCCI José M. Quintana, Maria J. Avedillo, Esther Rodríguez-Villegas, Adoración Rueda
2000	—	`conf`	Testing mixed-signal cores: practical oscillation-based test in an analog macrocell. Asian Test Symposium Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José L. Huertas
2000	C	`conf`	VHDL-based behavioural description of pipeline ADCs. ISCAS Eduardo J. Peralías, Antonio J. Acosta, Adoración Rueda, José L. Huertas
2000	J	`jnl`	νMOS-based Sorter for Arithmetic Applications. VLSI Design Esther Rodríguez-Villegas, Maria J. Avedillo, José M. Quintana, Gloria Huertas, Adoración Rueda
1999	A	`conf`	Effective oscillation-based test for application to a DTMF filter bank. ITC Gloria Huertas, Diego Vázquez, Adoración Rueda, José L. Huertas
1999	—	`conf`	Programmable low-voltage continuous-time filter for audio applications. ISCAS (2) Alberto Yufera, Adoración Rueda
1999	—	`conf`	vMOS-based sorters for multiplier implementations. ISCAS (1) Esther Rodríguez-Villegas, Maria J. Avedillo, José M. Quintana, Gloria Huertas, Adoración Rueda
1998	J	`jnl`	A high-Q bandpass fully differential SC filter with enhanced testability. IEEE J. Solid State Circuits Diego Vázquez, Adoración Rueda, José Luis Huertas, Eduardo J. Peralías
1998	A	`conf`	An Approach to Realistic Fault Prediction and Layout Design for Testability in Analog Circuits. DATE Juan A. Prieto, Adoración Rueda, Ian Andrew Grout, Eduardo J. Peralías, José L. Huertas, Andrew Mark David Richardson
1998	—	`conf`	CMOS pipelined A/D converters with concurrent error detection capability. ICECS Eduardo J. Peralías, Adoración Rueda, José L. Huertas
1998	A	`conf`	DfT and on-line test of high-performance data converters: a practical case. ITC Eduardo J. Peralías, Adoración Rueda, Juan A. Prieto, José L. Huertas
1998	A	`conf`	Switch-Level Fault Coverage Analysis for Switched-Capacitor Systems. DATE Salvador Mir, Adoración Rueda, Diego Vázquez, José Luis Huertas
1997	Misc	`conf`	A DFT Technique for Analog-to-Digital Converters with digital correction. VTS Eduardo J. Peralías, Adoración Rueda, José L. Huertas
1997	—	`conf`	A performance-driven placement algorithm with simultaneous Place&Route optimization for analog ICs. ED&TC Juan A. Prieto, Adoración Rueda, José M. Quintana, José Luis Huertas
1997	A	`conf`	Analog and Mixed-Signal Benchmark Circuits-First Release. ITC Bozena Kaminska, Karim Arabi, I. Bell, José L. Huertas, Bruce C. Kim, Adoración Rueda, Mani Soma, Prashant Goteti
1997	A*	`conf`	SWITTEST: Automatic Switch-Level Fault Simulation and Test Evaluation of Switched-Capacitor Systems. DAC Salvador Mir, Adoración Rueda, Thomas Olbrich, Eduardo J. Peralías, José Luis Huertas
1996	Misc	`conf`	Reducing the impact of DFT on the performance of analog integrated circuits: improved sw-op amp design. VTS Diego Vázquez, José L. Huertas, Adoración Rueda
1995	Misc	`conf`	A solution for the on-line test of analog ladder filters. VTS Diego Vázquez, Adoración Rueda, José L. Huertas
1995	A	`conf`	Statistical behavioral modeling and characterization of A/D converters. ICCAD Eduardo J. Peralías, Adoración Rueda, José Luis Huertas
1994	C	`conf`	A Low-Cost Strategy for Testing Analog Filters. ISCAS Diego Vázquez, Adoración Rueda, José L. Huertas
1994	C	`conf`	A Study of the Sensitivity of Switched-Current Wave Analog Filters to Mismatching and Clock-Feedthrough Errors. ISCAS Alberto Yufera, Adoración Rueda, José L. Huertas
1994	Misc	`conf`	A new strategy for testing analog filters. VTS Diego Vázquez, Adoración Rueda, José Luis Huertas
1994	C	`conf`	An Algorithm for the Place-and-Route Problem in the Layout of Analog Circuits. ISCAS Juan A. Prieto, José M. Quintana, Adoración Rueda, José L. Huertas
1994	J	`jnl`	Programmable switched-current wave analog filters. IEEE J. Solid State Circuits Alberto Yúfera, Adoración Rueda, José L. Huertas
1993	J	`jnl`	Improving the testability of switched-capacitor filters. J. Electron. Test. José Luis Huertas, Adoración Rueda, Diego Vázquez
1993	J	`jnl`	Testable switched-capacitor filters. IEEE J. Solid State Circuits José L. Huertas, Adoración Rueda, Diego Vázquez
1992	Misc	`conf`	On-line testing of switched-capacitor filters. VTS José Luis Huertas, Diego Vázquez, Adoración Rueda
1992	J	`jnl`	Testability in analogue cellular neural networks. Int. J. Circuit Theory Appl. Adoración Rueda, José L. Huertas
1987	J	`jnl`	Chaos from switched-capacitor circuits: Discrete maps. Proc. IEEE Ángel Rodríguez-Vázquez, José L. Huertas, Adoración Rueda, Belén Pérez-Verdú, Leon O. Chua