Adel Dokhanchi

20 papers A 1B 2C 3Misc 1Journal 7Unranked 5
YearRankTypeTitle / Venue / Authors
2019 C conf
Encoding and monitoring responsibility sensitive safety rules for automated vehicles in signal temporal logic.
MEMOCODE
Mohammad Hekmatnejad, Shakiba Yaghoubi, Adel Dokhanchi, Heni Ben Amor, Aviral Shrivastava, Lina J. Karam, Georgios Fainekos
2019 A conf
Specifying and Evaluating Quality Metrics for Vision-based Perception Systems.
DATE
Anand Balakrishnan, Aniruddh Gopinath Puranic, Xin Qin, Adel Dokhanchi, Jyotirmoy V. Deshmukh, Heni Ben Amor, Georgios Fainekos
2018 — conf
ARCH-COMP18 Category Report: Results on the Falsification Benchmarks.
ARCH@ADHS
Adel Dokhanchi, Shakiba Yaghoubi, Bardh Hoxha, Georgios Fainekos, Gidon Ernst, Zhenya Zhang, Paolo Arcaini, Ichiro Hasuo, Sean Sedwards
2018 B conf
Evaluating Perception Systems for Autonomous Vehicles Using Quality Temporal Logic.
RV
Adel Dokhanchi, Heni Ben Amor, Jyotirmoy V. Deshmukh, Georgios Fainekos
2018 J jnl
Formal Requirement Debugging for Testing and Verification of Cyber-Physical Systems.
ACM Trans. Embed. Comput. Syst.
Adel Dokhanchi, Bardh Hoxha, Georgios Fainekos
2018 J jnl
Mining parametric temporal logic properties in model-based design for cyber-physical systems.
Int. J. Softw. Tools Technol. Transf.
Bardh Hoxha, Adel Dokhanchi, Georgios Fainekos
2017 — conf
ARCH-COMP17 Category Report: Preliminary Results on the Falsification Benchmarks.
ARCH@CPSWeek
Adel Dokhanchi, Shakiba Yaghoubi, Bardh Hoxha, Georgios Fainekos
2017 — —
From Formal Requirement Analysis to Testing and Monitoring of Cyber-Physical Systems.
Adel Dokhanchi
2017 — conf
Vacuity aware falsification for MTL request-response specifications.
CASE
Adel Dokhanchi, Shakiba Yaghoubi, Bardh Hoxha, Georgios Fainekos
2016 J jnl
An Efficient Algorithm for Monitoring Practical TPTL Specifications.
CoRR
Adel Dokhanchi, Bardh Hoxha, Cumhur Erkan Tuncali, Georgios Fainekos
2016 C conf
An efficient algorithm for monitoring practical TPTL specifications.
MEMOCODE
Adel Dokhanchi, Bardh Hoxha, Cumhur Erkan Tuncali, Georgios Fainekos
2016 J jnl
Formal Requirement Elicitation and Debugging for Testing and Verification of Cyber-Physical Systems.
CoRR
Adel Dokhanchi, Bardh Hoxha, Georgios Fainekos
2015 C conf
Metric interval temporal logic specification elicitation and debugging.
MEMOCODE
Adel Dokhanchi, Bardh Hoxha, Georgios Fainekos
2015 J jnl
Querying Parametric Temporal Logic Properties in Model Based Design.
CoRR
Bardh Hoxha, Adel Dokhanchi, Georgios Fainekos
2015 Misc conf
Requirements driven falsification with coverage metrics.
EMSOFT
Adel Dokhanchi, Aditya Zutshi, Rahul T. Sriniva, Sriram Sankaranarayanan, Georgios Fainekos
2014 B conf
On-Line Monitoring for Temporal Logic Robustness.
RV
Adel Dokhanchi, Bardh Hoxha, Georgios Fainekos
2014 J jnl
On-Line Monitoring for Temporal Logic Robustness.
CoRR
Adel Dokhanchi, Bardh Hoxha, Georgios Fainekos
2012 J jnl
Performance Improvement and Congestion Reduction of Large FPGAs Using On-Chip Microwave Interconnects.
IEICE Trans. Electron.
Mohammad Taghi Teimoori, Ali Jahanian, Adel Dokhanchi
2011 — conf
Feasibility Study of Using the RF Interconnects in Large FPGAs to Improve Routing Tracks Usage.
ISVLSI
Adel Dokhanchi, Ali Jahanian, Esfandiar Mehrshahi, Mohammad Taghi Teimoori
2008 — conf
Performance Improvement of Physical Retiming with Shortcut Insertion.
ISVLSI
Adel Dokhanchi, Mostafa Rezvani, Ali Jahanian, Morteza Saheb Zamani