Adeboye Stephen Oyeniran

18 papers B 1C 7Journal 4Unranked 6
YearRankTypeTitle / Venue / Authors
2022 — conf
High-Level Fault Diagnosis in RISC Processors with Implementation-Independent Functional Test.
ISVLSI
Adeboye Stephen Oyeniran, Maksim Jenihhin, Jaan Raik, Raimund Ubar
2021 C conf
Implementation-Independent Test Generation for a Large Class of Faults in RISC Processor Modules.
DSD
Maksim Jenihhin, Adeboye Stephen Oyeniran, Jaan Raik, Raimund Ubar
2020 J jnl
High-Level Implementation-Independent Functional Software-Based Self-Test for RISC Processors.
J. Electron. Test.
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik
2020 C conf
Implementation-Independent Functional Test for Transition Delay Faults in Microprocessors.
DSD
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik
2020 J jnl
New categories of Safe Faults in a processor-based Embedded System.
CoRR
Cemil Cem Gürsoy, Maksim Jenihhin, Adeboye Stephen Oyeniran, Davide Piumatti, Jaan Raik, Matteo Sonza Reorda, Raimund Ubar
2019 C conf
Application Specific True Critical Paths Identification in Sequential Circuits.
IOLTS
Lembit Jürimägi, Raimund Ubar, Maksim Jenihhin, Jaan Raik, Sergei Devadze, Adeboye Stephen Oyeniran
2019 B conf
High-Level Combined Deterministic and Pseudo-exhuastive Test Generation for RISC Processors.
ETS
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Cemil Cem Gürsoy, Jaan Raik
2019 J jnl
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors.
CoRR
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Cemil Cem Gürsoy, Jaan Raik
2019 — conf
High-Level Functional Test Generation for Microprocessor Modules.
MIXDES
Adeboye Stephen Oyeniran, Raimund Ubar
2019 C conf
Implementation-Independent Functional Test Generation for MSC Microprocessors.
VLSI-SoC
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik
2019 — conf
Mixed-level identification of fault redundancy in microprocessors.
LATS
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Cemil Cem Gürsoy, Jaan Raik
2019 J jnl
Mixed-level identification of fault redundancy in microprocessors.
CoRR
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Cemil Cem Gürsoy, Jaan Raik
2019 C conf
New categories of Safe Faults in a processor-based Embedded System.
DDECS
Cemil Cem Gürsoy, Maksim Jenihhin, Adeboye Stephen Oyeniran, Davide Piumatti, Jaan Raik, Matteo Sonza Reorda, Raimund Ubar
2019 — conf
On Test Generation for Microprocessors for Extended Class of Functional Faults.
VLSI-SoC (Selected Papers)
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik
2018 — conf
Combined pseudo-exhaustive and deterministic testing of array multipliers.
AQTR
Adeboye Stephen Oyeniran, Siavoosh Payandeh Azad, Raimund Ubar
2018 C conf
Parallel Pseudo-Exhaustive Testing of Array Multipliers with Data-Controlled Segmentation.
ISCAS
Adeboye Stephen Oyeniran, Siavoosh Payandeh Azad, Raimund Ubar
2018 C conf
Replication-Based Deterministic Testing of 2-Dimensional Arrays with Highly Interrelated Cells.
DDECS
Siavoosh Payandeh Azad, Adeboye Stephen Oyeniran, Raimund Ubar
2017 — conf
High-level test data generation for software-based self-test in microprocessors.
MECO
Adeboye Stephen Oyeniran, Artjom Jasnetski, Anton Tsertov, Raimund Ubar